Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Use multiclock mode in formal verification #38

Open
wants to merge 2 commits into
base: master
Choose a base branch
from
Open

Use multiclock mode in formal verification #38

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
4a441dd
Use multiclock mode in formal verification
janschiefer Feb 19, 2024
10dcbf0
Sync reset fixes
janschiefer Feb 19, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion build.sbt
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ ThisBuild / version := "1.0"
ThisBuild / scalaVersion := "2.12.18"
ThisBuild / organization := "org.example"

val spinalVersion = "1.10.1"
val spinalVersion = "dev"
val spinalCore = "com.github.spinalhdl" %% "spinalhdl-core" % spinalVersion
val spinalLib = "com.github.spinalhdl" %% "spinalhdl-lib" % spinalVersion
val spinalIdslPlugin = compilerPlugin("com.github.spinalhdl" %% "spinalhdl-idsl-plugin" % spinalVersion)
Expand Down
3 changes: 2 additions & 1 deletion hw/spinal/projectname/Config.scala
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,8 @@ object Config {
def spinal = SpinalConfig(
targetDirectory = "hw/gen",
defaultConfigForClockDomains = ClockDomainConfig(
resetActiveLevel = HIGH
resetActiveLevel = HIGH,
resetKind = SYNC
),
onlyStdLogicVectorAtTopLevelIo = true
)
Expand Down
1 change: 1 addition & 0 deletions hw/spinal/projectname/MyTopLevelFormal.scala
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@ import spinal.core.formal._
// See https://spinalhdl.github.io/SpinalDoc-RTD/master/SpinalHDL/Formal%20verification/index.html#installing-requirements
object MyTopLevelFormal extends App {
FormalConfig
.withConfig( Config.spinal )
.withBMC(10)
.doVerify(new Component {
val dut = FormalDut(MyTopLevel())
Expand Down
2 changes: 1 addition & 1 deletion project/build.properties
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1 +1 @@
sbt.version=1.6.0
sbt.version=1.9.8