Fix uart dataLength = 8

SpinalHDL · Oct 14, 2024 · fee0edf · fee0edf
1 parent d379dd6
commit fee0edf
Showing 1 changed file with 4 additions and 4 deletions.
diff --git a/examples/src/main/scala/spinaldoc/examples/intermediate/Uart.scala b/examples/src/main/scala/spinaldoc/examples/intermediate/Uart.scala
@@ -345,7 +345,7 @@ case class UartRxTx() extends Component {
   val uartCtrl = UartCtrl(
     config=UartCtrlInitConfig(
       baudrate = 115200,
-      dataLength = 8,
+      dataLength = 7,
       parity = UartParityType.NONE,
       stop = UartStopType.ONE
     )
@@ -365,7 +365,7 @@ case class UartTx() extends Component {
   val uartCtrl = UartCtrl(
     config=UartCtrlInitConfig(
       baudrate = 115200,
-      dataLength = 8,
+      dataLength = 7,
       parity = UartParityType.NONE,
       stop = UartStopType.ONE
     )
@@ -386,7 +386,7 @@ case class UartRx() extends Component {
   val uartCtrl = UartCtrl(
     config = UartCtrlInitConfig(
       baudrate = 115200,
-      dataLength = 8,
+      dataLength = 7,
       parity = UartParityType.NONE,
       stop = UartStopType.ONE
     ),
@@ -467,7 +467,7 @@ case class UartWithHeader() extends Component {
   val uartCtrl = UartCtrl(
     config=UartCtrlInitConfig(
       baudrate = 115200,
-      dataLength = 8,
+      dataLength = 7,
       parity = UartParityType.NONE,
       stop = UartStopType.ONE
     )