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Merge pull request #179 from dlmiles/dev
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Cleanup dev branch
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Dolu1990 authored May 12, 2023
2 parents 6a9fc26 + 779b3c4 commit 89c5a8c
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2 changes: 1 addition & 1 deletion LICENSE
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reative Commons Legal Code
Creative Commons Legal Code

CC0 1.0 Universal

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1 change: 1 addition & 0 deletions source/SpinalHDL/Data types/bits.rst
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Expand Up @@ -274,6 +274,7 @@ Misc
- Int
* - x.bitsRange
- Return the range (x.high downto 0)
- Range
* - x.valueRange
- Return the range (x.minValue downto x.maxValue). Note can't be used for value which overflow the JVM Int capacity.
- Range
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2 changes: 1 addition & 1 deletion source/SpinalHDL/Libraries/utils.rst
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Expand Up @@ -54,7 +54,7 @@ State less utilities
- | Apply a mask on x to only keep the bit set from ``requests``.
| it start looking in ``requests`` from the ``ohPriority`` position.
| For example if ``requests`` is "1001" and ``ohPriority`` is "0010", the ``roundRobin`` function will start looking in `requests` from its second bit and will return "1000".
* - | `MuxOH <http://spinalhdl.github.io/SpinalHDL/#spinal.lib.MuxOH$>`_ (
* - | MuxOH (
| oneHot : IndexedSeq[Bool],
| inputs : Iterable[T]
| )
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4 changes: 2 additions & 2 deletions source/SpinalHDL/miscelenea/frequent_errors.rst
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.. role:: raw-html-m2r(raw)
:format: html

Introduction
------------
Frequent Errors
---------------

This page will talk about errors which could happen when people are using SpinalHDL.

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23 changes: 23 additions & 0 deletions source/SpinalHDL/miscelenea/index.rst
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=============
Miscellaneous
=============

This section includes content that may be:

* out-of-date
* could be better curated
* may contain duplicate information (better found elsewhere here or in another repo)
* drafts of documentation and works in progress

So please consider the information in this section with caution and a best
effort on the author to provide documentation.

.. toctree::
:hidden:

frequent_errors
regular_hdl
lib/briey/introduction
lib/briey/hardware_toplevel
lib/briey/hardware
lib/briey/software
4 changes: 2 additions & 2 deletions source/SpinalHDL/miscelenea/lib/briey/hardware.rst
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.. role:: raw-html-m2r(raw)
:format: html

Introduction
------------
Pinsec Hardware Introduction
----------------------------

There is the Pinsec toplevel hardware diagram :

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4 changes: 2 additions & 2 deletions source/SpinalHDL/miscelenea/lib/briey/hardware_toplevel.rst
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.. _briey_hardware_toplevel:

Introduction
------------
Briey Hardware Introduction
---------------------------

``Briey`` is a little SoC designed for FPGA. It is available in the SpinalHDL library and some documentation could be find :ref:`there <briey_introduction>`

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4 changes: 2 additions & 2 deletions source/SpinalHDL/miscelenea/lib/briey/introduction.rst
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.. _briey_introduction:

Introduction
------------
Briey Introduction
------------------

Briey is the name of a little FPGA SoC fully written in SpinalHDL. Goals of this project are multiple :

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8 changes: 1 addition & 7 deletions source/index.rst
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Expand Up @@ -20,6 +20,7 @@
SpinalHDL/Formal verification/index
SpinalHDL/Examples/index
SpinalHDL/Legacy/index
SpinalHDL/miscelenea/index
SpinalHDL/Developers area/index


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:alt: Join the chat at https://gitter.im/SpinalHDL/SpinalHDL



.. image:: https://api.travis-ci.org/SpinalHDL/SpinalHDL.svg?branch=master
:target: https://travis-ci.org/SpinalHDL/SpinalHDL
:alt: Build Status



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