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Modify configuration for padding
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@Snoopy87
Snoopy87 committed Aug 16, 2018
1 parent 17c106d commit 3915a3a
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Showing 5 changed files with 57 additions and 32 deletions.
10 changes: 7 additions & 3 deletions crypto/src/main/scala/spinal/crypto/hash/md5/MD5Core_Std.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ package spinal.crypto.hash.md5
import spinal.core._
import spinal.lib._
import spinal.crypto.hash._
import spinal.crypto.padding.{HashPadding_Std, HashPaddingConfig}
import spinal.crypto.padding.{HashPadding_Config, HashPadding_Std}


/**
Expand All @@ -47,12 +47,16 @@ class MD5Core_Std(dataWidth: BitCount = 32 bits) extends Component {
hashBlockWidth = MD5.blockWidth
)

val configPadding = HashPaddingConfig(endianess = LITTLE_endian)
val configPadding = HashPadding_Config(
dataInWidth = dataWidth ,
dataOutWidth = MD5.blockWidth,
endianess = LITTLE_endian
)

val io = slave(HashCoreIO(configCore))

val engine = new MD5Engine_Std()
val padding = new HashPadding_Std(configCore, configPadding)
val padding = new HashPadding_Std(configPadding)

// Connect IO <-> padding
padding.io.init := io.init
Expand Down
10 changes: 7 additions & 3 deletions crypto/src/main/scala/spinal/crypto/hash/sha2/SHA2Core_Std.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ package spinal.crypto.hash.sha2
import spinal.core._
import spinal.lib._
import spinal.crypto.hash._
import spinal.crypto.padding.{HashPadding_Std, HashPaddingConfig}
import spinal.crypto.padding.{HashPadding_Config, HashPadding_Std}



Expand All @@ -51,12 +51,16 @@ class SHA2Core_Std(mode: SHA2_Type, dataWidth: BitCount = 32 bits) extends Compo
hashBlockWidth = SHA2.blockWidth(mode) bits
)

val configPadding = HashPaddingConfig(endianess = BIG_endian)
val configPadding = HashPadding_Config(
dataInWidth = dataWidth ,
dataOutWidth = SHA2.blockWidth(mode) bits,
endianess = BIG_endian
)

val io = slave(HashCoreIO(configCore))

val engine = new SHA2Engine_Std(mode)
val padding = new HashPadding_Std(configCore, configPadding)
val padding = new HashPadding_Std(configPadding)

// Connect IO <-> padding
padding.io.init := io.init
Expand Down
40 changes: 22 additions & 18 deletions crypto/src/main/scala/spinal/crypto/padding/HashPadding_Std.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -34,9 +34,13 @@ import spinal.lib._
/**
* Configuration of the Hash Padding core
*/
case class HashPaddingConfig(
endianess : EndiannessMode
)
case class HashPadding_Config(
dataInWidth : BitCount,
dataOutWidth : BitCount ,
endianess : EndiannessMode,
symbolWidth : BitCount = 8 bits
) extends PaddingConfig(dataInWidth, dataOutWidth, symbolWidth)


/**
* Hash Padding
Expand All @@ -47,17 +51,17 @@ case class HashPaddingConfig(
* - Write the size in bits of the message on 64 bits (l0 l1) e.g : 24 bits => 00000018 00000000
*
*/
class HashPadding_Std(configCore: HashCoreConfig, configPadding: HashPaddingConfig) extends Component {
class HashPadding_Std(config: HashPadding_Config) extends Component {

assert(configCore.dataWidth.value == 32, "Currently Hash padding supports only 32 bits")
assert(config.dataInWidth.value == 32, "Currently Hash padding supports only 32 bits")

val io = slave(PaddingIO(configCore.getPaddingIOConfig))
val io = slave(PaddingIO(config.getPaddingIOConfig))

val nbrWordInBlock = configCore.hashBlockWidth.value / configCore.dataWidth.value
val nbrByteInWord = configCore.dataWidth.value / 8
val nbrWordInBlock = config.dataOutWidth.value / config.dataInWidth.value
val nbrByteInWord = config.dataInWidth.value / 8

val cntBit = Reg(UInt(64 bits))
val block = Reg(Vec(Bits(configCore.dataWidth), nbrWordInBlock))
val block = Reg(Vec(Bits(config.dataInWidth), nbrWordInBlock))
val indexWord = Reg(UInt(log2Up(nbrWordInBlock) bits))

// default value
Expand All @@ -66,16 +70,16 @@ class HashPadding_Std(configCore: HashCoreConfig, configPadding: HashPaddingConf
io.cmd.ready := False // default value

val maskMsg = io.cmd.size.mux(
U"00" -> (if(configPadding.endianess == LITTLE_endian) B"x000000FF" else B"xFF000000"),
U"01" -> (if(configPadding.endianess == LITTLE_endian) B"x0000FFFF" else B"xFFFF0000"),
U"10" -> (if(configPadding.endianess == LITTLE_endian) B"x00FFFFFF" else B"xFFFFFF00"),
U"00" -> (if(config.endianess == LITTLE_endian) B"x000000FF" else B"xFF000000"),
U"01" -> (if(config.endianess == LITTLE_endian) B"x0000FFFF" else B"xFFFF0000"),
U"10" -> (if(config.endianess == LITTLE_endian) B"x00FFFFFF" else B"xFFFFFF00"),
U"11" -> B"xFFFFFFFF"
)

val maskSet1 = io.cmd.size.mux(
U"00" -> (if(configPadding.endianess == LITTLE_endian) B"x00008000" else B"x00800000"),
U"01" -> (if(configPadding.endianess == LITTLE_endian) B"x00800000" else B"x00008000"),
U"10" -> (if(configPadding.endianess == LITTLE_endian) B"x80000000" else B"x00000080"),
U"00" -> (if(config.endianess == LITTLE_endian) B"x00008000" else B"x00800000"),
U"01" -> (if(config.endianess == LITTLE_endian) B"x00800000" else B"x00008000"),
U"10" -> (if(config.endianess == LITTLE_endian) B"x80000000" else B"x00000080"),
U"11" -> B"x00000000"
)

Expand Down Expand Up @@ -126,7 +130,7 @@ class HashPadding_Std(configCore: HashCoreConfig, configPadding: HashPaddingConf
}
}otherwise{

cntBit := cntBit + configCore.dataWidth.value
cntBit := cntBit + config.dataInWidth.value
indexWord := indexWord - 1

when(indexWord === 0){
Expand Down Expand Up @@ -158,7 +162,7 @@ class HashPadding_Std(configCore: HashCoreConfig, configPadding: HashPaddingConf
indexWord := indexWord - 1

when(addPaddingNextWord){
block(indexWord) := (if(configPadding.endianess == LITTLE_endian) B"x00000080" else B"x80000000")
block(indexWord) := (if(config.endianess == LITTLE_endian) B"x00000080" else B"x80000000")
addPaddingNextWord := False
}otherwise{
when(indexWord =/= 0){
Expand All @@ -173,7 +177,7 @@ class HashPadding_Std(configCore: HashCoreConfig, configPadding: HashPaddingConf

}otherwise{

if(configPadding.endianess == LITTLE_endian){
if(config.endianess == LITTLE_endian){
block(1) := cntBit(31 downto 0).asBits
block(0) := cntBit(63 downto 32).asBits
}else{
Expand Down
10 changes: 2 additions & 8 deletions crypto/src/main/scala/spinal/crypto/padding/Pad_xB_1_Std.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -29,19 +29,13 @@ import spinal.core._
import spinal.lib._
import spinal.lib.fsm._


case class Padding_xB_1_Config(
dataInWidth : BitCount,
dataOutWidth : BitCount ,
pad_xB : Byte,
symbolWidth : BitCount = 8 bits
){
def getPaddingIOConfig = PaddingIOConfig(
dataCmdWidth = dataInWidth,
dataRspWidth = dataOutWidth,
symbolWidth = symbolWidth
)
}
) extends PaddingConfig(dataInWidth, dataOutWidth, symbolWidth)



/**
Expand Down
19 changes: 19 additions & 0 deletions crypto/src/main/scala/spinal/crypto/padding/Padding.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,25 @@ import spinal.core._
import spinal.lib._


/**
* Base class for the padding configuration
* @param dataInWidth width of the data from the command
* @param dataOutWidth width of the data from the response
* @param symbolInWidth symbol width of the command data
*/
class PaddingConfig(
dataInWidth : BitCount,
dataOutWidth : BitCount,
symbolInWidth : BitCount
){
def getPaddingIOConfig = PaddingIOConfig(
dataCmdWidth = dataInWidth,
dataRspWidth = dataOutWidth,
symbolWidth = symbolInWidth
)
}


case class PaddingIOConfig (
dataCmdWidth : BitCount,
dataRspWidth : BitCount,
Expand Down

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