Cleanup 05of20: dut.log is deprecated

AhbLite3.py

@@ -3,19 +3,20 @@
 import cocotb
 from cocotb.result import TestFailure
 from cocotb.triggers import RisingEdge, Edge
+from cocotb.decorators import coroutine
 
-from cocotblib.misc import log2Up, BoolRandomizer, assertEquals
+from .misc import log2Up, BoolRandomizer, assertEquals
 
 
 def AhbLite3MasterIdle(ahb):
- ahb.HADDR <= 0
- ahb.HWRITE <= 0
- ahb.HSIZE <= 0
- ahb.HBURST <= 0
- ahb.HPROT <= 0
- ahb.HTRANS <= 0
- ahb.HMASTLOCK <= 0
- ahb.HWDATA <= 0
+ ahb.HADDR.value = 0
+ ahb.HWRITE.value = 0
+ ahb.HSIZE.value = 0
+ ahb.HBURST.value = 0
+ ahb.HPROT.value = 0
+ ahb.HTRANS.value = 0
+ ahb.HMASTLOCK.value = 0
+ ahb.HWDATA.value = 0
 
 
 
@@ -103,34 +104,34 @@ def __init__(self,ahb,transactor,clk,reset):
  self.clk = clk
  self.reset = reset
  self.transactor = transactor
- cocotb.fork(self.stim())
+ cocotb.start_soon(self.stim())
 
- @cocotb.coroutine
+ @coroutine
  def stim(self):
  ahb = self.ahb
- ahb.HADDR <= 0
- ahb.HWRITE <= 0
- ahb.HSIZE <= 0
- ahb.HBURST <= 0
- ahb.HPROT <= 0
- ahb.HTRANS <= 0
- ahb.HMASTLOCK <= 0
- ahb.HWDATA <= 0
+ ahb.HADDR.value = 0
+ ahb.HWRITE.value = 0
+ ahb.HSIZE.value = 0
+ ahb.HBURST.value = 0
+ ahb.HPROT.value = 0
+ ahb.HTRANS.value = 0
+ ahb.HMASTLOCK.value = 0
+ ahb.HWDATA.value = 0
  HWDATAbuffer = 0
  while True:
  for trans in self.transactor.getTransactions():
  yield RisingEdge(self.clk)
  while int(self.ahb.HREADY) == 0:
  yield RisingEdge(self.clk)
 
- ahb.HADDR <= trans.HADDR
- ahb.HWRITE <= trans.HWRITE
- ahb.HSIZE <= trans.HSIZE
- ahb.HBURST <= trans.HBURST
- ahb.HPROT <= trans.HPROT
- ahb.HTRANS <= trans.HTRANS
- ahb.HMASTLOCK <= trans.HMASTLOCK
- ahb.HWDATA <= HWDATAbuffer
+ ahb.HADDR.value = trans.HADDR
+ ahb.HWRITE.value = trans.HWRITE
+ ahb.HSIZE.value = trans.HSIZE
+ ahb.HBURST.value = trans.HBURST
+ ahb.HPROT.value = trans.HPROT
+ ahb.HTRANS.value = trans.HTRANS
+ ahb.HMASTLOCK.value = trans.HMASTLOCK
+ ahb.HWDATA.value = HWDATAbuffer
  HWDATAbuffer = trans.HWDATA
 
 class AhbLite3Terminaison:
@@ -139,27 +140,27 @@ def __init__(self,ahb,clk,reset):
  self.clk = clk
  self.reset = reset
  self.randomHREADY = True
- cocotb.fork(self.stim())
- cocotb.fork(self.combEvent())
+ cocotb.start_soon(self.stim())
+ cocotb.start_soon(self.combEvent())
 
- @cocotb.coroutine
+ @coroutine
  def stim(self):
  randomizer = BoolRandomizer()
- self.ahb.HREADY <= 1
- self.ahb.HSEL <= 1
+ self.ahb.HREADY.value = 1
+ self.ahb.HSEL.value = 1
  while True:
  yield RisingEdge(self.clk)
  self.randomHREADY = randomizer.get()
  self.doComb()
 
- @cocotb.coroutine
+ @coroutine
  def combEvent(self):
  while True:
  yield Edge(self.ahb.HREADYOUT)
  self.doComb()
 
  def doComb(self):
- self.ahb.HREADY <= (self.randomHREADY and (int(self.ahb.HREADYOUT) == 1))
+ self.ahb.HREADY.value = (self.randomHREADY and (int(self.ahb.HREADYOUT) == 1))
 
 
 class AhbLite3MasterReadChecker:
@@ -169,9 +170,9 @@ def __init__(self,ahb,buffer,clk,reset):
  self.reset = reset
  self.buffer = buffer
  self.counter = 0
- cocotb.fork(self.stim())
+ cocotb.start_soon(self.stim())
 
- @cocotb.coroutine
+ @coroutine
  def stim(self):
  ahb = self.ahb
  readIncoming = False
@@ -187,7 +188,7 @@ def stim(self):
  assertEquals((int(ahb.HRDATA) >> (i*8)) & 0xFF,(bufferData >> (i*8)) & 0xFF,"AHB master read checker faild %x " %(int(ahb.HADDR)) )
 
  self.counter += 1
- # cocotb.log.info("POP " + str(self.buffer.qsize()))
+ # cocotb._log.info("POP " + str(self.buffer.qsize()))
 
  readIncoming = int(ahb.HTRANS) >= 2 and int(ahb.HWRITE) == 0
  size = 1 << int(ahb.HSIZE)
@@ -204,13 +205,13 @@ def __init__(self,ahb,base,size,clk,reset):
  self.size = size
  self.ram = bytearray(b'\x00' * size)
 
- cocotb.fork(self.stim())
- cocotb.fork(self.stimReady())
+ cocotb.start_soon(self.stim())
+ cocotb.start_soon(self.stimReady())
 
- @cocotb.coroutine
+ @coroutine
  def stimReady(self):
  randomizer = BoolRandomizer()
- self.ahb.HREADYOUT <= 1
+ self.ahb.HREADYOUT.value = 1
  busy = False
  while True:
  yield RisingEdge(self.clk)
@@ -222,16 +223,16 @@ def stimReady(self):
  raise TestFailure("HREADYOUT == 0 but HREADY == 1 ??? " + self.ahb.HREADY._name)
  busy = busyNew
  if (busy):
- self.ahb.HREADYOUT <= randomizer.get() # make some random delay for NONSEQ and SEQ requests
+ self.ahb.HREADYOUT.value = randomizer.get()  # make some random delay for NONSEQ and SEQ requests
  else:
- self.ahb.HREADYOUT <= 1 # IDLE and BUSY require 0 WS
+ self.ahb.HREADYOUT.value = 1  # IDLE and BUSY require 0 WS
 
- @cocotb.coroutine
+ @coroutine
  def stim(self):
  ahb = self.ahb
- ahb.HREADYOUT <= 1
- ahb.HRESP <= 0
- ahb.HRDATA <= 0
+ ahb.HREADYOUT.value = 1
+ ahb.HRESP.value = 0
+ ahb.HRDATA.value = 0
  valid = 0
  while True:
  yield RisingEdge(self.clk)
@@ -252,7 +253,7 @@ def stim(self):
  address = int(ahb.HADDR)
  addressOffset = address % (len(ahb.HWDATA)//8)
 
- ahb.HRDATA <= 0
+ ahb.HRDATA.value = 0
  if valid == 1:
  if trans >= 2:
  if write == 0:
@@ -261,4 +262,4 @@ def stim(self):
  data |= self.ram[address-self.base + idx] << (8*(addressOffset + idx))
  # print("read %x with %x" % (address + idx, self.ram[address-self.base + idx]))
  # print(str(data))
- ahb.HRDATA <= int(data)
+ ahb.HRDATA.value = int(data)

Apb3.py

@@ -1,11 +1,11 @@
 import random
 
 import cocotb
-from cocotb.decorators import coroutine
 from cocotb.result import TestFailure, ReturnValue
 from cocotb.triggers import RisingEdge, Edge
+from cocotb.decorators import coroutine
 
-from cocotblib.misc import log2Up, BoolRandomizer, assertEquals, waitClockedCond, randSignal
+from .misc import log2Up, BoolRandomizer, assertEquals, waitClockedCond, randSignal
 
 
 class Apb3:
@@ -20,7 +20,7 @@ def __init__(self, dut, name, clk = None):
  self.PRDATA = dut.__getattr__(name + "_PRDATA")
 
  def idle(self):
- self.PSEL <= 0
+ self.PSEL.value = 0
 
  @coroutine
  def delay(self, cycle):
@@ -29,16 +29,16 @@ def delay(self, cycle):
 
  @coroutine
  def write(self, address, data, sel = 1):
- self.PADDR <= address
- self.PSEL <= sel
- self.PENABLE <= False
- self.PWRITE <= True
- self.PWDATA <= data
+ self.PADDR.value = address
+ self.PSEL.value = sel
+ self.PENABLE.value = False
+ self.PWRITE.value = True
+ self.PWDATA.value = data
  yield RisingEdge(self.clk)
- self.PENABLE <= True
+ self.PENABLE.value = True
  yield waitClockedCond(self.clk, lambda : self.PREADY == True)
  randSignal(self.PADDR)
- self.PSEL <= 0
+ self.PSEL.value = 0
  randSignal(self.PENABLE)
  randSignal(self.PWRITE)
  randSignal(self.PWDATA)
@@ -51,16 +51,16 @@ def writeMasked(self, address, data, mask, sel = 1):
 
  @coroutine
  def read(self, address, sel=1):
- self.PADDR <= address
- self.PSEL <= sel
- self.PENABLE <= False
- self.PWRITE <= False
+ self.PADDR.value = address
+ self.PSEL.value = sel
+ self.PENABLE.value = False
+ self.PWRITE.value = False
  randSignal(self.PWDATA)
  yield RisingEdge(self.clk)
- self.PENABLE <= True
+ self.PENABLE.value = True
  yield waitClockedCond(self.clk, lambda: self.PREADY == True)
  randSignal(self.PADDR)
- self.PSEL <= 0
+ self.PSEL.value = 0
  randSignal(self.PENABLE)
  randSignal(self.PWRITE)
  raise ReturnValue(int(self.PRDATA))

Axi4.py

@@ -1,11 +1,11 @@
 import random
 from queue import Queue
 
-from cocotblib.Phase import PHASE_SIM, Infrastructure
-from cocotblib.Scorboard import ScorboardOutOfOrder
-from cocotblib.misc import BoolRandomizer, log2Up, randBits
+from .Phase import PHASE_SIM, Infrastructure
+from .Scorboard import ScorboardOutOfOrder
+from .misc import BoolRandomizer, log2Up, randBits
 
-from cocotblib.Stream import Stream, Transaction, StreamDriverSlave, StreamDriverMaster, StreamMonitor
+from .Stream import Stream, Transaction, StreamDriverSlave, StreamDriverMaster, StreamMonitor
 
 
 class Axi4:
@@ -74,8 +74,8 @@ def __init__(self,name,parent,axi,addressWidth,clk,reset):
  StreamDriverMaster(axi.w, self.genWriteData, clk, reset)
  StreamMonitor(axi.r, self.onReadRsp, clk, reset)
  StreamMonitor(axi.b, self.onWriteRsp, clk, reset)
- axi.w.payload.last <= 0
- axi.r.payload.last <= 0
+ axi.w.payload.last.value = 0
+ axi.r.payload.last.value = 0
 
  def freeReservatedAddresses(self,uut,ref,equal):
  self.reservedAddresses.pop(ref,None)

ClockDomain.py

@@ -1,5 +1,6 @@
 import cocotb
 from cocotb.triggers import Timer, RisingEdge, Event
+from cocotb.decorators import coroutine
 
 
 ###############################################################################
@@ -17,7 +18,7 @@ class RESET_ACTIVE_LEVEL:
 #
 # # Create a clock with a reset active high
 # clockDomain = ClockDomain(dut.clk, 400, dut.reset, RESET_ACTIVE_LEVEL.HIGH)
-# cocobt.fork( clockDomain.start() )
+# cocotb.start_soon( clockDomain.start() )
 #
 class ClockDomain:
 
@@ -42,20 +43,20 @@ def __init__(self, clk, halfPeriod, reset=None, resetActiveLevel=RESET_ACTIVE_LE
 
  ##########################################################################
  # Generate the clock signals
- @cocotb.coroutine
+ @coroutine
  def start(self):
 
- self.fork_gen = cocotb.fork(self._clkGen())
+ self.fork_gen = cocotb.start_soon(self._clkGen())
  if self.reset != None :
- cocotb.fork(self._waitEndReset())
+ cocotb.start_soon(self._waitEndReset())
 
  if self.reset:
- self.reset <= self.typeReset
+ self.reset.value = self.typeReset
 
  yield Timer(self.halfPeriod * 5)
 
  if self.reset:
- self.reset <= int(1 if self.typeReset == RESET_ACTIVE_LEVEL.LOW else 0)
+ self.reset.value = int(1 if self.typeReset == RESET_ACTIVE_LEVEL.LOW else 0)
 
 
  ##########################################################################
@@ -67,18 +68,18 @@ def stop(self):
 
  ##########################################################################
  # Generate the clk
- @cocotb.coroutine
+ @coroutine
  def _clkGen(self):
  while True:
- self.clk <= 0
+ self.clk.value = 0
  yield Timer(self.halfPeriod)
- self.clk <= 1
+ self.clk.value = 1
  yield Timer(self.halfPeriod)
 
 
  ##########################################################################
  # Wait the end of the reset
- @cocotb.coroutine
+ @coroutine
  def _waitEndReset(self):
  while True:
  yield RisingEdge(self.clk)

Flow.py

@@ -1,6 +1,8 @@
 import cocotb
 from cocotb.triggers import RisingEdge, Event
-from cocotblib.misc import Bundle
+from cocotb.decorators import coroutine
+
+from .misc import Bundle
 
 
 ###############################################################################
@@ -26,7 +28,7 @@ def __init__(self, dut, name):
  #==========================================================================
  def startMonitoringValid(self, clk):
  self.clk = clk
- self.fork_valid = cocotb.fork(self.monitor_valid())
+ self.fork_valid = cocotb.start_soon(self.monitor_valid())
 
 
  #==========================================================================
@@ -39,7 +41,7 @@ def stopMonitoring(self):
  #==========================================================================
  # Monitor the valid signal
  #==========================================================================
- @cocotb.coroutine
+ @coroutine
  def monitor_valid(self):
  while True:
  yield RisingEdge(self.clk)