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document ddr and bus clock limits / add bus-speed build-time option
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Signed-off-by: Josua Mayer <[email protected]>
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Josua-SR committed Sep 27, 2024
1 parent 2a80eaf commit 28bc7e1
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10 changes: 8 additions & 2 deletions README.md
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Expand Up @@ -79,8 +79,8 @@ DDR Clock can be configured in local.conf using `LX2160A_DDR_SPEED`, supported v
- `2400`
- `2600`
- `2900`
- `3200` (default)
- `2900` only for LX2162A, and LX2160A binned 2GHz and higher (default)
- `3200` only for LX2160A binned 2.2GHz
### CPU Clock
Expand All @@ -89,6 +89,12 @@ CPU (Cortex A72) Clock can be configured in local.conf using `LX2160A_CPU_SPEED`
- `2000` (default, recommended)
- `2200` (for over-clocking, or for specifically purchased 2.2GHz binned SoC)
### Bus Clock
Bus clock can be configured in local.conf using `LX2160A_BUS_SPEED`, supported values are:
- `700` only for LX2160A binned 2GHz and higher (default)
## Maintainer Notes
### Patching Linux / U-Boot / ATF / RCW / DPL / DPC / etc.:
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9 changes: 5 additions & 4 deletions conf/machine/lx2160acex7.conf
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Expand Up @@ -29,14 +29,15 @@ KERNEL_DEFCONFIG ?= "defconfig"
SERIAL_CONSOLES ?= "115200;ttyS0 115200;ttyS1 115200;ttyAMA0"
SERIAL_CONSOLES_CHECK ?= "${SERIAL_CONSOLES}"

LX2160A_BUS_SPEED ?= "700"
LX2160A_CPU_SPEED ?= "2000"
LX2160A_DDR_SPEED ?= "3200"
LX2160A_DDR_SPEED ?= "2900"

UEFI_XSPIBOOT ?= "LX2160ARDB_EFI_NORBOOT.fd"
BOOTTYPE ?= "flexspi_nor sd emmc"
RCWXSPI ?= "clearfog-cx/rcw_${LX2160A_CPU_SPEED}_700_${LX2160A_DDR_SPEED}_8_5_2"
RCWSD ?= "clearfog-cx/rcw_${LX2160A_CPU_SPEED}_700_${LX2160A_DDR_SPEED}_8_5_2"
RCWEMMC ?= "clearfog-cx/rcw_${LX2160A_CPU_SPEED}_700_${LX2160A_DDR_SPEED}_8_5_2"
RCWXSPI ?= "clearfog-cx/rcw_${LX2160A_CPU_SPEED}_${LX2160A_BUS_SPEED}_${LX2160A_DDR_SPEED}_8_5_2"
RCWSD ?= "clearfog-cx/rcw_${LX2160A_CPU_SPEED}_${LX2160A_BUS_SPEED}_${LX2160A_DDR_SPEED}_8_5_2"
RCWEMMC ?= "clearfog-cx/rcw_${LX2160A_CPU_SPEED}_${LX2160A_BUS_SPEED}_${LX2160A_DDR_SPEED}_8_5_2"

EXTRA_IMAGEDEPENDS += "management-complex mc-utils rcw ls2-phy ddr-phy uefi qoriq-atf inphi"
USE_VT = "0"
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