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* pm-domains: PM: domains: Drop/restore performance state votes for devices at runtime PM PM: domains: Return early if perf state is already set for the device PM: domains: Split code in dev_pm_genpd_set_performance_state() PM: domains: fix some kernel-doc issues * pm-devfreq: PM / devfreq: passive: Fix get_target_freq when not using required-opp dt-bindings: devfreq: tegra30-actmon: Add cooling-cells dt-bindings: devfreq: tegra30-actmon: Convert to schema PM / devfreq: userspace: Use DEVICE_ATTR_RW macro PM / devfreq: imx8m-ddrc: Remove DEVFREQ_GOV_SIMPLE_ONDEMAND dependency PM / devfreq: tegra30: Support thermal cooling PM / devfreq: imx-bus: Remove imx_bus_get_dev_status PM / devfreq: Add missing error code in devfreq_add_device()
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Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-actmon.txt
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Documentation/devicetree/bindings/devfreq/nvidia,tegra30-actmon.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/devfreq/nvidia,tegra30-actmon.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: NVIDIA Tegra30 Activity Monitor | ||
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maintainers: | ||
- Dmitry Osipenko <[email protected]> | ||
- Jon Hunter <[email protected]> | ||
- Thierry Reding <[email protected]> | ||
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description: | | ||
The activity monitor block collects statistics about the behaviour of other | ||
components in the system. This information can be used to derive the rate at | ||
which the external memory needs to be clocked in order to serve all requests | ||
from the monitored clients. | ||
properties: | ||
compatible: | ||
enum: | ||
- nvidia,tegra30-actmon | ||
- nvidia,tegra114-actmon | ||
- nvidia,tegra124-actmon | ||
- nvidia,tegra210-actmon | ||
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reg: | ||
maxItems: 1 | ||
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clocks: | ||
maxItems: 2 | ||
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clock-names: | ||
items: | ||
- const: actmon | ||
- const: emc | ||
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resets: | ||
maxItems: 1 | ||
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reset-names: | ||
items: | ||
- const: actmon | ||
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interrupts: | ||
maxItems: 1 | ||
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interconnects: | ||
minItems: 1 | ||
maxItems: 12 | ||
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interconnect-names: | ||
minItems: 1 | ||
maxItems: 12 | ||
description: | ||
Should include name of the interconnect path for each interconnect | ||
entry. Consult TRM documentation for information about available | ||
memory clients, see MEMORY CONTROLLER and ACTIVITY MONITOR sections. | ||
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operating-points-v2: | ||
description: | ||
Should contain freqs and voltages and opp-supported-hw property, which | ||
is a bitfield indicating SoC speedo ID mask. | ||
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"#cooling-cells": | ||
const: 2 | ||
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required: | ||
- compatible | ||
- reg | ||
- clocks | ||
- clock-names | ||
- resets | ||
- reset-names | ||
- interrupts | ||
- interconnects | ||
- interconnect-names | ||
- operating-points-v2 | ||
- "#cooling-cells" | ||
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additionalProperties: false | ||
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examples: | ||
- | | ||
#include <dt-bindings/memory/tegra30-mc.h> | ||
mc: memory-controller@7000f000 { | ||
compatible = "nvidia,tegra30-mc"; | ||
reg = <0x7000f000 0x400>; | ||
clocks = <&clk 32>; | ||
clock-names = "mc"; | ||
interrupts = <0 77 4>; | ||
#iommu-cells = <1>; | ||
#reset-cells = <1>; | ||
#interconnect-cells = <1>; | ||
}; | ||
emc: external-memory-controller@7000f400 { | ||
compatible = "nvidia,tegra30-emc"; | ||
reg = <0x7000f400 0x400>; | ||
interrupts = <0 78 4>; | ||
clocks = <&clk 57>; | ||
nvidia,memory-controller = <&mc>; | ||
operating-points-v2 = <&dvfs_opp_table>; | ||
power-domains = <&domain>; | ||
#interconnect-cells = <0>; | ||
}; | ||
actmon@6000c800 { | ||
compatible = "nvidia,tegra30-actmon"; | ||
reg = <0x6000c800 0x400>; | ||
interrupts = <0 45 4>; | ||
clocks = <&clk 119>, <&clk 57>; | ||
clock-names = "actmon", "emc"; | ||
resets = <&rst 119>; | ||
reset-names = "actmon"; | ||
operating-points-v2 = <&dvfs_opp_table>; | ||
interconnects = <&mc TEGRA30_MC_MPCORER &emc>; | ||
interconnect-names = "cpu-read"; | ||
#cooling-cells = <2>; | ||
}; |
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