Process completed with exit code 1.

The following artifacts were uploaded using a version of actions/upload-artifact that is scheduled for deprecation: "compliance.xml". Please update your workflow to use v4 of the artifact actions. Learn more: https://github.blog/changelog/2024-04-16-deprecation-notice-v3-of-the-artifact-actions/

See https://docs.zephyrproject.org/latest/contribute/guidelines.html#clang-format for more details. You may want to run clang-format on this change: - RSI_ULPSS_UlpUartClkConfig(ULPCLK, ENABLE_STATIC_CLK, - false, ULP_UART_ULP_32MHZ_RC_CLK, 1); + RSI_ULPSS_UlpUartClkConfig(ULPCLK, ENABLE_STATIC_CLK, false, + ULP_UART_ULP_32MHZ_RC_CLK, 1); File:drivers/clock_control/clock_control_silabs_siwx917.c Line:35 You may want to run clang-format on this change: -#define SIWX917_CLOCK_INIT(p) \ - static struct siwx917_clock_data siwx917_clock_data_##p; \ - DEVICE_DT_INST_DEFINE(p, siwx917_clock_init, NULL, &siwx917_clock_data_##p, NULL, \ - PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, \ +#define SIWX917_CLOCK_INIT(p) \ + static struct siwx917_clock_data siwx917_clock_data_##p; \ + DEVICE_DT_INST_DEFINE(p, siwx917_clock_init, NULL, &siwx917_clock_data_##p, NULL, \ + PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, \ File:drivers/clock_control/clock_control_silabs_siwx917.c Line:195 You may want to run clang-format on this change: - if (ret) + if (ret) { return ret; + } File:drivers/dma/dma_silabs_siwx917.c Line:336 You may want to run clang-format on this change: -#define SIWX917_CLK_ULP_UART 0 -#define SIWX917_CLK_ULP_I2C 1 -#define SIWX917_CLK_ULP_DMA 2 -#define SIWX917_CLK_UART1 3 -#define SIWX917_CLK_UART2 4 -#define SIWX917_CLK_I2C0 5 -#define SIWX917_CLK_I2C1 6 -#define SIWX917_CLK_DMA0 7 +#define SIWX917_CLK_ULP_UART 0 +#define SIWX917_CLK_ULP_I2C 1 +#define SIWX917_CLK_ULP_DMA 2 +#define SIWX917_CLK_UART1 3 +#define SIWX917_CLK_UART2 4 +#define SIWX917_CLK_I2C0 5 +#define SIWX917_CLK_I2C1 6 +#define SIWX917_CLK_DMA0 7 File:include/zephyr/dt-bindings/clock/silabs/siwx917-clock.h Line:15

drivers/clock_control/clock_control_silabs_siwx917.c:35 - RSI_ULPSS_UlpUartClkConfig(ULPCLK, ENABLE_STATIC_CLK, - false, ULP_UART_ULP_32MHZ_RC_CLK, 1); + RSI_ULPSS_UlpUartClkConfig(ULPCLK, ENABLE_STATIC_CLK, false, + ULP_UART_ULP_32MHZ_RC_CLK, 1);

drivers/clock_control/clock_control_silabs_siwx917.c:195 -#define SIWX917_CLOCK_INIT(p) \ - static struct siwx917_clock_data siwx917_clock_data_##p; \ - DEVICE_DT_INST_DEFINE(p, siwx917_clock_init, NULL, &siwx917_clock_data_##p, NULL, \ - PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, \ +#define SIWX917_CLOCK_INIT(p) \ + static struct siwx917_clock_data siwx917_clock_data_##p; \ + DEVICE_DT_INST_DEFINE(p, siwx917_clock_init, NULL, &siwx917_clock_data_##p, NULL, \ + PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, \

drivers/dma/dma_silabs_siwx917.c:336 - if (ret) + if (ret) { return ret; + }