Process completed with exit code 6.

See https://docs.zephyrproject.org/latest/contribute/guidelines.html#coding-style for more details. No additional types will be considered - file 'scripts/checkpatch/typedefsfile': No such file or directory -:127: WARNING:LEADING_SPACE: please, no spaces at the start of a line #127: FILE: drivers/dma/dma_silabs_siwx917.c:36: + siwx917_udma_handle[2]; // Structure to store udma handles for UDMA0 and$ -:127: ERROR:C99_COMMENTS: do not use C99 // comments #127: FILE: drivers/dma/dma_silabs_siwx917.c:36: + siwx917_udma_handle[2]; // Structure to store udma handles for UDMA0 and -:128: ERROR:CODE_INDENT: code indent should use tabs where possible #128: FILE: drivers/dma/dma_silabs_siwx917.c:37: + // UDMA1(ULP_UDMA)$ -:128: WARNING:LEADING_SPACE: please, no spaces at the start of a line #128: FILE: drivers/dma/dma_silabs_siwx917.c:37: + // UDMA1(ULP_UDMA)$ -:128: ERROR:C99_COMMENTS: do not use C99 // comments #128: FILE: drivers/dma/dma_silabs_siwx917.c:37: + // UDMA1(ULP_UDMA) -:131: WARNING:LEADING_SPACE: please, no spaces at the start of a line #131: FILE: drivers/dma/dma_silabs_siwx917.c:40: + UDMA0_Type *reg; // UDMA register base address$ -:131: ERROR:C99_COMMENTS: do not use C99 // comments #131: FILE: drivers/dma/dma_silabs_siwx917.c:40: + UDMA0_Type *reg; // UDMA register base address -:132: WARNING:LEADING_SPACE: please, no spaces at the start of a line #132: FILE: drivers/dma/dma_silabs_siwx917.c:41: + uint8_t channels; // UDMA channel count$ -:132: ERROR:C99_COMMENTS: do not use C99 // comments #132: FILE: drivers/dma/dma_silabs_siwx917.c:41: + uint8_t channels; // UDMA channel count -:133: WARNING:LEADING_SPACE: please, no spaces at the start of a line #133: FILE: drivers/dma/dma_silabs_siwx917.c:42: + void (*irq_configure)(void); // IRQ configure function$ -:133: ERROR:C99_COMMENTS: do not use C99 // comments #133: FILE: drivers/dma/dma_silabs_siwx917.c:42: + void (*irq_configure)(void); // IRQ configure function -:137: WARNING:LEADING_SPACE: please, no spaces at the start of a line #137: FILE: drivers/dma/dma_silabs_siwx917.c:46: + UDMA_Channel_Info siwx917_udma_channel_info; // UDMA channel info$ -:137: ERROR:C99_COMMENTS: do not use C99 // comments #137: FILE: drivers/dma/dma_silabs_siwx917.c:46: + UDMA_Channel_Info siwx917_udma_channel_info; // UDMA channel info -:138: WARNING:LEADING_SPACE: please, no spaces at the start of a line #138: FILE: drivers/dma/dma_silabs_siwx917.c:47: + dma_callback_t dma_callback; // User callback$ -:138: ERROR:C99_COMMENTS: do not use C99 // comments #138: FILE: drivers/dma/dma_silabs_siwx917.c:47: + dma_callback_t dma_callback; // User callback -:139: WARNING:LEADING_SPACE: please, no spaces at the start of a line #139: FILE: drivers/dma/dma_silabs_siwx917.c:48: + void *cb_data; // User callback data$ -:139: ERROR:C99_COMMENTS: do not use C99 // comments #139: FILE: drivers/dma/dma_silabs_siwx917.c:48: + void *cb_data; // User callback data -:143: ERROR:OPEN_BRACE: open brace '{' following function definitions go on the next line #143: FILE: drivers/dma/dma_silabs_siwx917.c:52: +static inline int siwx917_dma_priority(uint32_t priority) { -:144: WARNING:LEADING_SPACE: please, no spaces at the start of a line #144: FILE: drivers/dma/dma_silabs_siwx917.c:53: + switch (priority) {$ -:145: WARNING:LEADING_SPACE: please, no spaces at the start of a line #145: FILE: drivers/dma/dma_silabs_siwx917.c:54: + case 0:$ -:146: WARNING:LEADING_SPACE: please, no spaces at the start of a line #146: FILE: drivers/dma/dma_silabs_siwx917.c:55: + return PRIORITY_LOW;$ -:147: WARNING:LEADING_SPACE: please, no spaces at the start of a line #147: FILE: drivers/dma/dma_silabs_siwx917.c:56: + case 1:$ -:148: WARNING:LEADING_SPACE: please, no spaces at the start of a line #148: FILE: drivers/dma/dma_silabs_siwx917.c:57: + return PRIORITY_H

Git conflict markers and whitespace errors are not allowed in added changes 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: drivers/dma/dma_silabs_siwx917.c:644: new blank line at EOF. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: dts/arm/silabs/siwg917.dtsi:213: trailing whitespace. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: dts/arm/silabs/siwg917.dtsi:225: trailing whitespace. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: soc/silabs/silabs_siwx917/siwg917/linker.ld:7: trailing whitespace. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: soc/silabs/silabs_siwx917/siwg917/linker.ld:20: trailing whitespace. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: soc/silabs/silabs_siwx917/siwg917/linker.ld:28: trailing whitespace. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: soc/silabs/silabs_siwx917/siwg917/linker.ld:29: trailing whitespace. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: tests/drivers/dma/chan_blen_transfer/boards/siwx917_rb4338a.overlay:6: trailing whitespace. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: tests/drivers/dma/udma_tests/boards/siwx917_rb4338a.overlay:6: trailing whitespace. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: tests/drivers/dma/udma_tests/src/test_dma.c:86: trailing whitespace. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: tests/drivers/dma/udma_tests/src/test_dma.c:120: trailing whitespace. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: tests/drivers/dma/udma_tests/src/test_dma.c:179: trailing whitespace. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: tests/drivers/dma/udma_tests/src/test_dma.c:213: trailing whitespace. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: tests/drivers/dma/udma_tests/src/test_dma.c:272: trailing whitespace. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: tests/drivers/dma/udma_tests/src/test_dma.c:306: trailing whitespace.

See https://docs.zephyrproject.org/latest/contribute/guidelines.html#commit-guidelines for more details 1: UC2 Commit message does not contain a 'Signed-off-by:' line 1: UC6 Commit message body is empty, should at least have 1 line(s). 3: B6 Body message is missing

See https://docs.zephyrproject.org/latest/contribute/guidelines.html#commit-guidelines for more details 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: author email (smalae <[email protected]>) needs to match one of the signed-off-by entries. 780e51e2559ffec1a1cc33115bab6f5f5f2eaf01: author email (smalae <[email protected]>) does not follow the syntax: First Last <email>.

See https://docs.zephyrproject.org/latest/contribute/guidelines.html#coding-style for more details. Please remove blank lines at end of 'drivers/dma/dma_silabs_siwx917.c'

Process completed with exit code 1.

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See https://docs.zephyrproject.org/latest/contribute/guidelines.html#clang-format for more details. You may want to run clang-format on this change: -#define DT_DRV_COMPAT silabs_siwx917_dma -#define DMA_PRIORITY_LOW 0 -#define DMA_PRIORITY_HIGH 1 +#define DT_DRV_COMPAT silabs_siwx917_dma +#define DMA_PRIORITY_LOW 0 +#define DMA_PRIORITY_HIGH 1 #define DMA_MAX_TRANSFER_COUNT 1024 -#define CHANNEL_12 12 -#define CHANNEL_32 32 -#define UDMA0_INSTANCE 0 -#define ULP_UDMA_INSTANCE 1 -#define PRIORITY_HIGH 1 -#define PRIORITY_LOW 0 -#define VALID_BURST_LENGTH 0 -#define UDMA_ADDR_INC_NONE 0X03 +#define CHANNEL_12 12 +#define CHANNEL_32 32 +#define UDMA0_INSTANCE 0 +#define ULP_UDMA_INSTANCE 1 +#define PRIORITY_HIGH 1 +#define PRIORITY_LOW 0 +#define VALID_BURST_LENGTH 0 +#define UDMA_ADDR_INC_NONE 0X03 LOG_MODULE_REGISTER(si91x_dma, CONFIG_DMA_LOG_LEVEL); -static RSI_UDMA_HANDLE_T - siwx917_udma_handle[2]; // Structure to store udma handles for UDMA0 and - // UDMA1(ULP_UDMA) +static RSI_UDMA_HANDLE_T siwx917_udma_handle[2]; // Structure to store udma handles for UDMA0 and + // UDMA1(ULP_UDMA) struct dma_siwx917_config { - UDMA0_Type *reg; // UDMA register base address - uint8_t channels; // UDMA channel count - void (*irq_configure)(void); // IRQ configure function + UDMA0_Type *reg; // UDMA register base address + uint8_t channels; // UDMA channel count + void (*irq_configure)(void); // IRQ configure function }; struct dma_siwx917_data { - UDMA_Channel_Info siwx917_udma_channel_info; // UDMA channel info - dma_callback_t dma_callback; // User callback - void *cb_data; // User callback data + UDMA_Channel_Info siwx917_udma_channel_info; // UDMA channel info + dma_callback_t dma_callback; // User callback + void *cb_data; // User callback data }; /*Function to validate and convert channel priority for sl layer usage*/ -static inline int siwx917_dma_priority(uint32_t priority) { - switch (priority) { - case 0: - return PRIORITY_LOW; - case 1: - return PRIORITY_HIGH; - default: - printf( - "Invalid DMA priority - must be low priority (0), high priority (1)"); - return -1; - } - return 0; +static inline int siwx917_dma_priority(uint32_t priority) +{ + switch (priority) { + case 0: + return PRIORITY_LOW; + case 1: + return PRIORITY_HIGH; + default: + printf("Invalid DMA priority - must be low priority (0), high priority (1)"); + return -1; + } + return 0; } /*Function to validate and convert channel transfer direction for sl layer * usage*/ -static inline int siwx917_dma_transfer_direction(uint32_t dir) { - switch (dir) { - case 0: - return PERIPHERAL_REQUEST_DISABLE; // Memory to Memory transfer - case 1: - return PERIPHERAL_REQUEST_ENABLE; // Memory to Peripheral transfer - case 2: - return PERIPHERAL_REQUEST_ENABLE; // Peripheral to Memory transfer - default: - printf("Invalid Transfer direction - must be,\n \ +static inline int siwx917_dma_transfer_direction(uint32_t dir) +{ + switch (dir) { + case 0: + return PERIPHERAL_REQUEST_DISABLE; // Memory to Memory transfer + case 1: + return PERIPHERAL_REQUEST_ENABLE; // Memory to Peripheral transfer + case 2: + return PERIPHERAL_REQUEST_ENABLE; // Peripheral to Memory transfer + default: + printf("Invalid Transfer direction - must be,\n \ memory-memory (0)\n \ memory-peripheral (1)\n \ peripheral-memory (2)\n"); - return -1; - } - return 0; + return -1; + } + return 0; } /*Function to validate and convert channel data width for sl layer usage*/ -static inline int siwx917_dma_data_width(uint32_t data_width) { - switch (data_width) { - case 1: - return SL_TRANSFER_SIZE_8; // 8-bit width - case 2: - return SL_TRANSFER_SIZE_16; // 16-bit width - case 4: - return SL_TRANSFER_SIZE_32;

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drivers/dma/dma_silabs_siwx917.c:645 -#define DT_DRV_COMPAT silabs_siwx917_dma -#define DMA_PRIORITY_LOW 0 -#define DMA_PRIORITY_HIGH 1 +#define DT_DRV_COMPAT silabs_siwx917_dma +#define DMA_PRIORITY_LOW 0 +#define DMA_PRIORITY_HIGH 1 #define DMA_MAX_TRANSFER_COUNT 1024 -#define CHANNEL_12 12 -#define CHANNEL_32 32 -#define UDMA0_INSTANCE 0 -#define ULP_UDMA_INSTANCE 1 -#define PRIORITY_HIGH 1 -#define PRIORITY_LOW 0 -#define VALID_BURST_LENGTH 0 -#define UDMA_ADDR_INC_NONE 0X03 +#define CHANNEL_12 12 +#define CHANNEL_32 32 +#define UDMA0_INSTANCE 0 +#define ULP_UDMA_INSTANCE 1 +#define PRIORITY_HIGH 1 +#define PRIORITY_LOW 0 +#define VALID_BURST_LENGTH 0 +#define UDMA_ADDR_INC_NONE 0X03 LOG_MODULE_REGISTER(si91x_dma, CONFIG_DMA_LOG_LEVEL); -static RSI_UDMA_HANDLE_T - siwx917_udma_handle[2]; // Structure to store udma handles for UDMA0 and - // UDMA1(ULP_UDMA) +static RSI_UDMA_HANDLE_T siwx917_udma_handle[2]; // Structure to store udma handles for UDMA0 and + // UDMA1(ULP_UDMA) struct dma_siwx917_config { - UDMA0_Type *reg; // UDMA register base address - uint8_t channels; // UDMA channel count - void (*irq_configure)(void); // IRQ configure function + UDMA0_Type *reg; // UDMA register base address + uint8_t channels; // UDMA channel count + void (*irq_configure)(void); // IRQ configure function }; struct dma_siwx917_data { - UDMA_Channel_Info siwx917_udma_channel_info; // UDMA channel info - dma_callback_t dma_callback; // User callback - void *cb_data; // User callback data + UDMA_Channel_Info siwx917_udma_channel_info; // UDMA channel info + dma_callback_t dma_callback; // User callback + void *cb_data; // User callback data }; /*Function to validate and convert channel priority for sl layer usage*/ -static inline int siwx917_dma_priority(uint32_t priority) { - switch (priority) { - case 0: - return PRIORITY_LOW; - case 1: - return PRIORITY_HIGH; - default: - printf( - "Invalid DMA priority - must be low priority (0), high priority (1)"); - return -1; - } - return 0; +static inline int siwx917_dma_priority(uint32_t priority) +{ + switch (priority) { + case 0: + return PRIORITY_LOW; + case 1: + return PRIORITY_HIGH; + default: + printf("Invalid DMA priority - must be low priority (0), high priority (1)"); + return -1; + } + return 0; } /*Function to validate and convert channel transfer direction for sl layer * usage*/ -static inline int siwx917_dma_transfer_direction(uint32_t dir) { - switch (dir) { - case 0: - return PERIPHERAL_REQUEST_DISABLE; // Memory to Memory transfer - case 1: - return PERIPHERAL_REQUEST_ENABLE; // Memory to Peripheral transfer - case 2: - return PERIPHERAL_REQUEST_ENABLE; // Peripheral to Memory transfer - default: - printf("Invalid Transfer direction - must be,\n \ +static inline int siwx917_dma_transfer_direction(uint32_t dir) +{ + switch (dir) { + case 0: + return PERIPHERAL_REQUEST_DISABLE; // Memory to Memory transfer + case 1: + return PERIPHERAL_REQUEST_ENABLE; // Memory to Peripheral transfer + case 2: + return PERIPHERAL_REQUEST_ENABLE; // Peripheral to Memory transfer + default: + printf("Invalid Transfer direction - must be,\n \ memory-memory (0)\n \ memory-peripheral (1)\n \ peripheral-memory (2)\n"); - return -1; - } - return 0; + return -1; + } + return 0; } /*Function to validate and convert channel data width for sl layer usage*/ -static inline int siwx917_dma_data_width(uint32_t data_width) { - switch (data_width) { - case 1: - return SL_TRANSFER_SIZE_8; // 8-bit width - case 2: - return SL_TRANSFER_SIZE_16; // 16-bit width - case 4: - return SL_TRANSFER_SIZE_32; // 32-bit width - default: - printf("Invalid Source/Destination data size - must be,\n \ +static inline int s

tests/drivers/dma/udma_tests/src/main.c:8 -

tests/drivers/dma/udma_tests/src/test_dma.c:13 -#define BUFF_LENGTH1 100 -#define BUFF_LENGTH2 1500 +#define BUFF_LENGTH1 100 +#define BUFF_LENGTH2 1500

tests/drivers/dma/udma_tests/src/test_dma.c:34 -static void test_done(const struct device *dma_dev, void *arg, - uint32_t id, int status) +static void test_done(const struct device *dma_dev, void *arg, uint32_t id, int status)

tests/drivers/dma/udma_tests/src/test_dma.c:46 - struct dma_config dma_cfg = { 0 }; - struct dma_block_config dma_block_cfg = { 0 }; + struct dma_config dma_cfg = {0}; + struct dma_block_config dma_block_cfg = {0};

tests/drivers/dma/udma_tests/src/test_dma.c:56 - for(int i = 0;i < BUFF_LENGTH1;i++) - { - trx_buffer8_1[i] = (uint8_t)(i + 1); + for (int i = 0; i < BUFF_LENGTH1; i++) { + trx_buffer8_1[i] = (uint8_t)(i + 1);

tests/drivers/dma/udma_tests/src/test_dma.c:70 - TC_PRINT("Preparing DMA Controller: Name=%s, Chan_ID=%u, BURST_LEN=%u\n", - dma->name, chan_id, blen >> 3); + TC_PRINT("Preparing DMA Controller: Name=%s, Chan_ID=%u, BURST_LEN=%u\n", dma->name, + chan_id, blen >> 3);

tests/drivers/dma/udma_tests/src/test_dma.c:139 - int counter; - for(counter =0;counter<BUFF_LENGTH1;counter++){ - if(rrx_buffer8_1[counter] != trx_buffer8_1[counter]) { - TC_PRINT("Test case fail\n"); - break; - } - } - if(counter != BUFF_LENGTH1) { - return TC_FAIL; - } else { - TC_PRINT("Test case pass\n"); - return TC_PASS; + int counter; + for (counter = 0; counter < BUFF_LENGTH1; counter++) { + if (rrx_buffer8_1[counter] != trx_buffer8_1[counter]) { + TC_PRINT("Test case fail\n"); + break; + } + } + if (counter != BUFF_LENGTH1) { + return TC_FAIL; + } else { + TC_PRINT("Test case pass\n"); + return TC_PASS; } } static int test_task_reload8_2(const struct device *dma, uint32_t chan_id) { - for(int i = 0;i < BUFF_LENGTH2;i++) - { - trx_buffer8_2[i] = (uint8_t)(i + 1); + for (int i = 0; i < BUFF_LENGTH2; i++) { + trx_buffer8_2[i] = (uint8_t)(i + 1); } (void)memset(rrx_buffer8_2, 0, sizeof(rrx_buffer8_2)); TC_PRINT("Reloading DMA Controller with %d buffer size\n", BUFF_LENGTH2); TC_PRINT("Starting the transfer\n"); - if (dma_reload(dma, chan_id, (uint32_t)trx_buffer8_2, (uint32_t)rrx_buffer8_2, sizeof(trx_buffer8_2))) { - TC_PRINT("ERROR: transfer\n"); - return TC_FAIL; - } - if (dma_start(dma, chan_id)) { - TC_PRINT("ERROR: transfer\n"); - return TC_FAIL; - } - k_sleep(K_MSEC(2000)); - int counter; - for(counter =0;counter<BUFF_LENGTH2;counter++){ - if(rrx_buffer8_2[counter] != trx_buffer8_2[counter]) { - TC_PRINT("Test case fail\n"); - break; - } - } - if(counter != BUFF_LENGTH2) { - return TC_FAIL; - } else { - TC_PRINT("Test case pass\n"); - return TC_PASS; + if (dma_reload(dma, chan_id, (uint32_t)trx_buffer8_2, (uint32_t)rrx_buffer8_2, + sizeof(trx_buffer8_2))) { + TC_PRINT("ERROR: transfer\n"); + return TC_FAIL; + } + if (dma_start(dma, chan_id)) { + TC_PRINT("ERROR: transfer\n"); + return TC_FAIL; + } + k_sleep(K_MSEC(2000)); + int counter; + for (counter = 0; counter < BUFF_LENGTH2; counter++) { + if (rrx_buffer8_2[counter] != trx_buffer8_2[counter]) { + TC_PRINT("Test case fail\n"); + break; + } + } + if (counter != BUFF_LENGTH2) { + return TC_FAIL; + } else { + TC_PRINT("Test case pass\n"); + return TC_PASS; } } static int test_task16_1(const struct device *dma, uint32_t chan_id) { - struct dma_config dma_cfg = { 0 }; - struct dma_block_config dma_block_cfg = { 0 }; + struct dma_config dma_cfg = {0}; + struct dma_block_config dma_block_cfg = {0};

tests/drivers/dma/udma_tests/src/test_dma.c:149 - for(int i = 0;i < BUFF_LENGTH1;i++) - { - trx_buffer16_1[i] = (uint16_t)(i + 1); + for (int i = 0; i < BUFF_LENGTH1; i++) { + trx_buffer16_1[i] = (uint16_t)(i + 1);