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Implementing Input Effects
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@SagarDevAchar
SagarDevAchar authored Sep 2, 2024
1 parent c507239 commit 6ecf715
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Showing 5 changed files with 80 additions and 45 deletions.
16 changes: 11 additions & 5 deletions src/audio_engine.v
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Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,9 @@

module audio_engine(
output wire audio,
input wire clk, rst_n
input wire clk, rst_n,

input wire silence
);

localparam [6:0] NOTE_B1 = 7'd100;
Expand Down Expand Up @@ -88,17 +90,18 @@ module audio_engine(
end
endfunction

wire synth_clk, seq_clk, seq_active;
wire synth, synth_clk, seq_clk, seq_active;
reg [4:0] seq_ctr;
reg [6:0] seq_time;
wire [6:0] seq_hp;

reg [17:0] counter;
always @(posedge clk, negedge rst_n) begin
if (~rst_n)
counter <= 18'd0;
counter <= 18'd0;
else
counter <= counter + 1;
if (~silence)
counter <= counter + 1;
end

assign synth_clk = counter[10];
Expand All @@ -111,6 +114,7 @@ module audio_engine(
seq_time <= 7'd0;
en_seq_clk <= 1'b1;
end else begin

if (en_seq_clk) begin
if (seq_clk) begin
en_seq_clk <= 1'b0;
Expand All @@ -131,11 +135,13 @@ module audio_engine(
assign seq_active = seq_ctr < 5'd10;

freq_synth freq_synth1 (
.audio(audio),
.audio(synth),
.synth_clk(synth_clk),
.clk(clk), .rst_n(rst_n),
.hp(seq_hp),
.active(seq_active)
);

assign audio = synth & ~silence;

endmodule
2 changes: 0 additions & 2 deletions src/freq_synth.v
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Original file line number Diff line number Diff line change
Expand Up @@ -31,8 +31,6 @@ module freq_synth(
if (~synth_clk)
en_synth_clk <= 1'b1;
end


end
end

Expand Down
72 changes: 46 additions & 26 deletions src/graphics_engine.v
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Original file line number Diff line number Diff line change
Expand Up @@ -5,13 +5,26 @@ module graphics_engine(
input wire [9:0] x,
input wire [8:0] y,
input wire frame_active, v_sync,
input wire clk, rst_n
input wire clk, rst_n,

input wire [6:0] video_modes
);

wire [5:0] sine_off_y, sine_bg_off_y;

wire [5:0] overlay_rgb, sine_rgb, sine_bg_rgb, sine_rgb_dither, sine_bg_rgb_dither;
wire overlay_active, overlay_text_active, sine_active, sine_bg_active;

wire mode_toggle_animation = video_modes[6];
wire mode_toggle_daynight = video_modes[5];
wire mode_toggle_text_style = video_modes[4]; // TODO: Implement this
wire mode_toggle_overlay = video_modes[3];
wire mode_toggle_big_sine = video_modes[2];
wire mode_toggle_little_sine = video_modes[1];
wire mode_negative = video_modes[0];

wire [5:0] bg_rgb = {6{mode_toggle_daynight}};
wire [5:0] fg_rgb = ~bg_rgb;

reg [9:0] ctr;
wire [9:0] anim_x, anim_2x;
Expand All @@ -22,17 +35,18 @@ module graphics_engine(
ctr <= 10'd0;
en_v_sync <= 1'b1;
end else begin
if (en_v_sync) begin
if (v_sync) begin
en_v_sync <= 1'b0;
ctr <= ctr + 1'd1;
end
end else begin
if (~v_sync)
en_v_sync <= 1'b1;
if (~mode_toggle_animation) begin
if (en_v_sync) begin
if (v_sync) begin
en_v_sync <= 1'b0;
ctr <= ctr + 1'd1;
end
end else begin
if (~v_sync)
en_v_sync <= 1'b1;
end
end
end

end
end

assign anim_x = x + ctr;
Expand All @@ -49,32 +63,38 @@ module graphics_engine(
sine_layer sine_layer1 (
.sine_rgb(sine_rgb),
.x(anim_x[8:3]),
.y(sine_off_y[4:0])
.y(sine_off_y[4:0]),

.daynight(mode_toggle_daynight)
);

sine_layer sine_layer2 (
.sine_rgb(sine_bg_rgb),
.x(anim_2x[7:2]),
.y(sine_bg_off_y[4:0])
.y(sine_bg_off_y[4:0]),

.daynight(mode_toggle_daynight)
);

assign overlay_rgb = overlay_active ? {
{overlay_text_active, ctr[7], overlay_text_active, ctr[6], overlay_text_active, ctr[5]}
} : 6'b00_00_00;
assign overlay_rgb = overlay_active ? (
(mode_toggle_daynight ^ &ctr[7:5]) ? (
{ctr[7], overlay_text_active, ctr[6], overlay_text_active, ctr[5], overlay_text_active}
) : {overlay_text_active, ctr[7], overlay_text_active, ctr[6], overlay_text_active, ctr[5]}
) : bg_rgb;

assign sine_rgb_dither = sine_rgb & {6{(x[0] ^ y[0])}};
assign sine_bg_rgb_dither = sine_bg_rgb & {6{(x[0] & y[0])}};
assign sine_rgb_dither = mode_toggle_daynight ? sine_rgb | {6{(x[0] & y[0])}} : sine_rgb & {6{(x[0] | y[0])}};
assign sine_bg_rgb_dither = mode_toggle_daynight ? sine_bg_rgb | {6{(x[0] | y[0])}} : sine_bg_rgb & {6{(x[0] & y[0])}};

assign sine_active = |sine_rgb_dither;
assign sine_bg_active = |sine_bg_rgb_dither;
assign sine_active = (mode_toggle_daynight ? ~&sine_rgb_dither : |sine_rgb_dither) & ~mode_toggle_big_sine;
assign sine_bg_active = (mode_toggle_daynight ? ~&sine_bg_rgb_dither : |sine_bg_rgb_dither) & ~mode_toggle_little_sine;

assign {r, g, b} = frame_active ? (
overlay_active ? overlay_rgb : (
assign {r, g, b} = (frame_active ? (
(overlay_active & ~mode_toggle_overlay) ? overlay_rgb : (
sine_active ? sine_rgb_dither : (
sine_bg_active ? sine_bg_rgb_dither : 6'b00_00_00
sine_bg_active ? sine_bg_rgb_dither : bg_rgb
)
)
) : 6'b00_00_00;
) ^ {6{mode_negative}} : 6'b00_00_00);

wire _unused = &{sine_off_y[5], sine_bg_off_y[5], anim_x[9], anim_x[2:0], anim_2x[9:8], anim_2x[1:0]};
endmodule
wire _unused = &{sine_off_y[5], sine_bg_off_y[5], anim_x[9], anim_x[2:0], anim_2x[9:8], anim_2x[1:0], mode_toggle_text_style};
endmodule
23 changes: 14 additions & 9 deletions src/sine_layer.v
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Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,9 @@
module sine_layer (
output reg [5:0] sine_rgb,
input wire [5:0] x,
input wire [4:0] y
input wire [4:0] y,

input wire daynight
);

localparam [15:0] qsine_line00 = 16'b1100000000000000;
Expand All @@ -17,6 +19,9 @@ module sine_layer (
localparam [15:0] qsine_line08 = 16'b0000000000000100;
localparam [15:0] qsine_line09 = 16'b0000000000000010;
localparam [15:0] qsine_line10 = 16'b0000000000000001;

wire [5:0] bg_rgb = {6{daynight}};
// wire [5:0] fg_rgb = ~bg_rgb;

function [3:0] sub_floor(input [3:0] a, b);
sub_floor = (a < b) ? 4'd0 : (a - b);
Expand All @@ -39,10 +44,10 @@ module sine_layer (
begin
if (inverted) begin
if (qsine_off_x[4])
qsine_colour = 6'b00_00_00;
qsine_colour = bg_rgb;
else begin
if (qsine_off_x[3])
qsine_colour = 6'b00_00_00;
qsine_colour = bg_rgb;
else begin
if (line[qsine_flip_x[3:0] + 4'd1])
qsine_colour = 6'b11_00_00;
Expand All @@ -59,13 +64,13 @@ module sine_layer (
else if (line[qsine_flip_x[3:0] + 4'd7])
qsine_colour = 6'b10_00_11;
else
qsine_colour = 6'b00_00_00;
qsine_colour = bg_rgb;
end
end
end else begin
if (qsine_off_x[4]) begin
if (line[qsine_flip_x[3:0]])
qsine_colour = 6'b11_11_11;
qsine_colour = fg_rgb;
else if (line[add_ceil(qsine_flip_x[3:0], 4'd1)])
qsine_colour = 6'b11_00_00;
else if (line[add_ceil(qsine_flip_x[3:0], 4'd2)])
Expand All @@ -81,10 +86,10 @@ module sine_layer (
else if (line[add_ceil(qsine_flip_x[3:0], 4'd7)])
qsine_colour = 6'b10_00_11;
else
qsine_colour = 6'b00_00_00;
qsine_colour = bg_rgb;
end else begin
if (line[qsine_off_x[3:0]])
qsine_colour = 6'b11_11_11;
qsine_colour = fg_rgb;
else if (line[sub_floor(qsine_off_x[3:0], 4'd1)])
qsine_colour = 6'b11_00_00;
else if (line[sub_floor(qsine_off_x[3:0], 4'd2)])
Expand All @@ -100,7 +105,7 @@ module sine_layer (
else if (line[sub_floor(qsine_off_x[3:0], 4'd7)])
qsine_colour = 6'b10_00_11;
else
qsine_colour = 6'b00_00_00;
qsine_colour = bg_rgb;
end
end
end
Expand Down Expand Up @@ -136,7 +141,7 @@ module sine_layer (
5'h10: sine_rgb = qsine_colour(qsine_line05, 1'd1);
5'h11: sine_rgb = qsine_colour(qsine_line04, 1'd1);
5'h12: sine_rgb = qsine_colour(qsine_line03, 1'd1);
default: sine_rgb = 6'b00_00_00;
default: sine_rgb = bg_rgb;
endcase
end

Expand Down
12 changes: 9 additions & 3 deletions src/tt_um_demosiine_sda.v
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Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,8 @@ module tt_um_demosiine_sda (
wire [9:0] x, y;
wire h_sync, v_sync;
wire frame_active;

wire mode_toggle_audio = ui_in[7];

vga_controller vga_controller_1 (
.x(x), .y(y),
Expand All @@ -34,12 +36,16 @@ module tt_um_demosiine_sda (
.r(r), .g(g), .b(b),
.x(x), .y(y[8:0]),
.frame_active(frame_active), .v_sync(v_sync),
.clk(clk), .rst_n(rst_n)
.clk(clk), .rst_n(rst_n),

.video_modes({ui_in[6:0]})
);

audio_engine audio_engine_1 (
.audio(audio),
.clk(clk), .rst_n(rst_n)
.clk(clk), .rst_n(rst_n),

.silence(mode_toggle_audio)
);

// All output pins must be assigned. If not used, assign to 0.
Expand All @@ -50,5 +56,5 @@ module tt_um_demosiine_sda (
assign uio_out = {audio, 7'd0};
assign uio_oe = 8'b1000_0000;

wire _unused = &{ena, ui_in, uio_in, y[9]};
wire _unused = &{ena, uio_in, y[9]};
endmodule

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