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Fixed some of the build scripts for use with the dockerfile. Also mad…
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…e changes to the dockerfile so that it now builds in a single step.
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Shane Fleming authored and Shane Fleming committed Jun 6, 2016
1 parent 6f53d57 commit c2d7431
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Showing 15 changed files with 25 additions and 16 deletions.
1 change: 1 addition & 0 deletions Dockerfile
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Expand Up @@ -70,6 +70,7 @@ RUN echo "echo \" |\_________\ \|__| \|__| \|__| \|_______|\|__|\|__|\|
RUN echo "echo \" \|_________| \"" >> /home/stitchup/.bashrc

USER root
RUN apt-get -y install doxygen
RUN apt-get -y install software-properties-common
RUN add-apt-repository -y ppa:ubuntu-toolchain-r/test
RUN apt-get -y update
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14 changes: 11 additions & 3 deletions README.txt
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Expand Up @@ -11,17 +11,25 @@ StitchUp is a plugin to the LegUp High Level Synthesis tool that enables the gen

Verison 1.0 : release date 06/06/2016

##Docker file
-------------- Docker file ---------------------
The fastest way to get up and running with StitchUp is to use docker.
Make sure Docker is installed on your machine and type the following commands in the root directory of the project.

docker build -t "stitchup_container" .
docker run -ti stitchup_container /bin/bash

This will setup a container, install all the legup & stitchup required dependencies, builds legup, and patches in stitchup and builds it.
This will setup a container, install all the legup & stitchup required dependencies, download legup, build legup, and patch in stitchup.

--------------- Running example builds ---------------------------

##Running example builds
Examples are contained in the directory examples/.
To build one of the examples navigate to that directory and type make.

In the docker image the examples build a verilog file of the StitchUp protected circuit and an AXI wrapper for instantiating them in a Xilinx device.
The build script does not wrap all the components into an IP core for use in Vivado, however this is possible if the Xilinx build tools are installed.


--------------- Contact and about -------------------------
Any queries about using the tool feel free to contact me at: [email protected]
Written by, Shane T. Fleming.

2 changes: 1 addition & 1 deletion config/legup.tcl
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Expand Up @@ -100,7 +100,7 @@ set_parameter LOCAL_RAMS 1
# Note: inferred RAMs don't support structs (no byte-enable) so having
# structs in your program forces this parameter to turn off
set_parameter INFERRED_RAMS 1
#set_parameter INFERRED_RAM_FORMAT "xilinx"
set_parameter INFERRED_RAM_FORMAT "xilinx"

# Place constant arrays into RAMs instead of the default read-only memory
#set_parameter NO_ROMS 1
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2 changes: 1 addition & 1 deletion examples/chstone/adpcm/build
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Expand Up @@ -12,5 +12,5 @@ rm adpcm.renamed.stitchedup.v
make adpcm.wrapper.v
make adpcm_tb.v
#./runVsim
make adpcm.ipcore
#make adpcm.ipcore
#make adpcm.system.bit
2 changes: 1 addition & 1 deletion examples/chstone/aes/build
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Expand Up @@ -12,5 +12,5 @@ rm aes.renamed.stitchedup.v
make aes.wrapper.v
make aes_tb.v
#./runVsim
make aes.ipcore
#make aes.ipcore
#make aes.system.bit
2 changes: 1 addition & 1 deletion examples/chstone/blowfish/build
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Expand Up @@ -12,4 +12,4 @@ rm bf.renamed.stitchedup.v
make bf.wrapper.v
make bf_tb.v
#./runVsim
make bf.ipcore
#make bf.ipcore
2 changes: 1 addition & 1 deletion examples/chstone/dfadd/build
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Expand Up @@ -12,5 +12,5 @@ rm dfadd.renamed.stitchedup.v
make dfadd.wrapper.v
make dfadd_tb.v
#./runVsim
make dfadd.ipcore
#make dfadd.ipcore
#make dfadd.system.bit
2 changes: 1 addition & 1 deletion examples/chstone/dfdiv/build
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Expand Up @@ -12,4 +12,4 @@ rm dfdiv.renamed.stitchedup.v
make dfdiv.wrapper.v
make dfdiv_tb.v
#./runVsim
make dfdiv.ipcore
#make dfdiv.ipcore
2 changes: 1 addition & 1 deletion examples/chstone/dfmul/build
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Expand Up @@ -12,4 +12,4 @@ rm dfmul.renamed.stitchedup.v
make dfmul.wrapper.v
make dfmul_tb.v
#./runVsim
make dfmul.ipcore
#make dfmul.ipcore
2 changes: 1 addition & 1 deletion examples/chstone/dfsin/build
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Expand Up @@ -12,4 +12,4 @@ rm dfsin.renamed.stitchedup.v
make dfsin.wrapper.v
make dfsin_tb.v
#./runVsim
make dfsin.ipcore
#make dfsin.ipcore
2 changes: 1 addition & 1 deletion examples/chstone/gsm/build
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Expand Up @@ -12,4 +12,4 @@ rm gsm.renamed.stitchedup.v
make gsm.wrapper.v
make gsm_tb.v
#./runVsim
make gsm.ipcore
#make gsm.ipcore
2 changes: 1 addition & 1 deletion examples/chstone/jpeg/build
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Expand Up @@ -13,4 +13,4 @@ rm main.renamed.stitchedup.v
make main.wrapper.v
make main_tb.v
#./runVsim
make main.ipcore
#make main.ipcore
2 changes: 1 addition & 1 deletion examples/chstone/mips/build
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Expand Up @@ -12,4 +12,4 @@ rm mips.renamed.stitchedup.v
make mips.wrapper.v
make mips_tb.v
./runVsim
make mips.ipcore
#make mips.ipcore
2 changes: 1 addition & 1 deletion examples/chstone/motion/build
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Expand Up @@ -12,4 +12,4 @@ rm mpeg2.renamed.stitchedup.v
make mpeg2.wrapper.v
make mpeg2_tb.v
#./runVsim
make mpeg2.ipcore
#make mpeg2.ipcore
2 changes: 1 addition & 1 deletion examples/chstone/sha/build
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Expand Up @@ -12,4 +12,4 @@ rm sha_driver.renamed.stitchedup.v
make sha_driver.wrapper.v
make sha_driver_tb.v
#./runVsim
make sha_driver.ipcore
#make sha_driver.ipcore

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