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[AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (llvm#…
…82378) The patch complements llvm#68919 and adds AArch64 support for builtin `__builtin_cpu_supports("feature1+...+featureN")` which return true if all specified CPU features in argument are detected. Also compiler-rt aarch64 native run tests for features detection mechanism were added and 'cpu_model' check was fixed after its refactor merged llvm#75635 Original RFC was https://reviews.llvm.org/D153153
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -emit-llvm -o - %s | FileCheck %s | ||
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int check_all_feature() { | ||
if (__builtin_cpu_supports("rng+flagm+flagm2+fp16fml+dotprod+sm4")) | ||
return 1; | ||
else if (__builtin_cpu_supports("rdm+lse+fp+simd+crc+sha1+sha2+sha3")) | ||
return 2; | ||
else if (__builtin_cpu_supports("aes+pmull+fp16+dit+dpb+dpb2+jscvt")) | ||
return 3; | ||
else if (__builtin_cpu_supports("fcma+rcpc+rcpc2+rcpc3+frintts+dgh")) | ||
return 4; | ||
else if (__builtin_cpu_supports("i8mm+bf16+ebf16+rpres+sve+sve-bf16")) | ||
return 5; | ||
else if (__builtin_cpu_supports("sve-ebf16+sve-i8mm+f32mm+f64mm")) | ||
return 6; | ||
else if (__builtin_cpu_supports("sve2+sve2-aes+sve2-pmull128")) | ||
return 7; | ||
else if (__builtin_cpu_supports("sve2-bitperm+sve2-sha3+sve2-sm4")) | ||
return 8; | ||
else if (__builtin_cpu_supports("sme+memtag+memtag2+memtag3+sb")) | ||
return 9; | ||
else if (__builtin_cpu_supports("predres+ssbs+ssbs2+bti+ls64+ls64_v")) | ||
return 10; | ||
else if (__builtin_cpu_supports("ls64_accdata+wfxt+sme-f64f64")) | ||
return 11; | ||
else if (__builtin_cpu_supports("sme-i16i64+sme2")) | ||
return 12; | ||
else | ||
return 0; | ||
} | ||
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// CHECK-LABEL: define dso_local i32 @neon_code() #1 | ||
int __attribute__((target("simd"))) neon_code() { return 1; } | ||
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// CHECK-LABEL: define dso_local i32 @sve_code() #2 | ||
int __attribute__((target("sve"))) sve_code() { return 2; } | ||
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// CHECK-LABEL: define dso_local i32 @code() #0 | ||
int code() { return 3; } | ||
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// CHECK-LABEL: define dso_local i32 @test_versions() #0 | ||
int test_versions() { | ||
if (__builtin_cpu_supports("sve")) | ||
return sve_code(); | ||
else if (__builtin_cpu_supports("simd")) | ||
return neon_code(); | ||
else | ||
return code(); | ||
} | ||
// CHECK: attributes #0 = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" } | ||
// CHECK: attributes #1 = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+neon" } | ||
// CHECK: attributes #2 = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon,+sve" } |
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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals --version 2 | ||
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -emit-llvm -o - %s | FileCheck %s | ||
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// CHECK: @__aarch64_cpu_features = external dso_local global { i64 } | ||
// CHECK-LABEL: define dso_local i32 @main | ||
// CHECK-SAME: () #[[ATTR0:[0-9]+]] { | ||
// CHECK-NEXT: entry: | ||
// CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 | ||
// CHECK-NEXT: store i32 0, ptr [[RETVAL]], align 4 | ||
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8 | ||
// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 70368744177664 | ||
// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 70368744177664 | ||
// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]] | ||
// CHECK-NEXT: br i1 [[TMP3]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] | ||
// CHECK: if.then: | ||
// CHECK-NEXT: store i32 1, ptr [[RETVAL]], align 4 | ||
// CHECK-NEXT: br label [[RETURN:%.*]] | ||
// CHECK: if.end: | ||
// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8 | ||
// CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 9070970929152 | ||
// CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 9070970929152 | ||
// CHECK-NEXT: [[TMP7:%.*]] = and i1 true, [[TMP6]] | ||
// CHECK-NEXT: br i1 [[TMP7]], label [[IF_THEN1:%.*]], label [[IF_END2:%.*]] | ||
// CHECK: if.then1: | ||
// CHECK-NEXT: store i32 2, ptr [[RETVAL]], align 4 | ||
// CHECK-NEXT: br label [[RETURN]] | ||
// CHECK: if.end2: | ||
// CHECK-NEXT: [[TMP8:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8 | ||
// CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], 166633186212708352 | ||
// CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 166633186212708352 | ||
// CHECK-NEXT: [[TMP11:%.*]] = and i1 true, [[TMP10]] | ||
// CHECK-NEXT: br i1 [[TMP11]], label [[IF_THEN3:%.*]], label [[IF_END4:%.*]] | ||
// CHECK: if.then3: | ||
// CHECK-NEXT: store i32 3, ptr [[RETVAL]], align 4 | ||
// CHECK-NEXT: br label [[RETURN]] | ||
// CHECK: if.end4: | ||
// CHECK-NEXT: store i32 0, ptr [[RETVAL]], align 4 | ||
// CHECK-NEXT: br label [[RETURN]] | ||
// CHECK: return: | ||
// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[RETVAL]], align 4 | ||
// CHECK-NEXT: ret i32 [[TMP12]] | ||
// | ||
int main(void) { | ||
if (__builtin_cpu_supports("sb")) | ||
return 1; | ||
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if (__builtin_cpu_supports("sve2-pmull128+memtag")) | ||
return 2; | ||
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if (__builtin_cpu_supports("sme2+ls64_v+wfxt")) | ||
return 3; | ||
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return 0; | ||
} |
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// RUN: %clang_cc1 -fsyntax-only -triple aarch64-linux-gnu -verify %s | ||
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int test_aarch64_features(void) { | ||
char * ssbs2; | ||
// expected-error@+1 {{expression is not a string literal}} | ||
if (__builtin_cpu_supports(ssbs2)) | ||
return 1; | ||
// expected-error@+1 {{invalid cpu feature string}} | ||
if (__builtin_cpu_supports("")) | ||
return 2; | ||
// expected-error@+1 {{invalid cpu feature string}} | ||
if (__builtin_cpu_supports("pmull128")) | ||
return 3; | ||
// expected-error@+1 {{invalid cpu feature string}} | ||
if (__builtin_cpu_supports("sve2,rpres")) | ||
return 4; | ||
// expected-error@+1 {{invalid cpu feature string}} | ||
if (__builtin_cpu_supports("dgh+sve2-pmull")) | ||
return 5; | ||
// expected-error@+1 {{invalid cpu feature string}} | ||
if (__builtin_cpu_supports("default")) | ||
return 6; | ||
if (__builtin_cpu_supports(" ssbs + bti ")) | ||
return 7; | ||
return 0; | ||
} |
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17 changes: 17 additions & 0 deletions
17
compiler-rt/test/builtins/Unit/aarch64_cpu_features_test.c
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// REQUIRES: aarch64-target-arch | ||
// REQUIRES: native-run | ||
// RUN: %clang_builtins %s %librt -o %t && %run %t | ||
// REQUIRES: librt_has_aarch64 | ||
int main(void) { | ||
if (__builtin_cpu_supports("fp+simd+pmull+sha2+crc")) { | ||
if (__builtin_cpu_supports("fp") && __builtin_cpu_supports("simd") && | ||
__builtin_cpu_supports("pmull") && __builtin_cpu_supports("sha2") && | ||
__builtin_cpu_supports("crc")) { | ||
return 0; | ||
} else { | ||
// Something wrong in feature detection | ||
return 1; | ||
} | ||
} | ||
return 0; | ||
} |
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