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neon60 committed Sep 27, 2024
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13 changes: 4 additions & 9 deletions docs/how-to/hip_runtime_api/memory_management.rst
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Expand Up @@ -16,11 +16,6 @@ its own distinct memory. Kernels execute mainly on device memory, the runtime
offers functions for allocating, deallocating, and copying device memory, along
with transferring data between host and device memory.

For traditional device memory management, HIP uses the C-style functions
:cpp:func:`hipMalloc` for allocating and :cpp:func:`hipFree` for freeing memory.
There are advanced features like managed memory, virtual memory or stream
ordered memory allocator which are described in subsections.

Host Memory
================================================================================

Expand All @@ -47,7 +42,7 @@ highlighted at the following figure.

.. figure:: ../../data/how-to/hip_runtime_api/memory_management/unified_memory/um.svg

The unified memory management described at the :doc:`how-to/hip_runtime_api/memory_management/unified_memory`.
The unified memory management described at the :doc:`/how-to/hip_runtime_api/memory_management/unified_memory`.

Pageable memory
--------------------------------------------------------------------------------
Expand Down Expand Up @@ -122,7 +117,7 @@ CPU-CPU interconnect, thereby increasing latency and potentially decreasing
bandwidth.

Advantage of pinned memory is the improved transfer times between host and
device. For transfer operations, such as ``hipMemcpy`` or ``hipMemcpyAsync``,
device. For transfer operations, such as :cpp:func:`hipMemcpy` or :cpp:func:`hipMemcpyAsync`,
using pinned memory instead of pageable memory on host can lead to a ~3x
improvement in bandwidth.

Expand Down Expand Up @@ -188,7 +183,7 @@ For further details, check :ref:`coherency_controls`.

.. _memory_allocation_flags:

Memory allocation flags of hipHostMalloc
Memory allocation flags of pinned memory
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

The ``hipHostMalloc`` flags specify different memory allocation types for pinned
Expand Down Expand Up @@ -310,7 +305,7 @@ Non-coherent
- no

``hipEventSynchronize``
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""

Developers can control the release scope for :cpp:func:`hipEvents`:

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Expand Up @@ -7,7 +7,7 @@
Texture fetching
*******************************************************************************

`Textures <../doxygen/html/group___texture.html>`_ are more than just a buffer
`Textures <../../../doxygen/html/group___texture.html>`_ are more than just a buffer
interpreted as a 1D, 2D, or 3D array.

As textures are associated with graphics, they are indexed using floating-point
Expand All @@ -32,7 +32,7 @@ sections.
Here is the sample texture used in this document for demonstration purposes. It
is 2x2 texels and indexed in the [0 to 1] range.

.. figure:: ../data/understand/textures/original.png
.. figure:: ../../../data/how-to/hip_runtime_api/memory_management/textures/original.png
:width: 150
:alt: Sample texture
:align: center
Expand Down Expand Up @@ -66,7 +66,7 @@ The following image shows a texture stretched to a 4x4 pixel quad but still
indexed in the [0 to 1] range. The in-between values are the same as the values
of the nearest texel.

.. figure:: ../data/understand/textures/nearest.png
.. figure:: ../../../data/how-to/hip_runtime_api/memory_management/textures/nearest.png
:width: 300
:alt: Texture upscaled with nearest point sampling
:align: center
Expand Down Expand Up @@ -97,7 +97,7 @@ This following image shows a texture stretched out to a 4x4 pixel quad, but
still indexed in the [0 to 1] range. The in-between values are interpolated
between the neighboring texels.

.. figure:: ../data/understand/textures/linear.png
.. figure:: ../../../data/how-to/hip_runtime_api/memory_management/textures/linear.png
:width: 300
:alt: Texture upscaled with linear filtering
:align: center
Expand All @@ -124,7 +124,7 @@ bounds. The border value must be set before texture fetching.
The following image shows the texture on a 4x4 pixel quad, indexed in the
[0 to 3] range. The out-of-bounds values are the border color, which is yellow.

.. figure:: ../data/understand/textures/border.png
.. figure:: ../../../data/how-to/hip_runtime_api/memory_management/textures/border.png
:width: 300
:alt: Texture with yellow border color
:align: center
Expand All @@ -147,7 +147,7 @@ The following image shows the texture on a 4x4 pixel quad, indexed in the
[0 to 3] range. The out-of-bounds values are repeating the values at the edge of
the texture.

.. figure:: ../data/understand/textures/clamp.png
.. figure:: ../../../data/how-to/hip_runtime_api/memory_management/textures/clamp.png
:width: 300
:alt: Texture with clamp addressing
:align: center
Expand All @@ -172,7 +172,7 @@ This creates a repeating image effect.
The following image shows the texture on a 4x4 pixel quad, indexed in the
[0 to 3] range. The out-of-bounds values are repeating the original texture.

.. figure:: ../data/understand/textures/wrap.png
.. figure:: ../../../data/how-to/hip_runtime_api/memory_management/textures/wrap.png
:width: 300
:alt: Texture with wrap addressing
:align: center
Expand Down Expand Up @@ -201,7 +201,7 @@ The following image shows the texture on a 4x4 pixel quad, indexed in The
[0 to 3] range. The out-of-bounds values are repeating the original texture, but
mirrored.

.. figure:: ../data/understand/textures/mirror.png
.. figure:: ../../../data/how-to/hip_runtime_api/memory_management/textures/mirror.png
:width: 300
:alt: Texture with mirror addressing
:align: center
Expand Down
1 change: 0 additions & 1 deletion docs/index.md
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Expand Up @@ -33,7 +33,6 @@ On non-AMD platforms, like NVIDIA, HIP provides header files required to support
* {doc}`./understand/hardware_implementation`
* {doc}`./understand/amd_clr`
* {doc}`./understand/compilers`
* {doc}`./understand/texture_fetching`

:::

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3 changes: 1 addition & 2 deletions docs/sphinx/_toc.yml.in
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Expand Up @@ -19,8 +19,6 @@ subtrees:
- file: understand/hardware_implementation
- file: understand/amd_clr
- file: understand/compilers
- file: understand/texture_fetching
title: Texture fetching

- caption: How to
entries:
Expand All @@ -32,6 +30,7 @@ subtrees:
- entries:
- file: how-to/hip_runtime_api/memory_management/unified_memory
- file: how-to/hip_runtime_api/memory_management/virtual_memory
- file: how-to/hip_runtime_api/memory_management/texture_fetching
- file: how-to/hip_runtime_api/cooperative_groups
- file: how-to/hip_porting_guide
- file: how-to/hip_porting_driver_api
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2 changes: 1 addition & 1 deletion docs/understand/programming_model.rst
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Expand Up @@ -225,7 +225,7 @@ better than the defaults defined by the hardware.
The implicit groups defined by kernel launch parameters are still available
when working with cooperative groups.

For further information, see :doc:`Cooperative groups <./how-to/hip_runtime_api/cooperative_groups>`.
For further information, see :doc:`Cooperative groups </how-to/hip_runtime_api/cooperative_groups>`.

Memory model
============
Expand Down

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