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makefiles: change RISC-V GCC -march to rv32imac_zicsr #20754

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19 changes: 4 additions & 15 deletions makefiles/arch/riscv.inc.mk
Original file line number Diff line number Diff line change
Expand Up @@ -45,22 +45,11 @@ ifeq (,$(TARGET_ARCH))
$(error No RISC-V toolchain detected. Make sure a RISC-V toolchain is installed.)
endif

ifeq ($(TOOLCHAIN),gnu)
GCC_DEFAULTS_TO_NEW_RISCV_ISA ?= $(shell echo "typedef int dont_be_pedantic;" | $(TARGET_ARCH)-gcc -march=rv32imac -mabi=ilp32 -misa-spec=2.2 -E - > /dev/null 2>&1 && echo 1 || echo 0)
endif

GCC_DEFAULTS_TO_NEW_RISCV_ISA ?= 0

CFLAGS_CPU := -march=rv32imac -mabi=ilp32
CFLAGS_CPU := -march=rv32imac_zicsr -mabi=ilp32

# Since RISC-V ISA specifications 20191213 instructions previously included in
# rv32imac have been moved to the ZICSR extension. See
# https://riscv.org/wp-content/uploads/2019/12/riscv-spec-20191213.pdf
#
# Select the oldest ISA spec in which ZICSR was not yet split out into an
# extension
ifeq (1,$(GCC_DEFAULTS_TO_NEW_RISCV_ISA))
CFLAGS_CPU += -misa-spec=2.2
# LLVM<17 does not support Zicsr extension in ISA-string
ifeq ($(TOOLCHAIN),llvm)
CFLAGS_CPU := -march=rv32imac -mabi=ilp32
endif

# Always use riscv32-none-elf as target triple for clang, as some
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4 changes: 3 additions & 1 deletion makefiles/cargo-targets.inc.mk
Original file line number Diff line number Diff line change
Expand Up @@ -39,7 +39,9 @@ $(CARGO_COMPILE_COMMANDS): $(BUILDDEPS)
-e 's/"riscv64-elf"/"riscv32"/g' \
| $(LAZYSPONGE) $@


# LLVM<17 does not support RISC-V Zicsr extension in ISA-string, so it must
# be removed when Rust is used with TOOLCHAIN=gnu
$(CARGO_LIB): CFLAGS := $(subst -march=rv32imac_zicsr,-march=rv32imac,$(CFLAGS))
$(CARGO_LIB): $(RIOTBUILD_CONFIG_HEADER_C) $(BUILDDEPS) $(CARGO_COMPILE_COMMANDS) FORCE
@command -v cargo >/dev/null || ($(COLOR_ECHO) \
'$(COLOR_RED)Error: `cargo` command missing to build Rust modules.$(COLOR_RESET) Please install as described on <https://doc.riot-os.org/using-rust.html>.' ;\
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