Skip to content

Commit

Permalink
Merge pull request LibreELEC#7333 from jernejsk/opi3-lts
Browse files Browse the repository at this point in the history 
Allwinner: Add OrangePi 3 LTS support
  • Loading branch information
@CvH
CvH authored Jan 2, 2023
2 parents a00cf65 + 1bd87f7 commit 2cfb343
Show file tree
Hide file tree
Showing 4 changed files with 215 additions and 1 deletion.
2 changes: 1 addition & 1 deletion projects/Allwinner/linux/linux.aarch64.conf
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1968,7 +1968,7 @@ CONFIG_MICREL_PHY=y
CONFIG_MICROCHIP_PHY=m
# CONFIG_MICROCHIP_T1_PHY is not set
# CONFIG_MICROSEMI_PHY is not set
# CONFIG_MOTORCOMM_PHY is not set
CONFIG_MOTORCOMM_PHY=y
# CONFIG_NATIONAL_PHY is not set
# CONFIG_NXP_C45_TJA11XX_PHY is not set
# CONFIG_NXP_TJA11XX_PHY is not set
Expand Down
150 changes: 150 additions & 0 deletions projects/Allwinner/patches/linux/0076-net-phy-add-support-for-motorcomm-yt8531c-phy.patch
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,150 @@
From git@z Thu Jan 1 00:00:00 1970
Subject: [PATCH] net: phy: add support for Motorcomm yt8531C phy
From: Peter Geis <[email protected]>
Date: Sun, 09 Oct 2022 22:24:05 +0300
Message-Id: <[email protected]>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 7bit

This patch adds support for Motorcomm YT8531C which is
used in OrangePi 3 LTS, OrangePi 4 LTS and OrangePi 800
Currently being used by Manjaro Arm kernel

Signed-off-by: Peter Geis <[email protected]>
Signed-off-by: Furkan Kardame <[email protected]>
---
drivers/net/phy/motorcomm.c | 90 +++++++++++++++++++++++++++++++++++++
1 file changed, 90 insertions(+)

diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c
index 7e6ac2c5e..cbc8ef15d 100644
--- a/drivers/net/phy/motorcomm.c
+++ b/drivers/net/phy/motorcomm.c
@@ -10,6 +10,7 @@
#include <linux/phy.h>

#define PHY_ID_YT8511 0x0000010a
+#define PHY_ID_YT8531 0x4f51e91b

#define YT8511_PAGE_SELECT 0x1e
#define YT8511_PAGE 0x1f
@@ -38,6 +39,38 @@
#define YT8511_DELAY_FE_TX_EN (0xf << 12)
#define YT8511_DELAY_FE_TX_DIS (0x2 << 12)

+#define YT8531_RGMII_CONFIG1 0xa003
+
+/* TX Gig-E Delay is bits 3:0, default 0x1
+ * TX Fast-E Delay is bits 7:4, default 0xf
+ * RX Delay is bits 13:10, default 0x0
+ * Delay = 150ps * N
+ * On = 2000ps, off = 50ps
+ */
+#define YT8531_DELAY_GE_TX_EN (0xd << 0)
+#define YT8531_DELAY_GE_TX_DIS (0x0 << 0)
+#define YT8531_DELAY_FE_TX_EN (0xd << 4)
+#define YT8531_DELAY_FE_TX_DIS (0x0 << 4)
+#define YT8531_DELAY_RX_EN (0xd << 10)
+#define YT8531_DELAY_RX_DIS (0x0 << 10)
+#define YT8531_DELAY_MASK (GENMASK(13, 10) | GENMASK(7, 0))
+
+#define YT8531_SYNCE_CFG 0xa012
+
+/* Clk src config is bits 3:1
+ * 3b000 src from pll
+ * 3b001 src from rx_clk
+ * 3b010 src from serdes
+ * 3b011 src from ptp_in
+ * 3b100 src from 25mhz refclk *default*
+ * 3b101 src from 25mhz ssc
+ * Clk rate select is bit 4
+ * 1b0 25mhz clk output *default*
+ * 1b1 125mhz clk output
+ * Clkout enable is bit 6
+ */
+#define YT8531_CLKCFG_125M (BIT(6) | BIT(4) | (0x0 < 1))
+
static int yt8511_read_page(struct phy_device *phydev)
{
return __phy_read(phydev, YT8511_PAGE_SELECT);
@@ -111,6 +145,51 @@ static int yt8511_config_init(struct phy_device *phydev)
return phy_restore_page(phydev, oldpage, ret);
}

+static int yt8531_config_init(struct phy_device *phydev)
+{
+ int oldpage, ret = 0;
+ unsigned int val;
+
+ oldpage = phy_select_page(phydev, YT8531_RGMII_CONFIG1);
+ if (oldpage < 0)
+ goto err_restore_page;
+
+ /* set rgmii delay mode */
+ switch (phydev->interface) {
+ case PHY_INTERFACE_MODE_RGMII:
+ val = YT8531_DELAY_RX_DIS | YT8531_DELAY_GE_TX_DIS | YT8531_DELAY_FE_TX_DIS;
+ break;
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ val = YT8531_DELAY_RX_EN | YT8531_DELAY_GE_TX_DIS | YT8531_DELAY_FE_TX_DIS;
+ break;
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ val = YT8531_DELAY_RX_DIS | YT8531_DELAY_GE_TX_EN | YT8531_DELAY_FE_TX_EN;
+ break;
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ val = YT8531_DELAY_RX_EN | YT8531_DELAY_GE_TX_EN | YT8531_DELAY_FE_TX_EN;
+ break;
+ default: /* do not support other modes */
+ ret = -EOPNOTSUPP;
+ goto err_restore_page;
+ }
+
+ ret = __phy_modify(phydev, YT8511_PAGE, YT8531_DELAY_MASK, val);
+ if (ret < 0)
+ goto err_restore_page;
+
+ /* set clock mode to 125mhz */
+ ret = __phy_write(phydev, YT8511_PAGE_SELECT, YT8531_SYNCE_CFG);
+ if (ret < 0)
+ goto err_restore_page;
+
+ ret = __phy_write(phydev, YT8511_PAGE, YT8531_CLKCFG_125M);
+ if (ret < 0)
+ goto err_restore_page;
+
+err_restore_page:
+ return phy_restore_page(phydev, oldpage, ret);
+}
+
static struct phy_driver motorcomm_phy_drvs[] = {
{
PHY_ID_MATCH_EXACT(PHY_ID_YT8511),
@@ -120,7 +200,16 @@ static struct phy_driver motorcomm_phy_drvs[] = {
.resume = genphy_resume,
.read_page = yt8511_read_page,
.write_page = yt8511_write_page,
+ }, {
+ PHY_ID_MATCH_EXACT(PHY_ID_YT8531),
+ .name = "YT8531 Gigabit Ethernet",
+ .config_init = yt8531_config_init,
+ .suspend = genphy_suspend,
+ .resume = genphy_resume,
+ .read_page = yt8511_read_page,
+ .write_page = yt8511_write_page,
},
+
};

module_phy_driver(motorcomm_phy_drvs);
@@ -131,6 +220,7 @@ MODULE_LICENSE("GPL");

static const struct mdio_device_id __maybe_unused motorcomm_tbl[] = {
{ PHY_ID_MATCH_EXACT(PHY_ID_YT8511) },
+ { PHY_ID_MATCH_EXACT(PHY_ID_YT8531) },
{ /* sentinal */ }
};

--
2.37.3

59 changes: 59 additions & 0 deletions projects/Allwinner/patches/linux/0077-OrangePi-3-LTS-support.patch
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,59 @@
From 6f4abbea26de4ef963e9edd8eb051f5e7f2e0c6c Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <[email protected]>
Date: Mon, 2 Jan 2023 15:49:59 +0100
Subject: [PATCH] OrangePi 3 LTS support

Signed-off-by: Jernej Skrabec <[email protected]>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h6-orangepi-3-lts.dts | 26 +++++++++++++++++++
2 files changed, 27 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts

diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 6a96494a2e0a..ace8159a6324 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-beelink-gs1.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-3.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-3-lts.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
new file mode 100644
index 000000000000..0e490936b50c
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2023 Jernej Skrabec <[email protected]>
+
+#include "sun50i-h6-orangepi-3.dts"
+
+/ {
+ model = "OrangePi 3 LTS";
+ compatible = "xunlong,orangepi-3-lts", "allwinner,sun50i-h6";
+};
+
+&emac {
+ allwinner,rx-delay-ps = <200>;
+ allwinner,tx-delay-ps = <300>;
+};
+
+&mmc1 {
+ status = "disabled";
+};
+
+&r_rsb {
+ clock-frequency = <100000>;
+};
+
+&uart1 {
+ status = "disabled";
+};
--
2.39.0

5 changes: 5 additions & 0 deletions scripts/uboot_helper
View file
Original file line number Diff line number Diff line change
Expand Up @@ -120,6 +120,11 @@ devices = \
'config': 'orangepi_3_defconfig',
'crust_config': 'orangepi_3_defconfig'
},
'orangepi-3-lts': {
'dtb': 'sun50i-h6-orangepi-3-lts.dtb',
'config': 'orangepi_3_defconfig',
'crust_config': 'orangepi_3_defconfig'
},
'orangepi-lite2': {
'dtb': 'sun50i-h6-orangepi-lite2.dtb',
'config': 'orangepi_lite2_defconfig',
Expand Down

0 comments on commit 2cfb343

Please sign in to comment.