Implementation of a minimal ISA (Instruction Set Architecture) on an FPGA development board using Quartus, capable of running the classic video game Pong using a VGA output and keyboard controls.
This project was built to run Pong on a Cyclone III FPGA board. The board that was used is a DE0 development board, with the EP3C16F484C6 chip.
- Quartus 13.1 Web Edition for Windows
- Quartus 13.1 Web Edition for Linux
- ModelSim Altera 10.1d (Quartus II 13.1)