Checklist:
Memory mapping with switchable banksCPU Register implementation500 CPU operations/opcodes implementedPassing CPU json unit testsAll CPU tests are passing now!Testing CPU instructions with blargg's test rom via serial port (+ custom debugger)All Blaarg tests are passing now!Implementing timers and interrupt handlingImplementing PPU(PPU is implemented now, but is not acid-compliant yet)Joypad with configurable keymapOAM DMA TransferRunning first MBC0 titles- Extra Mappers (
MBC1,MBC3and MBC5 at the very least) RTC- Emulating sound
- GB->GBC modes switching
- Adding GBC features
- Save/Load state
- Bugfixing, peripherals, improving accuracy