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Digital Design for OpenSource FPGAs made easy: icestudio.io
Icestudio is a design tool focused on new comers to the FPGA world
- Step 1: Draw your circuit
- Step 2: Upload it to your favorite OpenSource FPGA board
- Step 3: Done! 😀️
Icestudio generates Verilog files from your visual circuits, build the Bitstream automatically and upload it to your FPGA board. This process is done using only Opensource Tools (Thanks to the Symbiflow project)
The collections are a groups of folders containing blocks, examples, translations and images compressed into a .ZIP file. You can learn more about their organization on this wiki section: Organization of the collections
The Collections can be created, added or removed anytime. By default, there is only one collection available when Icestudio is first installed: The default collection. It contains basic examples and basic components like logic gates, multiplexers and so on
There are much more collections available that you can install easilly. The stable collections have been translated into English and the documentation is available on the wiki. The development collections are a work in progress and their blocks can be completelly redesigned
You can find more information on the collections on the following links. The IceK collection is the one used as a reference. Contains many examples for different board as well as detailed instrucctions on how to install it, translate it or contributing to it. Check its documentation for learning more
- IceK: Constants
- IceWires: Wires and Buses
- IceIO: FPGA IO-pins
- IceGates: Logic gates
- IceMux: Muxes and demuxes
- IceCoders: Binary Encoders and Decoders
- IceFF: Flip-Flops
- IceRegs: Registers
- IceSRegs: Shift Registers
- IceBoards: blocks and examples for the diferent FPGA boards
- IceComp: Comparators
- IceArith: Integer arithmetics
- IceCounter: Counters
- IceSignals: 1-bit signal managment
- IcePLL: PLLs
- IceLEDOscope: Measuring signals
- IceLEDs: Displaying on LEDs
- IceHearts: Timming signal generation
- IceInputs: 1-bit inputs
- IceRok: Block probes for Icestudio => Sigrok integration (with Pulseview GUI)
- IceMachines: Working with Machines (simple state machines with a standar interface)
- IceSerial: Serial Asynchronous communications
- IceMem: Working with Memories
- IceMeasure: Measuring cycles and time in your circuits, very easily
- IceStack: Working with stacks
- IceFlash: Read from spi serial flash memories
- IceBus: Accesing and sharing simple buses
- IceLCD: Components and controllers for LCDs
- IceCrystal: Drive displays from Open Source FPGAs
- ice-chips-verilog: IceChips is a library of all common discrete logic devices in Verilog
- ArithmeticBlocks: FPGA signed and unsigned integer operations, 16, 24 and 32 bits, + - * / sqrt min max compare etc.
- iceSynth: Audio synthesis
- icebreaker: Blocks and examples for the icebreaker OpenFPGA board
- Jedi: blocks of the FPGA Jedi hardware Academy
- LOVE-FPGA: Hardware elements and examples for the LOVE-FPGA project (Linking Of Virtual Electronics to FPGAs)
- Stdio: Standard Input-Output in different devices
- CT11: Ejemplos del cuaderno ténico 11: Señales del sistema y Medición con el LEDOscopio
- Generic: Icestudio Generic Collection
- Logic: Icestudio Logic Collection
- IceInterface: Serial, SPI, I2C... (TODO)
- IceK-TB: Tests for iceK
- IceWires-TB: Test for icewires
- IceIO-TB: Tests for iceIO
- iceGates-TB: Tests for gates
- iceCoders-TB: Tests for iceCoders
- IceFF-TB: Tests for iceFF
- IceRegs-TB: Tests for registers
- IceSregs-TB: Tests for shift registers
- Jedi-Test: Tests for the blocks on the Jedi Collection
- ICM: Collection manager
- APIO: Backend (Toolchains)
- Installing the Toolchains from outside icestudio
- Installing the Drivers from outside icestudio
- Icestudio development version
- Releasing a new stable version
- Icestudio Files
- Execution flow
- Adding new boards
- Download icestudio development versions
