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General updates after July 25, 2016. Preparing HE tag for repo before…
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… branching for HB. Change tabs to spaces.
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shaunhogan committed Jun 18, 2018
1 parent d30e2cf commit 363effb
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Showing 7 changed files with 906 additions and 779 deletions.
52 changes: 13 additions & 39 deletions client/TestSoftware/IglooLib.py
Original file line number Diff line number Diff line change
Expand Up @@ -80,7 +80,7 @@ def intListToString(intList):
# Read/write functions
##############################

def readFromRegister(bus, address, register, numBytes):
def readFromRegister(bus, address, register, numBytes, verbose=True):
bus.write(address, [register])
bus.read(address, numBytes)
ret = []
Expand All @@ -92,30 +92,18 @@ def readFromRegister(bus, address, register, numBytes):

if isError(ret):
print 'Read ERROR: '+str(ret)
return False
else:
#return False
elif verbose:
print 'Read Success: '+str(ret)
return ret[:-1] #ignore the leading error code
return ret[:-1] #ignore the leading error code
# ------------------------------------------------------------------------

# quiet function, on successful read, returns without printing
def readFromRegister_Quiet(bus, address, register, numBytes):
bus.write(address, [register])
bus.read(address, numBytes)
ret = []
for i in bus.sendBatch()[-1].split():
ret.append(int(i))

# flip the bytes around (Bridge gives us LSB first... We want MSB first)
ret.reverse()

if isError(ret):
print 'Read ERROR: '+str(ret)
return False
else:
return ret[:-1] #ignore the leading error code
return readFromRegister(bus, address, register, numBytes, verbose=False)
# ------------------------------------------------------------------------

def writeToRegister(bus, address, register, toWrite):
def writeToRegister(bus, address, register, toWrite, verbose=True):
# toWrite can be the ret list from readFromRegister()
toWrite.reverse()
bus.write(address, [register] + toWrite)
Expand All @@ -126,32 +114,18 @@ def writeToRegister(bus, address, register, toWrite):
# flip the bytes around (Bridge gives us LSB first... We want MSB first)
#ret.reverse()

if not isError(ret):
print 'Write Success: '+str(ret)
return True # write successful
else:
if isError(ret):
print 'Write ERROR: '+str(ret)
return False # write failed
elif verbose:
print 'Write Success: '+str(ret)
return True # write successful

# ------------------------------------------------------------------------

# quiet function, on successful write, returns without printing
def writeToRegister_Quiet(bus, address, register, toWrite):
# toWrite can be the ret list from readFromRegister()
toWrite.reverse()
bus.write(address, [register] + toWrite)
ret = []
for i in bus.sendBatch()[-1].split():
ret.append(int(i))

# flip the bytes around (Bridge gives us LSB first... We want MSB first)
#ret.reverse()

if not isError(ret):
# print 'Write Success: '+str(ret)
return True # write successful
else:
print 'Write ERROR: '+str(ret)
return False # write failed
return writeToRegister(bus, address, register, toWrite, verbose=False)

# ------------------------------------------------------------------------

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3 changes: 2 additions & 1 deletion client/TestSoftware/TestStand.py
Original file line number Diff line number Diff line change
Expand Up @@ -104,7 +104,8 @@ def runAll(self):

self.uHTR_instance.make_jsons(mapReturn, pedReturn, citReturn, shtReturn, phsReturn)
# self.uHTR_instance.make_jsons(mapReturn, "be sure to", "drink your", "ovaltine", phsReturn)
timeStamp.timestamp_results(self.timeString)

timeStamp.timestamp_results(self.timeString)

def runSingle(self, key):
for r in self.RMs:
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