Merge branch 'main' of github.com:ElsassKabel/kicad_library into main

footprints/ElsassKabel.pretty/DIODE_1N4148_HOLE_SOD-123.kicad_mod

@@ -1,17 +1,19 @@
 (footprint "DIODE_1N4148_HOLE_SOD-123" (version 20211014) (generator pcbnew)
   (layer "F.Cu")
-  (tedit 6290BCCE)
+  (tedit 634C0850)
   (descr "Diode 1N4148 SOD-123")
-  (attr smd)
-  (fp_text reference "REF**" (at -0.008 -2.54 unlocked) (layer "F.SilkS") hide
+  (solder_mask_margin 0.1)
+  (clearance 0.1)
+  (attr through_hole)
+  (fp_text reference "REF**" (at 0 -2.54 unlocked) (layer "F.SilkS")
     (effects (font (size 1 1) (thickness 0.15)))
     (tstamp 1858e105-edcf-4cbf-a673-68a02909113c)
   )
-  (fp_text value "DIODE_1N4148_HOLE_SOD-123" (at -0.008 3.81 unlocked) (layer "F.Fab") hide
+  (fp_text value "DIODE_1N4148_HOLE_SOD-123" (at -0.008 2.54 unlocked) (layer "F.Fab")
     (effects (font (size 1 1) (thickness 0.15)))
     (tstamp a0ef29a0-7175-4f23-9b90-80ef32a72c44)
   )
-  (fp_text user "${REFERENCE}" (at -0.008 2.54 unlocked) (layer "F.Fab") hide
+  (fp_text user "${REFERENCE}" (at 0 0 unlocked) (layer "F.Fab")
     (effects (font (size 1 1) (thickness 0.15)))
     (tstamp 15486712-c3e3-4f41-8b3b-296a7733efce)
   )
@@ -23,12 +25,9 @@
   (fp_line (start -0.492 -0.5) (end 0.408 0) (layer "F.SilkS") (width 0.15) (tstamp c31c86ac-c10d-4628-8e83-85e5d17c433a))
   (fp_line (start 2.692 -0.75) (end -2.708 -0.75) (layer "F.SilkS") (width 0.15) (tstamp daf7c805-3c4a-4d53-bfa5-c5910798156f))
   (fp_line (start 0.508 0.5) (end 0.508 -0.5) (layer "F.SilkS") (width 0.15) (tstamp df5e1dcc-021f-4b97-8901-5f0c9b1f91f8))
-  (pad "1" smd rect (at -1.783 0) (size 1.4 1) (layers "F.Cu" "F.Paste" "F.Mask")
-    (solder_mask_margin 0.1) (tstamp 05e6396f-7b26-4364-8d25-40a6a217841d))
-  (pad "1" thru_hole circle (at -4 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
-    (solder_mask_margin 0.1) (tstamp 07f7b79b-8b8c-4762-bf37-e2c07e7ab000))
-  (pad "2" smd rect (at 1.767 0) (size 1.4 1) (layers "F.Cu" "F.Paste" "F.Mask")
-    (solder_mask_margin 0.1) (tstamp a092a142-0fc5-4521-a7c8-e8d2dcad2aeb))
-  (pad "2" thru_hole rect (at 4 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
-    (solder_mask_margin 0.1) (tstamp c941acbb-9f2d-4293-bc81-b525a71e9129))
+  (fp_rect (start -5.08 -1.27) (end 5.08 1.27) (layer "F.CrtYd") (width 0.05) (fill none) (tstamp 4116bfc2-eab3-4c29-a983-44eacd9f10f5))
+  (pad "1" smd rect (at -1.783 0) (size 1.4 1) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 05e6396f-7b26-4364-8d25-40a6a217841d))
+  (pad "1" thru_hole circle (at -4 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp 07f7b79b-8b8c-4762-bf37-e2c07e7ab000))
+  (pad "2" smd rect (at 1.767 0) (size 1.4 1) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp a092a142-0fc5-4521-a7c8-e8d2dcad2aeb))
+  (pad "2" thru_hole rect (at 4 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp c941acbb-9f2d-4293-bc81-b525a71e9129))
 )

footprints/ElsassKabel.pretty/DIODE_1N4148_SOD-123.kicad_mod

@@ -1,17 +1,19 @@
 (footprint "DIODE_1N4148_SOD-123" (version 20211014) (generator pcbnew)
   (layer "F.Cu")
-  (tedit 626CF1FE)
+  (tedit 634C0BFB)
   (descr "Diode 1N4148 SOD-123")
+  (solder_mask_margin 0.1)
+  (clearance 0.1)
   (attr smd)
-  (fp_text reference "REF**" (at -0.008 -2.54 unlocked) (layer "F.SilkS") hide
+  (fp_text reference "REF**" (at -0.008 -2.54 unlocked) (layer "F.SilkS")
     (effects (font (size 1 1) (thickness 0.15)))
     (tstamp 1858e105-edcf-4cbf-a673-68a02909113c)
   )
-  (fp_text value "DIODE_1N4148_SOD-123" (at -0.008 3.81 unlocked) (layer "F.Fab") hide
+  (fp_text value "DIODE_1N4148_SOD-123" (at -0.008 2.54 unlocked) (layer "F.Fab")
     (effects (font (size 1 1) (thickness 0.15)))
     (tstamp a0ef29a0-7175-4f23-9b90-80ef32a72c44)
   )
-  (fp_text user "${REFERENCE}" (at -0.008 2.54 unlocked) (layer "F.Fab") hide
+  (fp_text user "${REFERENCE}" (at 0 0 unlocked) (layer "F.Fab")
     (effects (font (size 1 1) (thickness 0.15)))
     (tstamp 15486712-c3e3-4f41-8b3b-296a7733efce)
   )
@@ -23,8 +25,7 @@
   (fp_line (start -0.492 -0.5) (end 0.408 0) (layer "F.SilkS") (width 0.15) (tstamp c31c86ac-c10d-4628-8e83-85e5d17c433a))
   (fp_line (start 2.692 -0.75) (end -2.708 -0.75) (layer "F.SilkS") (width 0.15) (tstamp daf7c805-3c4a-4d53-bfa5-c5910798156f))
   (fp_line (start 0.508 0.5) (end 0.508 -0.5) (layer "F.SilkS") (width 0.15) (tstamp df5e1dcc-021f-4b97-8901-5f0c9b1f91f8))
-  (pad "1" smd rect (at -1.783 0) (size 1.4 1) (layers "F.Cu" "F.Paste" "F.Mask")
-    (solder_mask_margin 0.1) (tstamp 05e6396f-7b26-4364-8d25-40a6a217841d))
-  (pad "2" smd rect (at 1.767 0) (size 1.4 1) (layers "F.Cu" "F.Paste" "F.Mask")
-    (solder_mask_margin 0.1) (tstamp a092a142-0fc5-4521-a7c8-e8d2dcad2aeb))
+  (fp_rect (start -3.048 -1.016) (end 3.048 1.016) (layer "F.CrtYd") (width 0.05) (fill none) (tstamp 46411048-26da-4369-ba01-0ac72fcae2e6))
+  (pad "1" smd rect (at -1.783 0) (size 1.4 1) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 05e6396f-7b26-4364-8d25-40a6a217841d))
+  (pad "2" smd rect (at 1.767 0) (size 1.4 1) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp a092a142-0fc5-4521-a7c8-e8d2dcad2aeb))
 )