[NTOS:KE][HALX86] Implement AP startup code

Co-authored-by: Victor Perevertkin <[email protected]>
DarkFire01 · Nov 15, 2023 · 9151d44 · 9151d44
1 parent e627c3b
commit 9151d44
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Showing 30 changed files with 782 additions and 134 deletions.
diff --git a/boot/freeldr/freeldr/ntldr/arch/i386/winldr.c b/boot/freeldr/freeldr/ntldr/arch/i386/winldr.c
@@ -64,81 +64,6 @@ typedef struct
 #define TYPE_CODE   (0x10 | DESCRIPTOR_CODE | DESCRIPTOR_EXECUTE_READ)
 #define TYPE_DATA   (0x10 | DESCRIPTOR_READ_WRITE)
 
-FORCEINLINE
-PKGDTENTRY
-KiGetGdtEntry(
-    IN PVOID pGdt,
-    IN USHORT Selector)
-{
-    return (PKGDTENTRY)((ULONG_PTR)pGdt + (Selector & ~RPL_MASK));
-}
-
-FORCEINLINE
-VOID
-KiSetGdtDescriptorBase(
-    IN OUT PKGDTENTRY Entry,
-    IN ULONG32 Base)
-{
-    Entry->BaseLow = (USHORT)(Base & 0xffff);
-    Entry->HighWord.Bytes.BaseMid = (UCHAR)((Base >> 16) & 0xff);
-    Entry->HighWord.Bytes.BaseHi  = (UCHAR)((Base >> 24) & 0xff);
-    // Entry->BaseUpper = (ULONG)(Base >> 32);
-}
-
-FORCEINLINE
-VOID
-KiSetGdtDescriptorLimit(
-    IN OUT PKGDTENTRY Entry,
-    IN ULONG Limit)
-{
-    if (Limit < 0x100000)
-    {
-        Entry->HighWord.Bits.Granularity = 0;
-    }
-    else
-    {
-        Limit >>= 12;
-        Entry->HighWord.Bits.Granularity = 1;
-    }
-    Entry->LimitLow = (USHORT)(Limit & 0xffff);
-    Entry->HighWord.Bits.LimitHi = ((Limit >> 16) & 0x0f);
-}
-
-VOID
-KiSetGdtEntryEx(
-    IN OUT PKGDTENTRY Entry,
-    IN ULONG32 Base,
-    IN ULONG Limit,
-    IN UCHAR Type,
-    IN UCHAR Dpl,
-    IN BOOLEAN Granularity,
-    IN UCHAR SegMode) // 0: 16-bit, 1: 32-bit, 2: 64-bit
-{
-    KiSetGdtDescriptorBase(Entry, Base);
-    KiSetGdtDescriptorLimit(Entry, Limit);
-    Entry->HighWord.Bits.Type = (Type & 0x1f);
-    Entry->HighWord.Bits.Dpl  = (Dpl & 0x3);
-    Entry->HighWord.Bits.Pres = (Type != 0); // Present, must be 1 when the GDT entry is valid.
-    Entry->HighWord.Bits.Sys  = 0;           // System
-    Entry->HighWord.Bits.Reserved_0  = 0;    // LongMode = !!(SegMode & 1);
-    Entry->HighWord.Bits.Default_Big = !!(SegMode & 2);
-    Entry->HighWord.Bits.Granularity |= !!Granularity; // The flag may have been already set by KiSetGdtDescriptorLimit().
-    // Entry->MustBeZero = 0;
-}
-
-FORCEINLINE
-VOID
-KiSetGdtEntry(
-    IN OUT PKGDTENTRY Entry,
-    IN ULONG32 Base,
-    IN ULONG Limit,
-    IN UCHAR Type,
-    IN UCHAR Dpl,
-    IN UCHAR SegMode) // 0: 16-bit, 1: 32-bit, 2: 64-bit
-{
-    KiSetGdtEntryEx(Entry, Base, Limit, Type, Dpl, FALSE, SegMode);
-}
-
 #if 0
 VOID
 DumpGDTEntry(ULONG_PTR Base, ULONG Selector)

diff --git a/hal/halx86/acpi/halacpi.c b/hal/halx86/acpi/halacpi.c
@@ -851,12 +851,12 @@ HalpSetupAcpiPhase0(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
         /* Allocate it */
         HalpLowStubPhysicalAddress.QuadPart = HalpAllocPhysicalMemory(LoaderBlock,
                                                                       0x100000,
-                                                                      1,
+                                                                      HALP_LOW_STUB_SIZE_IN_PAGES,
                                                                       FALSE);
         if (HalpLowStubPhysicalAddress.QuadPart)
         {
             /* Map it */
-            HalpLowStub = HalpMapPhysicalMemory64(HalpLowStubPhysicalAddress, 1);
+            HalpLowStub = HalpMapPhysicalMemory64(HalpLowStubPhysicalAddress, HALP_LOW_STUB_SIZE_IN_PAGES);
         }
     }
 

diff --git a/hal/halx86/apic/apicsmp.c b/hal/halx86/apic/apicsmp.c
@@ -1,18 +1,23 @@
 /*
  * PROJECT:     ReactOS HAL
  * LICENSE:     GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
- * FILE:        hal/halx86/apic/apicsmp.c
  * PURPOSE:     SMP specific APIC code
- * PROGRAMMERS: Copyright 2021 Timo Kreuzer ([email protected])
+ * COPYRIGHT:   Copyright 2021 Timo Kreuzer <[email protected]>
+ *              Copyright 2023 Justin Miller <[email protected]>
  */
 
 /* INCLUDES *******************************************************************/
 
 #include <hal.h>
 #include "apicp.h"
+#include <smp.h>
+
 #define NDEBUG
 #include <debug.h>
 
+
+extern PPROCESSOR_IDENTITY HalpProcessorIdentity;
+
 /* INTERNAL FUNCTIONS *********************************************************/
 
 /*!
@@ -36,7 +41,7 @@
             local APIC(s) specified in Destination field. Vector specifies
             the startup address.
         APIC_MT_ExtInt - Delivers an external interrupt to the target local
-            APIC specified in Destination field. 
+            APIC specified in Destination field.
 
     \param TriggerMode - The trigger mode of the interrupt. Can be:
         APIC_TGM_Edge - The interrupt is edge triggered.
@@ -64,6 +69,12 @@ ApicRequestGlobalInterrupt(
 {
     APIC_INTERRUPT_COMMAND_REGISTER Icr;
 
+    /* Wait for the APIC to be idle */
+    do
+    {
+        Icr.Long0 = ApicRead(APIC_ICR0);
+    } while (Icr.DeliveryStatus);
+
     /* Setup the command register */
     Icr.LongLong = 0;
     Icr.Vector = Vector;
@@ -84,13 +95,35 @@ ApicRequestGlobalInterrupt(
 
 /* SMP SUPPORT FUNCTIONS ******************************************************/
 
-// Should be called by SMP version of HalRequestIpi
 VOID
 NTAPI
-HalpRequestIpi(KAFFINITY TargetProcessors)
+HalpRequestIpi(_In_ KAFFINITY TargetProcessors)
 {
     UNIMPLEMENTED;
     __debugbreak();
 }
 
-// APIC specific SMP code here
+VOID
+ApicStartApplicationProcessor(
+    _In_ ULONG NTProcessorNumber,
+    _In_ PHYSICAL_ADDRESS StartupLoc)
+{
+    ASSERT(StartupLoc.HighPart == 0);
+    ASSERT((StartupLoc.QuadPart & 0xFFF) == 0);
+    ASSERT((StartupLoc.QuadPart & 0xFFF00FFF) == 0);
+
+    /* Init IPI */
+    ApicRequestGlobalInterrupt(HalpProcessorIdentity[NTProcessorNumber].LapicId, 0,
+        APIC_MT_INIT, APIC_TGM_Edge, APIC_DSH_Destination);
+
+    /* De-Assert Init IPI */
+    ApicRequestGlobalInterrupt(HalpProcessorIdentity[NTProcessorNumber].LapicId, 0,
+        APIC_MT_INIT, APIC_TGM_Level, APIC_DSH_Destination);
+
+    /* Stall execution for a bit to give APIC time: MPS Spec - B.4 */
+    KeStallExecutionProcessor(200);
+
+    /* Startup IPI */
+    ApicRequestGlobalInterrupt(HalpProcessorIdentity[NTProcessorNumber].LapicId, (StartupLoc.LowPart) >> 12,
+        APIC_MT_Startup, APIC_TGM_Edge, APIC_DSH_Destination);
+}
diff --git a/hal/halx86/apic/processor.c b/hal/halx86/apic/processor.c
@@ -38,18 +38,6 @@ HalAllProcessorsStarted(VOID)
     return TRUE;
 }
 
-/*
- * @implemented
- */
-BOOLEAN
-NTAPI
-HalStartNextProcessor(IN PLOADER_PARAMETER_BLOCK LoaderBlock,
-                      IN PKPROCESSOR_STATE ProcessorState)
-{
-    /* Ready to start */
-    return FALSE;
-}
-
 /*
  * @implemented
  */
@@ -62,15 +50,4 @@ HalProcessorIdle(VOID)
     __halt();
 }
 
-/*
- * @implemented
- */
-VOID
-NTAPI
-HalRequestIpi(KAFFINITY TargetProcessors)
-{
-    UNIMPLEMENTED;
-    __debugbreak();
-}
-
 /* EOF */
diff --git a/hal/halx86/generic/up.c b/hal/halx86/generic/up.c
@@ -0,0 +1,34 @@
+/*
+ * PROJECT:     ReactOS Kernel
+ * LICENSE:     GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
+ * PURPOSE:     Core source file for Uniprocessor (UP) alternative functions
+ * COPYRIGHT:   Copyright 2021 Justin Miller <[email protected]>
+ */
+
+/* INCLUDES ******************************************************************/
+
+#include <hal.h>
+
+#define NDEBUG
+#include <debug.h>
+
+/* FUNCTIONS *****************************************************************/
+
+VOID
+NTAPI
+HalRequestIpi(
+    _In_ KAFFINITY TargetProcessors)
+{
+    /* This should never be called in UP mode */
+    __debugbreak();
+}
+
+BOOLEAN
+NTAPI
+HalStartNextProcessor(
+    _In_ PLOADER_PARAMETER_BLOCK LoaderBlock,
+    _In_ PKPROCESSOR_STATE ProcessorState)
+{
+    /* Always return false on UP systems */
+    return FALSE;
+}
diff --git a/hal/halx86/include/halp.h b/hal/halx86/include/halp.h
@@ -53,6 +53,12 @@ VOID
 #define IDT_INTERNAL            0x11
 #define IDT_DEVICE              0x21
 
+#if _M_AMD64
+#define HALP_LOW_STUB_SIZE_IN_PAGES 5
+#else
+#define HALP_LOW_STUB_SIZE_IN_PAGES 3
+#endif
+
 /* Conversion functions */
 #define BCD_INT(bcd)            \
     (((bcd & 0xF0) >> 4) * 10 + (bcd & 0x0F))

diff --git a/hal/halx86/include/smp.h b/hal/halx86/include/smp.h
@@ -41,3 +41,15 @@ HalpSetupProcessorsTable(
 
 VOID
 HalpPrintApicTables(VOID);
+
+/* APIC specific functions inside apic/apicsmp.c */
+
+VOID
+ApicStartApplicationProcessor(
+    _In_ ULONG NTProcessorNumber,
+    _In_ PHYSICAL_ADDRESS StartupLoc);
+
+VOID
+NTAPI
+HalpRequestIpi(
+    _In_ KAFFINITY TargetProcessors);
diff --git a/hal/halx86/pic/processor.c b/hal/halx86/pic/processor.c
@@ -38,18 +38,6 @@ HalAllProcessorsStarted(VOID)
     return TRUE;
 }
 
-/*
- * @implemented
- */
-BOOLEAN
-NTAPI
-HalStartNextProcessor(IN PLOADER_PARAMETER_BLOCK LoaderBlock,
-                      IN PKPROCESSOR_STATE ProcessorState)
-{
-    /* Ready to start */
-    return FALSE;
-}
-
 /*
  * @implemented
  */
@@ -62,15 +50,4 @@ HalProcessorIdle(VOID)
     __halt();
 }
 
-/*
- * @implemented
- */
-VOID
-NTAPI
-HalRequestIpi(KAFFINITY TargetProcessors)
-{
-    /* Not implemented on UP */
-    __debugbreak();
-}
-
 /* EOF */
diff --git a/hal/halx86/smp.cmake b/hal/halx86/smp.cmake
@@ -2,8 +2,22 @@
 list(APPEND HAL_SMP_SOURCE
     generic/buildtype.c
     generic/spinlock.c
-    smp/smp.c)
+    smp/smp.c
+    smp/ipi.c)
 
-add_library(lib_hal_smp OBJECT ${HAL_SMP_SOURCE})
+if(ARCH STREQUAL "i386")
+    list(APPEND HAL_SMP_ASM_SOURCE
+        smp/i386/apentry.S)
+    list(APPEND HAL_SMP_SOURCE
+        smp/i386/spinup.c)
+elseif(ARCH STREQUAL "amd64")
+    list(APPEND HAL_SMP_ASM_SOURCE
+        smp/amd64/apentry.S)
+    list(APPEND HAL_SMP_SOURCE
+        smp/amd64/spinup.c)
+endif()
+
+add_asm_files(lib_hal_smp_asm ${HAL_SMP_ASM_SOURCE})
+add_library(lib_hal_smp OBJECT ${HAL_SMP_SOURCE} ${lib_hal_smp_asm})
 add_dependencies(lib_hal_smp bugcodes xdk)
 target_compile_definitions(lib_hal_smp PRIVATE CONFIG_SMP)
diff --git a/hal/halx86/smp/amd64/apentry.S b/hal/halx86/smp/amd64/apentry.S
@@ -0,0 +1,43 @@
+/*
+ * PROJECT:     ReactOS Kernel
+ * LICENSE:     GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
+ * PURPOSE:     AMD64 Application Processor (AP) spinup setup
+ * COPYRIGHT:   Copyright 2021 Justin Miller <[email protected]>
+ */
+
+#include <asm.inc>
+
+PUBLIC APEntry16
+PUBLIC APEntry16End
+PUBLIC APEntry32
+PUBLIC APEntryJump32Offset
+PUBLIC APEntryJump32Segment
+PUBLIC TempPageTableAddr
+PUBLIC APEntryCpuState
+
+.code
+APEntry16:
+    cli
+
+    xor ax, ax
+	mov ds, ax
+	mov ss, ax
+    mov fs, ax
+    mov gs, ax
+
+    hlt
+
+APEntry16End:
+.long HEX(0)
+APEntry32:
+.long HEX(0)
+APEntryJump32Offset:
+.long HEX(0)
+APEntryJump32Segment:
+.long HEX(0)
+TempPageTableAddr:
+.long HEX(0)
+APEntryCpuState:
+.long HEX(0)
+
+END