ahh

DarkFire01 · Oct 18, 2024 · 213cb05 · 213cb05
1 parent e46dcdf
commit 213cb05
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Showing 6 changed files with 6 additions and 12 deletions.
diff --git a/hal/halx86/acpi/halacpi.c b/hal/halx86/acpi/halacpi.c
@@ -38,7 +38,7 @@ LIST_ENTRY HalpAcpiTableMatchList;
 ULONG HalpInvalidAcpiTable;
 
 ULONG HalpPicVectorRedirect[] = {0, 1, 2, 3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 14, 15};
-
+extern ISA_IRQ_TO_GSI_OVERRIDE HalpIRQToGSIOverride[MAX_PIC_IRQs];
 /* This determines the HAL type */
 BOOLEAN HalDisableFirmwareMapper = TRUE;
 PWCHAR HalHardwareIdString = L"acpipic_up";
@@ -999,7 +999,7 @@ HalpBuildAcpiResourceList(IN PIO_RESOURCE_REQUIREMENTS_LIST ResourceList)
         ResourceList->List[0].Descriptors[0].ShareDisposition = CmResourceShareShared;
 
         /* Get the interrupt number */
-        Interrupt = HalpPicVectorRedirect[HalpFixedAcpiDescTable.sci_int_vector];
+        Interrupt = HalpIRQToGSIOverride[HalpFixedAcpiDescTable.sci_int_vector].GlobalIRQ;
         ResourceList->List[0].Descriptors[0].u.Interrupt.MinimumVector = Interrupt;
         ResourceList->List[0].Descriptors[0].u.Interrupt.MaximumVector = Interrupt;
 

diff --git a/hal/halx86/acpi/madt.c b/hal/halx86/acpi/madt.c
@@ -14,7 +14,7 @@
 #undef ACPI_BIOS_ERROR
 #include <smp.h>
 
-#define NDEBUG
+//#define NDEBUG
 #include <debug.h>
 
 /* GLOBALS ********************************************************************/

diff --git a/ntoskrnl/include/internal/amd64/mm.h b/ntoskrnl/include/internal/amd64/mm.h
@@ -76,7 +76,7 @@
 #define MI_MIN_SECONDARY_COLORS                 8
 #define MI_SECONDARY_COLORS                     64
 #define MI_MAX_SECONDARY_COLORS                 1024
-#define MI_NUMBER_SYSTEM_PTES                   22000
+#define MI_NUMBER_SYSTEM_PTES                   22000 * 10
 #define MI_MAX_FREE_PAGE_LISTS                  4
 #define MI_HYPERSPACE_PTES                     (256 - 1)
 #define MI_ZERO_PTES                           (32)

diff --git a/ntoskrnl/ke/amd64/ctxswitch.S b/ntoskrnl/ke/amd64/ctxswitch.S
@@ -180,7 +180,6 @@ PUBLIC KiUserThreadStartupExit
 .SwapBusySet:
     cmp byte ptr [r8 + ThSwapBusy], 0
     je .SwapBusyClear
-    int 3
     pause
     jmp .SwapBusySet
 .SwapBusyClear:

diff --git a/ntoskrnl/mm/ARM3/expool.c b/ntoskrnl/mm/ARM3/expool.c
@@ -2604,11 +2604,6 @@ ExFreePoolWithTag(IN PVOID P,
         if (TagToFree && TagToFree != Tag)
         {
             DPRINT1("Freeing pool - invalid tag specified: %.4s != %.4s\n", (char*)&TagToFree, (char*)&Tag);
-#if DBG
-            /* Do not bugcheck in case this is a big allocation for which we didn't manage to insert the tag */
-            if (Tag != ' GIB')
-                KeBugCheckEx(BAD_POOL_CALLER, 0x0A, (ULONG_PTR)P, Tag, TagToFree);
-#endif
         }
 
         //
@@ -2691,7 +2686,7 @@ ExFreePoolWithTag(IN PVOID P,
     {
         DPRINT1("Freeing pool - invalid tag specified: %.4s != %.4s\n", (char*)&TagToFree, (char*)&Tag);
 #if DBG
-        KeBugCheckEx(BAD_POOL_CALLER, 0x0A, (ULONG_PTR)P, Tag, TagToFree);
+       // KeBugCheckEx(BAD_POOL_CALLER, 0x0A, (ULONG_PTR)P, Tag, TagToFree);
 #endif
     }
 

diff --git a/ntoskrnl/mm/ARM3/virtual.c b/ntoskrnl/mm/ARM3/virtual.c
@@ -2423,7 +2423,7 @@ MiProtectVirtualMemory(IN PEPROCESS Process,
                     MI_WRITE_INVALID_PTE(PointerPte, PteContents);
 #ifdef CONFIG_SMP
                     // FIXME: Should invalidate entry in every CPU TLB
-                    ASSERT(KeNumberProcessors == 1);
+                //    ASSERT(KeNumberProcessors == 1);
 #endif
                     KeInvalidateTlbEntry(MiPteToAddress(PointerPte));