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Add dut module and top module for myCPU simulation #15

Add dut module and top module for myCPU simulation

Add dut module and top module for myCPU simulation #15

Triggered via push March 17, 2024 13:17
Status Failure
Total duration 15s
Billable time 2m
Artifacts

test.yml

on: push
am-test
5s
am-test
riscv-test
5s
riscv-test
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2 errors
am-test
Process completed with exit code 101.
riscv-test
Process completed with exit code 101.