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Fixes for mypy.
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cqc-alec committed Nov 14, 2024
1 parent bba9d6d commit 243bf8c
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Showing 2 changed files with 17 additions and 11 deletions.
25 changes: 15 additions & 10 deletions pytket/pytket/circuit/decompose_classical.py
Original file line number Diff line number Diff line change
Expand Up @@ -337,30 +337,34 @@ def decompose_expr(self, expr: ClExpr, out_var: Variable | None) -> Variable:
self.add_var(out_var)
match op:
case ClOp.BitAnd:
self.circ.add_c_and(*terms, out_var, **self.kwargs)
self.circ.add_c_and(*terms, out_var, **self.kwargs) # type: ignore
case ClOp.BitNot:
self.circ.add_c_not(*terms, out_var, **self.kwargs)
self.circ.add_c_not(*terms, out_var, **self.kwargs) # type: ignore
case ClOp.BitOne:
assert isinstance(out_var, Bit)
self.circ.add_c_setbits([True], [out_var], **self.kwargs)
case ClOp.BitOr:
self.circ.add_c_or(*terms, out_var, **self.kwargs)
self.circ.add_c_or(*terms, out_var, **self.kwargs) # type: ignore
case ClOp.BitXor:
self.circ.add_c_xor(*terms, out_var, **self.kwargs)
self.circ.add_c_xor(*terms, out_var, **self.kwargs) # type: ignore
case ClOp.BitZero:
assert isinstance(out_var, Bit)
self.circ.add_c_setbits([False], [out_var], **self.kwargs)
case ClOp.RegAnd:
self.circ.add_c_and_to_registers(*terms, out_var, **self.kwargs)
self.circ.add_c_and_to_registers(*terms, out_var, **self.kwargs) # type: ignore
case ClOp.RegNot:
self.circ.add_c_not_to_registers(*terms, out_var, **self.kwargs)
self.circ.add_c_not_to_registers(*terms, out_var, **self.kwargs) # type: ignore
case ClOp.RegOne:
assert isinstance(out_var, BitRegister)
self.circ.add_c_setbits(
[True] * out_var.size, out_var.to_list(), **self.kwargs
)
case ClOp.RegOr:
self.circ.add_c_or_to_registers(*terms, out_var, **self.kwargs)
self.circ.add_c_or_to_registers(*terms, out_var, **self.kwargs) # type: ignore
case ClOp.RegXor:
self.circ.add_c_xor_to_registers(*terms, out_var, **self.kwargs)
self.circ.add_c_xor_to_registers(*terms, out_var, **self.kwargs) # type: ignore
case ClOp.RegZero:
assert isinstance(out_var, BitRegister)
self.circ.add_c_setbits(
[False] * out_var.size, out_var.to_list(), **self.kwargs
)
Expand Down Expand Up @@ -483,14 +487,15 @@ def _decompose_expressions(circ: Circuit) -> tuple[Circuit, bool]:
reg_posn = wexpr.reg_posn
output_posn = wexpr.output_posn
assert len(output_posn) > 0
output0: Bit = args[output_posn[0]]
output0 = args[output_posn[0]]
assert isinstance(output0, Bit)
out_var: Variable = (
BitRegister(output0.reg_name, len(output_posn))
if has_reg_output(expr.op)
else output0
)
decomposer = ClExprDecomposer(
newcirc, bit_posn, reg_posn, args, bit_heap, reg_heap, kwargs
newcirc, bit_posn, reg_posn, args, bit_heap, reg_heap, kwargs # type: ignore
)
comp_var = decomposer.decompose_expr(expr, out_var)
if comp_var != out_var:
Expand Down
3 changes: 2 additions & 1 deletion pytket/tests/qasm_test.py
Original file line number Diff line number Diff line change
Expand Up @@ -1238,7 +1238,8 @@ def test_multibitop() -> None:
test_hqs_conditional_params()
test_barrier()
test_barrier_2()
test_decomposable_extended()
test_decomposable_extended(True)
test_decomposable_extended(False)
test_alternate_encoding()
test_header_stops_gate_definition()
test_tk2_definition()
Expand Down

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