ML Model on FPGA Eklavya23

An ML model will be implemented on an FPGA, specifically targeting the MNIST dataset. This model will inherently be accelerated on the FPGA.

Introduction

The aim of this project was to create a Convolutional Neural Network(basically a machine learning model) to accurately detect any number between 0-9 from the MNIST dataset.The MNIST(Modified National Institute of Standards and Technology) dataset is a large collection of images of hanndwritten digits.This Neural Network was then to be implemented on an FPGA using Verilog HDL .

Testing code

For testing Verilog code ,EDA Playground or Quartus/Vivado is required.

Tech Stack

• Jupyter Notebook
• Verilog

Contributors

• Atharv Patil
• Soha Jawdekar

Mentors

• Zain Siddavatam
• Harsh Bhosale