Attempt to implement MultiLayer Perceptron in hardware descriptive language like VHDL.
- Increases Efficiency
- High level of parallelism and piplining
- Implementation cost is low
- Inputs: n-parallel signal cables
- Output: m-parallel signal cables
- SRAM: To store weights
- Multiplier/Adder: To evaluate weighted sum
- Buffer: Because multiplication would be parallel, but for adding weighted sums we need to maintain previous sum every time which works likes a left-over sum or carry sum for next calculation.
- Activation Function: MLP Activation Function.
- Aastha Gupta
- Aman Priyadarshi