Update createFFTFilters.m

ADSD-SoC-FPGA · Mar 10, 2023 · a4bc647 · a4bc647
1 parent 6055f90
commit a4bc647
Showing 1 changed file with 4 additions and 4 deletions.
diff --git a/examples/fftAnalysisSynthesis/simulink/createFFTFilters.m b/examples/fftAnalysisSynthesis/simulink/createFFTFilters.m
@@ -45,16 +45,16 @@
 modelParams.fftGainsF3Real     = zeros(modelParams.fft.sizeHalf,1);  % start by zeroing array
 modelParams.fftGainsF3Real(modelParams.highPassIndex:end)  = ones(modelParams.fft.sizeHalf - modelParams.highPassIndex + 1, 1);
 modelParams.fftGainsF3Imag     = zeros(modelParams.fft.sizeHalf,1);  % zero imaginary part
-modelParams.fftGainsF1Real     = fi(modelParams.fftGainsF1Real,modelParams.fftROMDataType);
-modelParams.fftGainsF1Imag     = fi(modelParams.fftGainsF1Imag,modelParams.fftROMDataType);
+modelParams.fftGainsF3Real     = fi(modelParams.fftGainsF3Real,modelParams.fftROMDataType);
+modelParams.fftGainsF3Imag     = fi(modelParams.fftGainsF3Imag,modelParams.fftROMDataType);
 
 %----------------------------------------------------------------------------
 % Filter 4 - All Pass (filterSelect=3)
 %----------------------------------------------------------------------------
 modelParams.fftGainsF4Real     = ones(modelParams.fft.sizeHalf,1);
 modelParams.fftGainsF4Imag     = zeros(modelParams.fft.sizeHalf,1);  % zero imaginary part
-modelParams.fftGainsF1Real     = fi(modelParams.fftGainsF1Real,modelParams.fftROMDataType);
-modelParams.fftGainsF1Imag     = fi(modelParams.fftGainsF1Imag,modelParams.fftROMDataType);
+modelParams.fftGainsF4Real     = fi(modelParams.fftGainsF4Real,modelParams.fftROMDataType);
+modelParams.fftGainsF4Imag     = fi(modelParams.fftGainsF4Imag,modelParams.fftROMDataType);
 
 end