Discussion on proper way to configure drive strength on GPIO expanders

[CkovMk]

Is your enhancement proposal related to a problem? Please describe.

Some GPIO expander (e.g. PCAL6524) have option to configure drive strength. There is no GPIO API available to configure it.

For SoC built-in GPIO drive strength is configured via pinctrl. From my understanding SoC can only have one driver providing pinctrl_configure_pins api, and Zephyr just call it to configure every pinctrl node in use. So it seems impossible to reuse pinctrl for gpio expanders.

Describe the solution you'd like

Expand pin_configure API to store a bit-shifted integer (say 0~16) for drive strength config. Then it's driver's responsibility to map this integer to its closest supported value. e.g. An GPIO driver supports x1, x2, x4, x8 configurerations, a configure calls to set drive strength as 3. The driver should set drive strength to "x2" for a closest match. For built-in GPIO drivers, they could either: call pinctrl API on their platform, enabling changing drive strength during runtime, or ignore such config to avoid function duplication.

Describe alternatives you've considered

1. Expand GPIO API to provide a separate optional drive strength API. The API may accepts driver predefined enums to specify drive strength, or use a fixed integer range as mentioned above.
2. Reuse pinctrl? (not an easy task)

Additional context

None.

[henrikbrixandersen]

Some GPIO expander (e.g. PCAL6524) have option to configure drive strength. There is no GPIO API available to configure it.

Yes, there is. You can create driver-specific GPIO DT flags in a header under include/zephyr/dt-bindings/gpio/, using bits 15 downto 8.