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English | 日本語

An educational open-source CPU implemented with RISC-V and Chisel

This CPU implementation aims to help you learn the CPU architecture, RISC-V (an open-source instruction set architecture developed at UC Berkeley), and Chisel (a Scala Embedded Language), mainly guided by the publication "CPU Design with RISC-V and Chisel - First step to custom CPU implementation with open-source ISA."

cover

The publication covers

  • the basics of computer architecture
  • RISC-V implementation with Chisel
    • Base Integer Instruction Set
    • CSR
    • Instruction pipelining
    • V Vector extension
    • Custom Instruction (e.g., Population Count)
    • riscv-tests

Getting Started

  1. Clone this repo.

    git clone https://github.com/chadyuu/riscv-chisel-book.git
    
  2. Build the Docker image.

    Recommended to install the Docker image from Docker Hub.

    docker pull yutaronishiyama/riscv-chisel-book
    

    Or build the image from Dockerfile.

    docker build . -t yutaronishiyama/riscv-chisel-book
    
  3. Run the image.

    docker run -it -v $PWD/riscv-chisel-book:/src yutaronishiyama/riscv-chisel-book
    

Implementation Steps

  1. Set constants

  2. Instruction Fetch

  3. Instruction Decode

  4. Load Instruction

  5. Store Instruction

  6. Base Instructions & riscv-tests

    Below are the steps to run riscv-tests.

    1. Update link.ld
    $ vim /opt/riscv/riscv-tests/env/p/link.ld
    SECTIONS
    {
    	. = 0x00000000; // update "0x80000000"
    }
    
    1. Build riscv-tests.
    cd /opt/riscv/riscv-tests
    autoconf
    ./configure --prefix=/src/target
    make
    make install
    
    1. Generate Hex files of riscv-tests.
    cd /src/chisel-template/src/shell
    ./tohex.sh
    
    1. Execute riscv-tests
    cd /src/chisel-template/src/shell
    ./riscv_tests.sh riscvtests 05_RiscvTests
    
  7. Pipelining

    • Control hazards
    • Data hazards
  8. V Vector extension

    • VSETVLI
    • Vector Load
    • Vector Add
    • Vector Store
  9. Custom Instruction "Population Count (pcnt)"

    1. Add "pcnt" to GNU Assembler.

      /opt/riscv/riscv-gnu-toolchain/riscv-binutils/opcodes/riscv-opc.c

      #include "opcode/riscv.h"
      ...
      const struct riscv_opcode riscv_opcodes[] =
      {
      ...
      /* name, xlen, isa, operands, match, mask, match_func, pinfo */
      {"pcnt", 0, INSN_CLASS_I, "d,s", MATCH_PCNT, MASK_PCNT, match_opcode, 0}, // add
      ...
      }
      
    2. Rebuild the assembler.

      cd /opt/riscv/riscv-gnu-toolchain/build
      make clean
      make
      

ChiselTest on C programs

  1. Generate a Hex file from C program

    cd /src/chisel-template/src/c
    make [filename.c]
    
  2. ChiselTest on a Hex file

    cd /src/chisel-template
    sbt "testOnly [package_name].HexTest"
    

FPGA implementation

Please see fpga branch and the documents for the security camp 2022.