Replies: 5 comments
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And a diff: diff --git a/kikit/panelize.py b/kikit/panelize.py
index 9ce7330..cd9ca76 100644
--- a/kikit/panelize.py
+++ b/kikit/panelize.py
@@ -463,6 +463,7 @@ class Panel:
minY, maxY = bBox.GetY() - fromMm(3), bBox.GetY() + bBox.GetHeight() + fromMm(3)
segments = []
for cut in self.vVCuts:
+ self.add_keepout(cut - fromMm(0.5), minY, cut + fromMm(0.5), maxY)
segment = pcbnew.PCB_SHAPE()
self._setVCutSegmentStyle(segment, layer)
segment.SetStart(pcbnew.wxPoint(cut, minY))
@@ -482,6 +483,7 @@ class Panel:
minX, maxX = bBox.GetX() - fromMm(3), bBox.GetX() + bBox.GetWidth() + fromMm(3)
segments = []
for cut in self.hVCuts:
+ self.add_keepout(minX, cut - fromMm(0.5), maxX, cut + fromMm(0.5))
segment = pcbnew.PCB_SHAPE()
self._setVCutSegmentStyle(segment, layer)
segment.SetStart(pcbnew.wxPoint(minX, cut))
@@ -1019,3 +1021,27 @@ class Panel:
zoneContainer.SetLayer(Layer.B_Cu)
self.board.Add(zoneContainer)
self.zonesToRefill.append(zoneContainer)
+
+ def add_keepout(self, x1, y1, x2, y2, no_tracks = True, no_vias = True, no_copper_pour = True):
+ """
+ Add rectangular keepout to top and bottom copper layers
+ """
+ zoneContainer = pcbnew.ZONE(self.board)
+ zoneContainer.SetIsKeepout(True)
+ zoneContainer.SetDoNotAllowTracks(no_tracks)
+ zoneContainer.SetDoNotAllowVias(no_vias)
+ zoneContainer.SetDoNotAllowCopperPour(no_copper_pour)
+ lineChain = pcbnew.SHAPE_LINE_CHAIN()
+ lineChain.Append(int(x1), int(y1))
+ lineChain.Append(int(x1), int(y2))
+ lineChain.Append(int(x2), int(y2))
+ lineChain.Append(int(x2), int(y1))
+ lineChain.SetClosed(True)
+ zoneContainer.Outline().AddOutline(lineChain)
+ zoneContainer.SetLayer(Layer.F_Cu)
+ self.board.Add(zoneContainer)
+ self.zonesToRefill.append(zoneContainer)
+ zoneContainer = zoneContainer.Duplicate()
+ zoneContainer.SetLayer(Layer.B_Cu)
+ self.board.Add(zoneContainer)
+ self.zonesToRefill.append(zoneContainer) |
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This is something I haven't considered before and it actually makes sense that there should be no copper below V-cuts. Please, open a PR and will accept it. I also think the clearance should be configurable. But that is something you don't have to worry about - I will include it in the CLI rework. |
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Pull request added: #136 |
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Implemented in #139 |
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At the moment there is no clearance for V-cuts (as these are just graphic objects in pcbnew).
It may be alleviated by drawing traces and copper areas farther from PCB edge, but it is error prone and will not help with the area generated using "--copperfill".
It may be a good idea to add keepout around the score line (e.g. 0.5 mm from score center for each side, so 1.0 mm total).
Actual dimension depends on PCB thickness, score depth, manufacturer tolerances.
E.g. for pcbway it's recommended to be 1 mm (last drawing on the page, "conductor" dimension):
https://www.pcbway.com/pcb_prototype/PCB_V_Scoring.html
Is it OK if I'll try a pull request? Or just add a diff here? It's a small change.
I've this implemented in my local version of KiKit but I've not used github pull requests yet
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