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Add a fixed size batch #809
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Some random thoughts: this would slightly overlap with xtensor, we probably need a dedicated type to achieve that, we already have support for fixed size array but it's very limited (only works if the size directly maps to a supported register size) |
I'm also looking for fixed size batches. I have a specific use case with rgba pixels in an array of structures and I need to access them out of order. Structure of arrays is not an option in this specific case. So a) if a pixel does not fit a register size it still needs to be fully loaded and processed. And b) storing may not overwrite neighbouring pixels. Serge. You say xsimd has "support for fixed size array". I'm not sure what you mean. Could you please elaborate so I can see if that could help me? |
Example usage: Line 141 in e6fa5ac
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As someone who has worked with Vc and
std::experimental::simd
before, I miss the equivalent of a fixed size SIMD array in xsimd. This would be a version ofxsimd::batch
where I can specify the length at compile time and this length is then subdivided and mapped to the available SIMD register sizes. In Vc andstd::experimental::simd
, this is solved with an additional ABI tag. The equivalence in xsimd would be the architecture type argumentA
inxsimd::batch<T, A>
.As an example, a
xsimd::batch<float, fixed_size<12>>
may use 3 SSE registers internally when compiled for SSE, or 1 AVX and 1 SSE register when compiled with AVX. Axsimd::batch<float, fixed_size<5>>
would use an SSE register and a scalar. Etc.Such a construct is very handy when the algorithm dictates a vector length. Or when I need to mix element types of different sizes, e.g. a loop over arrays with float and double. In the latter case I could use
xsimd::batch<float>
andxsimd::batch<double, fixed_size<xsimd::batch<float>::size>>
to ensure that both batches have the same number of elements.Would it be possible to add such a construct? Thank you!
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