diff --git a/Cfg/Template/os_app_hooks.c b/Cfg/Template/os_app_hooks.c index 4b09e40..e5fc308 100644 --- a/Cfg/Template/os_app_hooks.c +++ b/Cfg/Template/os_app_hooks.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * APPLICATION HOOKS * * Filename : os_app_hooks.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Cfg/Template/os_app_hooks.h b/Cfg/Template/os_app_hooks.h index 0e7d50a..c8035ea 100644 --- a/Cfg/Template/os_app_hooks.h +++ b/Cfg/Template/os_app_hooks.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * APPLICATION HOOKS * * Filename : os_app_hooks.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Cfg/Template/os_cfg.h b/Cfg/Template/os_cfg.h index f5e1308..40bd035 100644 --- a/Cfg/Template/os_cfg.h +++ b/Cfg/Template/os_cfg.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * CONFIGURATION FILE * * Filename : os_cfg.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Cfg/Template/os_cfg_app.h b/Cfg/Template/os_cfg_app.h index c64f470..f11fc19 100644 --- a/Cfg/Template/os_cfg_app.h +++ b/Cfg/Template/os_cfg_app.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * OS CONFIGURATION (APPLICATION SPECIFICS) * * Filename : os_cfg_app.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/ARC/EM6/MetaWare/os_cpu.h b/Ports/ARC/EM6/MetaWare/os_cpu.h index 75db88b..da2b909 100644 --- a/Ports/ARC/EM6/MetaWare/os_cpu.h +++ b/Ports/ARC/EM6/MetaWare/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Synopsys ARC EM6 Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Synopsys ARC EM6 * Mode : Little-Endian, 32 registers, FPU, Code Density, Loop Counter, Stack Check diff --git a/Ports/ARC/EM6/MetaWare/os_cpu_a.s b/Ports/ARC/EM6/MetaWare/os_cpu_a.s index 048a3a5..a15dea3 100644 --- a/Ports/ARC/EM6/MetaWare/os_cpu_a.s +++ b/Ports/ARC/EM6/MetaWare/os_cpu_a.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Synopsys ARC EM6 Port ; ; File : os_cpu_a.s -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Synopsys ARC EM6 ; Mode : Little-Endian, 32 registers, FPU, Code Density, Loop Counter, Stack Check diff --git a/Ports/ARC/EM6/MetaWare/os_cpu_c.c b/Ports/ARC/EM6/MetaWare/os_cpu_c.c index 3126d7b..a3232a6 100644 --- a/Ports/ARC/EM6/MetaWare/os_cpu_c.c +++ b/Ports/ARC/EM6/MetaWare/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Synopsys ARC EM6 Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Synopsys ARC EM6 * Mode : Little-Endian, 32 registers, FPU, Code Density, Loop Counter, Stack Check diff --git a/Ports/ARC/embARC/MetaWare/os_cpu.h b/Ports/ARC/embARC/MetaWare/os_cpu.h new file mode 100644 index 0000000..3e99a42 --- /dev/null +++ b/Ports/ARC/embARC/MetaWare/os_cpu.h @@ -0,0 +1,101 @@ +/* +********************************************************************************************************* +* uC/OS-III +* The Real-Time Kernel +* +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com +* +* SPDX-License-Identifier: APACHE-2.0 +* +* This software is subject to an open source license and is distributed by +* Silicon Laboratories Inc. pursuant to the terms of the Apache License, +* Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. +* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* ARC +* MetaWare +* +* Filename : os_cpu.h +* Version : V3.08.02 +********************************************************************************************************* +*/ + +#ifndef _OS_CPU_H +#define _OS_CPU_H + +#ifdef OS_CPU_GLOBALS +#define OS_CPU_EXT +#else +#define OS_CPU_EXT extern +#endif + +#include "embARC.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +********************************************************************************************************* +* MACROS +* +* Note(s): OS_TASK_SW() invokes the task level context switch. +* +* (1) On some processors, this corresponds to a call to OSCtxSw() which is an assemply language +* function that performs the context switch. +* +* (2) On some processors, you need to simulate an interrupt using a 'sowfate interrupt' or a +* TRAP instruction. Some compilers allow you to add in-line assembly language as shown. +********************************************************************************************************* +*/ + +#define OS_TASK_SW() OSCtxSw() /* Simulate interrupt */ + +/* +********************************************************************************************************* +* TIMESTAMP CONFIGURATION +* +* Note(s) : (1) OS_TS_GET() is generally defined as CPU_TS_Get32() to allow CPU timestamp timer to be of +* any data type size. +* +* (2) For architectures that provide 32-bit or higher precision free running counters +* (i.e. cycle count registers): +* +* (a) OS_TS_GET() may be defined as CPU_TS_TmrRd() to improve performance when retrieving +* the timestamp. You would use CPU_TS_TmrRd() if this function returned the value of +* a 32-bit free running timer 0x00000000 to 0xFFFFFFFF then roll over to 0x00000000. +* +* (b) CPU_TS_TmrRd() MUST be configured to be greater or equal to 32-bits to avoid +* truncation of TS. +* +* (c) The Timer must be an up counter. +********************************************************************************************************* +*/ + +#if OS_CFG_TS_EN == 1u +#define OS_TS_GET() (CPU_TS)CPU_TS_Get32() /* See Note #2a. CPU_TS_TmrRd() */ +#else +#define OS_TS_GET() (CPU_TS)0u +#endif + + +/* +********************************************************************************************************* +* FUNCTION PROTOTYPES +********************************************************************************************************* +*/ + +void OSCtxSw (void); +void OSIntCtxSw (void); +void OSStartHighRdy (void); +int OS_SysTickInit (void); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/Ports/ARC/embARC/MetaWare/os_cpu_a.s b/Ports/ARC/embARC/MetaWare/os_cpu_a.s new file mode 100644 index 0000000..7f7ced5 --- /dev/null +++ b/Ports/ARC/embARC/MetaWare/os_cpu_a.s @@ -0,0 +1,540 @@ +;******************************************************************************************************** +; uC/OS-III +; The Real-Time Kernel +; +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com +; +; SPDX-License-Identifier: APACHE-2.0 +; +; This software is subject to an open source license and is distributed by +; Silicon Laboratories Inc. pursuant to the terms of the Apache License, +; Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. +; +;******************************************************************************************************** + +;******************************************************************************************************** +; +; ASSEMBLY LANGUAGE PORT +; +; ARC +; MetaWare +; +; Filename : os_cpu_a.asm +; Version : V3.08.02 +;******************************************************************************************************** + +#define __ASSEMBLY__ +#include "arc/arc.h" +#include "arc/arc_asm_common.h" + + .text + .align 4 +;******************************************************************************************************** +; PUBLIC FUNCTIONS +;******************************************************************************************************** + + .global task_startup_routine + .global dispatch + .global OSStartHighRdy ; Public functions + + .extern OSTCBCurPtr ; Declared as OS_TCB * , 32-bit long + .extern OSTCBHighRdyPtr ; Declared as OS_TCB * , 32-bit long + .extern OSPrioCur ; Declared as INT8U , 8-bit long + .extern OSPrioHighRdy ; Declared as INT8U , 8-bit long + .extern OSTaskSwHook + .extern OS_Set_StackCheck + +;******************************************************************************************************** +; CODE GENERATION DIRECTIVES +;******************************************************************************************************** + + .text + .align 4 +/* + * task startup routine + * + */ +task_startup_routine: + seti /* unlock cpu */ + mov blink, OS_TaskReturn /* set return address, in normal cases a task should not return */ + POP r1 /* get task function body */ + POP r0 /* get task parameters */ + j [r1] + +;********************************************************************************************************* +; TASK LEVEL CONTEXT SWITCH +; +; Description : This function is called when a task makes a higher priority task ready-to-run. +; The pseudo code is: +; +; OS_CTX_SAVE +; OSTCBCurPtr->SP = SP; +; OSTaskSwHook(); +; OSPrioCur = OSPrioHighRdy; +; OSTCBCurPtr = OSTCBHighRdyPtr; +; SP = OSTCBCurPtr->StkPtr; +; OS_CTX_RESTORE +; Return from interrupt/exception +;********************************************************************************************************* + + .text + .align 4 +dispatch: +/* + * the pre-conditions of this routine are task context, CPU is + * locked, dispatch is enabled. + */ + SAVE_NONSCRATCH_REGS /* save callee save registers */ + mov r1, dispatch_r + PUSH r1 /* save return address */ + ld r0, [OSTCBCurPtr] + bl dispatcher + +/* return routine when task dispatch happened in task context */ +dispatch_r: + RESTORE_NONSCRATCH_REGS /* recover registers */ + j [blink] + +;/*$PAGE*/ +;********************************************************************************************************* +; START MULTITASKING +; +; Description : This function is called by OSStart() to start the highest priority task that was created +; by your application before calling OSStart(). +; +; Arguments : none +; +; Note(s) : 1) The stack frame is assumed to look as follows: +; +; OSTCBHighRdy->OSTCBStkPtr + 0 ----> +; +; 2) OSStartHighRdy() MUST: +; a) Call OSTaskSwHook() then, +; b) Switch to the highest priority task. +;********************************************************************************************************* + +OSStartHighRdy: + clri + mov r0, 0 + st r0, [exc_nest_count] + b dispatcher_0 +dispatcher: + ld r1, [ulCriticalNesting] + PUSH r1 /* save critical nesting */ + st sp, [r0] /* save stack pointer of current task, r0->OSTCBCurPtr */ +dispatcher_0: + jl OSTaskSwHook ; Call OSTaskSwHook() + mov r1, OSPrioHighRdy ; OSPrioCur = OSPrioHighRdy + mov r0, OSPrioCur + ldb r2, [r1] + stb r2, [r0] + ld r1, [OSTCBHighRdyPtr] ; OSTCBCurPtr = OSTCBHighRdyPtr + st r1, [OSTCBCurPtr] + ld r1, [OSTCBCurPtr] ; SP = OSTCBCurPtr->StkPtr + ld sp, [r1] +#if ARC_FEATURE_STACK_CHECK +#if ARC_FEATURE_SEC_PRESENT + lr r0, [AUX_SEC_STAT] + bclr r0, r0, AUX_SEC_STAT_BIT_SSC + sflag r0 +#else + lr r0, [AUX_STATUS32] + bclr r0, r0, AUX_STATUS_BIT_SC + kflag r0 +#endif + jl OS_Set_StackCheck +#if ARC_FEATURE_SEC_PRESENT + lr r0, [AUX_SEC_STAT] + bset r0, r0, AUX_SEC_STAT_BIT_SSC + sflag r0 +#else + lr r0, [AUX_STATUS32] + bset r0, r0, AUX_STATUS_BIT_SC + kflag r0 +#endif +#endif + POP r0 ;get critical nesting + st r0, [ulCriticalNesting] + POP r0 ;return address + j [r0] + + + +/****** exceptions and interrupts handing ******/ +/****** entry for exception handling ******/ + .global exc_entry_cpu + .align 4 +exc_entry_cpu: + + EXCEPTION_PROLOGUE + + mov blink, sp + mov r3, sp /* as exception handler's para(p_excinfo) */ + + ld r0, [exc_nest_count] + add r1, r0, 1 + st r1, [exc_nest_count] + brne r0, 0, exc_handler_1 +/* change to exception stack if interrupt happened in task context */ + mov sp, _e_stack +exc_handler_1: + PUSH blink + + lr r0, [AUX_ECR] + lsr r0, r0, 16 + mov r1, exc_int_handler_table + ld.as r2, [r1, r0] + + mov r0, r3 + jl [r2] /* !!!!jump to exception handler where interrupts are not allowed! */ + +/* interrupts are not allowed */ +ret_exc: + POP sp + mov r1, exc_nest_count + ld r0, [r1] + sub r0, r0, 1 + st r0, [r1] + brne r0, 0, ret_exc_1 /* nest exception case */ + lr r1, [AUX_IRQ_ACT] /* nest interrupt case */ + brne r1, 0, ret_exc_1 + + ld r0, [context_switch_reqflg] + brne r0, 0, ret_exc_2 +ret_exc_1: /* return from non-task context, interrupts or exceptions are nested */ + + EXCEPTION_EPILOGUE + rtie + +/* there is a dispatch request */ +ret_exc_2: + /* clear dispatch request */ + mov r0, 0 + st r0, [context_switch_reqflg] + + ld r0, [OSTCBCurPtr] + breq r0, 0, ret_exc_1 + + SAVE_CALLEE_REGS /* save callee save registers */ + + lr r0, [AUX_STATUS32] + bclr r0, r0, AUX_STATUS_BIT_AE /* clear exception bit */ + kflag r0 + + mov r1, ret_exc_r /* save return address */ + PUSH r1 + + bl dispatcher /* r0->OSTCBCurPtr */ + +ret_exc_r: + /* recover exception status */ + lr r0, [AUX_STATUS32] + bset r0, r0, AUX_STATUS_BIT_AE + kflag r0 + + RESTORE_CALLEE_REGS /* recover registers */ + EXCEPTION_EPILOGUE + rtie + +/****** entry for normal interrupt exception handling ******/ + .global exc_entry_int /* entry for interrupt handling */ + .align 4 +exc_entry_int: +#if ARC_FEATURE_FIRQ == 1 +#if ARC_FEATURE_RGF_NUM_BANKS > 1 + lr r0, [AUX_IRQ_ACT] /* check whether it is P0 interrupt */ + btst r0, 0 + jnz exc_entry_firq +#else + PUSH r10 + lr r10, [AUX_IRQ_ACT] + btst r10, 0 + POP r10 + jnz exc_entry_firq +#endif +#endif + INTERRUPT_PROLOGUE + + mov blink, sp + + clri /* disable interrupt */ + ld r3, [exc_nest_count] + add r2, r3, 1 + st r2, [exc_nest_count] + seti /* enable higher priority interrupt */ + + brne r3, 0, irq_handler_1 +/* change to exception stack if interrupt happened in task context */ + mov sp, _e_stack +#if ARC_FEATURE_STACK_CHECK +#if ARC_FEATURE_SEC_PRESENT + lr r0, [AUX_SEC_STAT] + bclr r0, r0, AUX_SEC_STAT_BIT_SSC + sflag r0 +#else + lr r0, [AUX_STATUS32] + bclr r0, r0, AUX_STATUS_BIT_SC + kflag r0 +#endif +#endif +irq_handler_1: + PUSH blink + + lr r0, [AUX_IRQ_CAUSE] + mov r1, exc_int_handler_table + ld.as r2, [r1, r0] /* r2 = exc_int_handler_table + irqno *4 */ +/* handle software triggered interrupt */ + lr r3, [AUX_IRQ_HINT] + cmp r3, r0 + bne.d irq_hint_handled + xor r3, r3, r3 + sr r3, [AUX_IRQ_HINT] +irq_hint_handled: + + jl [r2] /* jump to interrupt handler */ +/* no interrupts are allowed from here */ +ret_int: + clri /* disable interrupt */ + + POP sp + mov r1, exc_nest_count + ld r0, [r1] + sub r0, r0, 1 + st r0, [r1] +/* if there are multi-bits set in IRQ_ACT, it's still in nest interrupt */ + lr r0, [AUX_IRQ_CAUSE] + sr r0, [AUX_IRQ_SELECT] + lr r3, [AUX_IRQ_PRIORITY] + lr r1, [AUX_IRQ_ACT] + bclr r2, r1, r3 + brne r2, 0, ret_int_1 + + ld r0, [context_switch_reqflg] + brne r0, 0, ret_int_2 +ret_int_1: /* return from non-task context */ + INTERRUPT_EPILOGUE + rtie +/* there is a dispatch request */ +ret_int_2: + /* clear dispatch request */ + mov r0, 0 + st r0, [context_switch_reqflg] + + ld r0, [OSTCBCurPtr] + breq r0, 0, ret_int_1 + +/* r1 has old AUX_IRQ_ACT */ + PUSH r1 +/* clear related bits in IRQ_ACT manually to simulate a irq return */ + sr r2, [AUX_IRQ_ACT] + + SAVE_CALLEE_REGS /* save callee save registers */ + mov r1, ret_int_r /* save return address */ + PUSH r1 + + bl dispatcher /* r0->OSTCBCurPtr */ + +ret_int_r: + RESTORE_CALLEE_REGS /* recover registers */ + POPAX AUX_IRQ_ACT + INTERRUPT_EPILOGUE + rtie + +#if ARC_FEATURE_FIRQ == 1 + .global exc_entry_firq + .align 4 +exc_entry_firq: +#if ARC_FEATURE_STACK_CHECK && ARC_FEATURE_RGF_NUM_BANKS > 1 +#if ARC_FEATURE_SEC_PRESENT + lr r0, [AUX_SEC_STAT] + bclr r0, r0, AUX_SEC_STAT_BIT_SSC + sflag r0 +#else + lr r0, [AUX_STATUS32] + bclr r0, r0, AUX_STATUS_BIT_SC + kflag r0 +#endif +#endif + SAVE_FIQ_EXC_REGS + + mov blink, sp + + ld r3, [exc_nest_count] + add r2, r3, 1 + st r2, [exc_nest_count] + + brne r3, 0, firq_handler_1 +#if ARC_FEATURE_STACK_CHECK && ARC_FEATURE_RGF_NUM_BANKS == 1 +#if ARC_FEATURE_SEC_PRESENT + lr r0, [AUX_SEC_STAT] + bclr r0, r0, AUX_SEC_STAT_BIT_SSC + sflag r0 +#else + lr r0, [AUX_STATUS32] + bclr r0, r0, AUX_STATUS_BIT_SC + kflag r0 +#endif +#endif +/* change to exception stack if interrupt happened in task context */ + mov sp, _e_stack +firq_handler_1: + PUSH blink + + lr r0, [AUX_IRQ_CAUSE] + mov r1, exc_int_handler_table + ld.as r2, [r1, r0] /* r2 = exc_int_handler_table + irqno *4 */ +/* handle software triggered interrupt */ + lr r3, [AUX_IRQ_HINT] + brne r3, r0, firq_hint_handled + xor r3, r3, r3 + sr r3, [AUX_IRQ_HINT] +firq_hint_handled: + + jl [r2] /* jump to interrupt handler */ +/* no interrupts are allowed from here */ +ret_firq: + clri + POP sp + + mov r1, exc_nest_count + ld r0, [r1] + sub r0, r0, 1 + st r0, [r1] +/* if there are multi-bits set in IRQ_ACT, it's still in nest interrupt */ + lr r1, [AUX_IRQ_ACT] + bclr r1, r1, 0 + brne r1, 0, ret_firq_1 + + ld r0, [context_switch_reqflg] + brne r0, 0, ret_firq_2 +ret_firq_1: /* return from non-task context */ + RESTORE_FIQ_EXC_REGS + rtie +/* there is a dispatch request */ +ret_firq_2: + /* clear dispatch request */ + mov r0, 0 + st r0, [context_switch_reqflg] + + ld r0, [OSTCBCurPtr] + breq r0, 0, ret_firq_1 + +/* reconstruct the interruptted context + * When ARC_FEATURE_RGF_BANKED_REGS >= 16 (16, 32), sp is banked + * so need to restore the fast irq stack. + */ +#if ARC_FEATURE_RGF_BANKED_REGS >= 16 + RESTORE_LP_REGS +#if ARC_FEATURE_CODE_DENSITY + RESTORE_CODE_DENSITY +#endif + RESTORE_R58_R59 +#endif + +/* when BANKED_REGS == 16, r4-r9 wiil be also saved in fast irq stack + * so pop them out + */ +#if ARC_FEATURE_RGF_BANKED_REGS == 16 && !defined(ARC_FEATURE_RF16) + POP r9 + POP r8 + POP r7 + POP r6 + POP r5 + POP r4 +#endif + +/* for other cases, unbanked regs are already in interrupted context's stack, + * so just need to save and pop the banked regs + */ + +/* save the interruptted context */ +#if ARC_FEATURE_RGF_BANKED_REGS > 0 +/* switch back to bank0 */ + lr r0, [AUX_STATUS32] + bic r0, r0, 0x70000 + kflag r0 +#endif + +#if ARC_FEATURE_RGF_BANKED_REGS == 4 +/* r4 - r12, gp, fp, r30, blink already saved */ + PUSH r0 + PUSH r1 + PUSH r2 + PUSH r3 +#elif ARC_FEATURE_RGF_BANKED_REGS == 8 +/* r4 - r9, r0, r11 gp, fp, r30, blink already saved */ + PUSH r0 + PUSH r1 + PUSH r2 + PUSH r3 + PUSH r12 +#elif ARC_FEATURE_RGF_BANKED_REGS >= 16 +/* nothing is saved, */ + SAVE_R0_TO_R12 + + SAVE_R58_R59 + PUSH gp + PUSH fp + PUSH r30 /* general purpose */ + PUSH blink + +#if ARC_FEATURE_CODE_DENSITY + SAVE_CODE_DENSITY +#endif + SAVE_LP_REGS +#endif + PUSH ilink + lr r0, [AUX_STATUS32_P0] + PUSH r0 + lr r0, [AUX_IRQ_ACT] + PUSH r0 + bclr r0, r0, 0 + sr r0, [AUX_IRQ_ACT] + + SAVE_CALLEE_REGS /* save callee save registers */ + + mov r1, ret_firq_r /* save return address */ + PUSH r1 + ld r0, [OSTCBCurPtr] + bl dispatcher /* r0->OSTCBCurPtr */ + +ret_firq_r: + RESTORE_CALLEE_REGS /* recover registers */ + POPAX AUX_IRQ_ACT + POPAX AUX_STATUS32_P0 + POP ilink + +#if ARC_FEATURE_RGF_NUM_BANKS > 1 +#if ARC_FEATURE_RGF_BANKED_REGS == 4 +/* r4 - r12, gp, fp, r30, blink already saved */ + POP r3 + POP r2 + POP r1 + POP r0 + RESTORE_FIQ_EXC_REGS +#elif ARC_FEATURE_RGF_BANKED_REGS == 8 +/* r4 - r9, gp, fp, r30, blink already saved */ + POP r12 + POP r3 + POP r2 + POP r1 + POP r0 + RESTORE_FIQ_EXC_REGS +#elif ARC_FEATURE_RGF_BANKED_REGS >= 16 + RESTORE_LP_REGS +#if ARC_FEATURE_CODE_DENSITY + RESTORE_CODE_DENSITY +#endif + POP blink + POP r30 + POP fp + POP gp + + RESTORE_R58_R59 + RESTORE_R0_TO_R12 +#endif /* ARC_FEATURE_RGF_BANKED_REGS */ +#else + RESTORE_FIQ_EXC_REGS +#endif /* ARC_FEATURE_RGF_NUM_BANKS */ + rtie +#endif diff --git a/Ports/ARC/embARC/MetaWare/os_cpu_c.c b/Ports/ARC/embARC/MetaWare/os_cpu_c.c new file mode 100644 index 0000000..f36df29 --- /dev/null +++ b/Ports/ARC/embARC/MetaWare/os_cpu_c.c @@ -0,0 +1,414 @@ +/* +********************************************************************************************************* +* uC/OS-III +* The Real-Time Kernel +* +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com +* +* SPDX-License-Identifier: APACHE-2.0 +* +* This software is subject to an open source license and is distributed by +* Silicon Laboratories Inc. pursuant to the terms of the Apache License, +* Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. +* +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* +* ARC +* MetaWare +* +* Filename : os_cpu_c.c +* Version : V3.08.02 +********************************************************************************************************* + +*/ + +#define OS_CPU_GLOBALS + +#ifdef VSC_INCLUDE_SOURCE_FILE_NAMES +const CPU_CHAR *os_cpu_c__c = "$Id: $"; +#endif + +/* +********************************************************************************************************* +* INCLUDE FILES +********************************************************************************************************* +*/ + +#include "os.h" + +#ifdef __cplusplus +extern "C" { +#endif + +extern void task_startup_routine(void); +extern void dispatch(void); +uint32_t exc_nest_count; +volatile uint32_t ulCriticalNesting = 999UL; +volatile unsigned int context_switch_reqflg; +/* +********************************************************************************************************* +* LOCAL DEFINES +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* IDLE TASK HOOK +* +* Description: This function is called by the idle task. This hook has been added to allow you to do +* such things as STOP the CPU to conserve power. +* +* Arguments : None. +* +* Note(s) : None. +********************************************************************************************************* +*/ + +void OSIdleTaskHook (void) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppIdleTaskHookPtr != (OS_APP_HOOK_VOID)0) { + (*OS_AppIdleTaskHookPtr)(); + } +#endif +} + + +/* +********************************************************************************************************* +* OS INITIALIZATION HOOK +* +* Description: This function is called by OSInit() at the beginning of OSInit(). +* +* Arguments : None. +* +* Note(s) : None. +********************************************************************************************************* +*/ + +void OSInitHook (void) +{ + OS_SysTickInit(); +} + + +/* +********************************************************************************************************* +* REDZONE HIT HOOK +* +* Description: This function is called when a task's stack overflowed. +* +* Arguments : p_tcb Pointer to the task control block of the offending task. +* +* Note(s) : None. +********************************************************************************************************* +*/ +#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED) +void OSRedzoneHitHook (OS_TCB *p_tcb) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppRedzoneHitHookPtr != (OS_APP_HOOK_TCB)0) { + (*OS_AppRedzoneHitHookPtr)(p_tcb); + } +#endif + (void)p_tcb; /* Prevent compiler warning */ + CPU_SW_EXCEPTION(;); +} +#endif + + +/* +********************************************************************************************************* +* STATISTIC TASK HOOK +* +* Description: This function is called periodically by uC/OS-III's statistics task. This allows your +* application to add functionality to the statistics task. +* +* Arguments : None. +* +* Note(s) : None. +********************************************************************************************************* +*/ + +void OSStatTaskHook (void) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppStatTaskHookPtr != (OS_APP_HOOK_VOID)0) { + (*OS_AppStatTaskHookPtr)(); + } +#endif +} + + +/* +********************************************************************************************************* +* TASK CREATION HOOK +* +* Description: This function is called when a task is created. +* +* Arguments : p_tcb Pointer to the task control block of the task being created. +* +* Note(s) : None. +********************************************************************************************************* +*/ + +void OSTaskCreateHook (OS_TCB *p_tcb) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppTaskCreateHookPtr != (OS_APP_HOOK_TCB)0) { + (*OS_AppTaskCreateHookPtr)(p_tcb); + } +#else + (void)p_tcb; /* Prevent compiler warning */ +#endif +} + + +/* +********************************************************************************************************* +* TASK DELETION HOOK +* +* Description: This function is called when a task is deleted. +* +* Arguments : p_tcb Pointer to the task control block of the task being deleted. +* +* Note(s) : None. +********************************************************************************************************* +*/ + +void OSTaskDelHook (OS_TCB *p_tcb) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppTaskDelHookPtr != (OS_APP_HOOK_TCB)0) { + (*OS_AppTaskDelHookPtr)(p_tcb); + } +#else + (void)p_tcb; /* Prevent compiler warning */ +#endif +} + + +/* +********************************************************************************************************* +* TASK RETURN HOOK +* +* Description: This function is called if a task accidentally returns. In other words, a task should +* either be an infinite loop or delete itself when done. +* +* Arguments : p_tcb Pointer to the task control block of the task that is returning. +* +* Note(s) : None. +********************************************************************************************************* +*/ + +void OSTaskReturnHook (OS_TCB *p_tcb) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppTaskReturnHookPtr != (OS_APP_HOOK_TCB)0) { + (*OS_AppTaskReturnHookPtr)(p_tcb); + } +#else + (void)p_tcb; /* Prevent compiler warning */ +#endif +} + + +/* +********************************************************************************************************** +* INITIALIZE A TASK'S STACK +* +* Description: This function is called by OS_Task_Create() or OSTaskCreateExt() to initialize the stack +* frame of the task being created. This function is highly processor specific. +* +* Arguments : p_task Pointer to the task entry point address. +* +* p_arg Pointer to a user supplied data area that will be passed to the task +* when the task first executes. +* +* p_stk_base Pointer to the base address of the stack. +* +* stk_size Size of the stack, in number of CPU_STK elements. +* +* opt Options used to alter the behavior of OS_Task_StkInit(). +* (see OS.H for OS_TASK_OPT_xxx). +* +* Returns : Always returns the location of the new top-of-stack' once the processor registers have +* been placed on the stack in the proper order. +* +* Note(s) : 1) Interrupts are enabled when task starts executing. +********************************************************************************************************** +*/ + +CPU_STK *OSTaskStkInit (OS_TASK_PTR p_task, + void *p_arg, + CPU_STK *p_stk_base, + CPU_STK *p_stk_limit, + CPU_STK_SIZE stk_size, + OS_OPT opt) +{ + CPU_STK *p_stk; + + + (void)p_stk_limit; /* Prevent compiler warning */ + (void)opt; + + p_stk = &p_stk_base[stk_size]; /* Load stack pointer */ + /* Put CPU register values onto the stack */ + + *(--p_stk) = (CPU_STK) p_arg; + *(--p_stk) = (CPU_STK) p_task; + *(--p_stk) = (CPU_STK) task_startup_routine; //dispatch return address + *(--p_stk) = (CPU_STK) 0u; //preserve a place for critical nesting counter + return (p_stk); +} + + +void OSCtxSw(void) +{ + CPU_SR_ALLOC(); + CPU_CRITICAL_ENTER(); + dispatch(); + CPU_CRITICAL_EXIT(); +} + +void OSIntCtxSw(void) +{ + CPU_SR_ALLOC(); + CPU_CRITICAL_ENTER(); + context_switch_reqflg = true; + CPU_CRITICAL_EXIT(); +} + +/* +********************************************************************************************************* +* TASK SWITCH HOOK +* +* Description: This function is called when a task switch is performed. This allows you to perform other +* operations during a context switch. +* +* Arguments : None. +* +* Note(s) : 1) Interrupts are disabled during this call. +* 2) It is assumed that the global pointer 'OSTCBHighRdyPtr' points to the TCB of the task +* that will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCurPtr' points +* to the task being switched out (i.e. the preempted task). +********************************************************************************************************* +*/ + +void OSTaskSwHook (void) +{ +#if OS_CFG_TASK_PROFILE_EN > 0u + CPU_TS ts; +#endif +#ifdef CPU_CFG_INT_DIS_MEAS_EN + CPU_TS int_dis_time; +#endif +#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED) + CPU_BOOLEAN stk_status; +#endif + + +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppTaskSwHookPtr != (OS_APP_HOOK_VOID)0) { + (*OS_AppTaskSwHookPtr)(); + } +#endif + +#if OS_CFG_TASK_PROFILE_EN > 0u + ts = OS_TS_GET(); + if (OSTCBCurPtr != OSTCBHighRdyPtr) { + OSTCBCurPtr->CyclesDelta = ts - OSTCBCurPtr->CyclesStart; + OSTCBCurPtr->CyclesTotal += (OS_CYCLES)OSTCBCurPtr->CyclesDelta; + } + + OSTCBHighRdyPtr->CyclesStart = ts; +#endif + +#ifdef CPU_CFG_INT_DIS_MEAS_EN + int_dis_time = CPU_IntDisMeasMaxCurReset(); /* Keep track of per-task interrupt disable time */ + if (OSTCBCurPtr->IntDisTimeMax < int_dis_time) { + OSTCBCurPtr->IntDisTimeMax = int_dis_time; + } +#endif + +#if OS_CFG_SCHED_LOCK_TIME_MEAS_EN > 0u + /* Keep track of per-task scheduler lock time */ + if (OSTCBCurPtr->SchedLockTimeMax < OSSchedLockTimeMaxCur) { + OSTCBCurPtr->SchedLockTimeMax = OSSchedLockTimeMaxCur; + } + OSSchedLockTimeMaxCur = (CPU_TS)0; /* Reset the per-task value */ +#endif + +#if (OS_CFG_TASK_STK_REDZONE_EN == DEF_ENABLED) + /* Check if stack overflowed. */ + stk_status = OSTaskStkRedzoneChk(DEF_NULL); + if (stk_status != DEF_OK) { + CPU_SW_EXCEPTION(;); + } +#endif +} + + +/* +********************************************************************************************************* +* TICK HOOK +* +* Description: This function is called every tick. +* +* Arguments : None. +* +* Note(s) : 1) This function is assumed to be called from the Tick ISR. +********************************************************************************************************* +*/ + +void OSTimeTickHook (void) +{ +#if OS_CFG_APP_HOOKS_EN > 0u + if (OS_AppTimeTickHookPtr != (OS_APP_HOOK_VOID)0) { + (*OS_AppTimeTickHookPtr)(); + } +#endif +#if (CPU_CFG_TS_EN == DEF_ENABLED) + CPU_TS_Update(); +#endif +} + +static void OS_CPU_SysTickHandler (void) +{ + CPU_SR_ALLOC(); + + + CPU_CRITICAL_ENTER(); + OSIntEnter(); /* Tell uC/OS-III that we are starting an ISR */ + CPU_CRITICAL_EXIT(); + + OSTimeTick(); /* Call uC/OS-III's OSTimeTick() */ + + OSIntExit(); /* Tell uC/OS-III that we are leaving the ISR */ +} + +extern EMBARC_HOOK_VOID board_timer_isr_hook; + +int OS_SysTickInit(void) +{ + board_timer_isr_hook = OS_CPU_SysTickHandler; + + return 0; +} + +void OS_Set_StackCheck(OS_TCB *old, OS_TCB *new) +{ + (void)old; + if (new != NULL) { + arc_kernel_stack_check_configure((uint32_t)(new->StkBasePtr), (uint32_t)(new->StkSize + new->StkBasePtr)); + } +} + +#ifdef __cplusplus +} +#endif + diff --git a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu.h b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu.h index 892da84..80dc038 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu.h +++ b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-A Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-A Cortex-A * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d16.s b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d16.s index 631970b..1ee47d9 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d16.s +++ b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d16.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-d16.s -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d32.s b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d32.s index 69bfca6..8c65bad 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d32.s +++ b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d32.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-d32.s -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-none.s b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-none.s index b133f41..e5b1bdb 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-none.s +++ b/Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-none.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-none.s -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu.h b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu.h index 3f8a2bd..91b644f 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu.h +++ b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-A Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-A Cortex-A * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d16.asm b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d16.asm index 617366f..efee445 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d16.asm +++ b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d16.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-d16.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d32.asm b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d32.asm index 7fa016f..19e0f4d 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d32.asm +++ b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d32.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-d32.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-none.asm b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-none.asm index d2c27ef..1943732 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-none.asm +++ b/Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-none.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-none.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu.h b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu.h index 56d5eee..9af30ce 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu.h +++ b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-A Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-A Cortex-A * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d16.S b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d16.S index 45f3104..dd454ab 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d16.S +++ b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d16.S @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -17,7 +17,7 @@ @ ARMv7-A Port @ @ File : os_cpu_a_vfp-d16.S -@ Version : V3.08.01 +@ Version : V3.08.02 @******************************************************************************************************** @ For : ARM7 or ARM9 @ Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d32.S b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d32.S index 0764b01..a0a9527 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d32.S +++ b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d32.S @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -17,7 +17,7 @@ @ ARMv7-A Port @ @ File : os_cpu_a_vfp-d32.S -@ Version : V3.08.01 +@ Version : V3.08.02 @******************************************************************************************************** @ For : ARM7 or ARM9 @ Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-none.S b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-none.S index 6b03878..cf18926 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-none.S +++ b/Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-none.S @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -17,7 +17,7 @@ @ ARMv7-A Port @ @ File : os_cpu_a_vfp-none.S -@ Version : V3.08.01 +@ Version : V3.08.02 @******************************************************************************************************** @ For : ARM7 or ARM9 @ Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu.h b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu.h index 7658168..b0eff25 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu.h +++ b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * ARMv7-A Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-A Cortex-A * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d16.asm b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d16.asm index 48ca691..fe330d9 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d16.asm +++ b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d16.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-d16.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d32.asm b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d32.asm index 5288977..2f069cb 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d32.asm +++ b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d32.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-d32.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-none.asm b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-none.asm index 3ea9394..90eaffe 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-none.asm +++ b/Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-none.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-A Port ; ; File : os_cpu_a_vfp-none.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv7-A/os_cpu_c.c b/Ports/ARM-Cortex-A/ARMv7-A/os_cpu_c.c index db2e50d..8d92ec0 100644 --- a/Ports/ARM-Cortex-A/ARMv7-A/os_cpu_c.c +++ b/Ports/ARM-Cortex-A/ARMv7-A/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-A Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-A Cortex-A * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu.h b/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu.h index 9b6164c..f8cf9db 100644 --- a/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu.h +++ b/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv8-A Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv8-A Cortex-A * Mode : ARM64 diff --git a/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu_a.S b/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu_a.S index 28431dd..5ed5d17 100644 --- a/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu_a.S +++ b/Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu_a.S @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv8-A Port * * File : os_cpu_a.S -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv8-A Cortex-A * Mode : ARM64 diff --git a/Ports/ARM-Cortex-A/ARMv8-A/os_cpu_c.c b/Ports/ARM-Cortex-A/ARMv8-A/os_cpu_c.c index 5fd8e17..c177890 100644 --- a/Ports/ARM-Cortex-A/ARMv8-A/os_cpu_c.c +++ b/Ports/ARM-Cortex-A/ARMv8-A/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv8-A Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv8-A Cortex-A * Mode : ARM64 diff --git a/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu.h b/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu.h index cb4a690..c2087e9 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv6-M Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv6-M Cortex-M0 or Cortex-M0+ * Mode : Thumb2 diff --git a/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu_a.s b/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu_a.s index 0fbf90d..5602d76 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu_a.s +++ b/Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu_a.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv6-M Port ; ; File : os_cpu_a.s -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARMv6-M Cortex-M0 or Cortex-M0+ ; Mode : Thumb2 diff --git a/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu.h b/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu.h index e142b45..f0dad19 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv6-M Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv6-M Cortex-M0 or Cortex-M0+ * Mode : Thumb2 diff --git a/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu_a.s b/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu_a.s index c13f932..5e41230 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu_a.s +++ b/Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu_a.s @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -17,7 +17,7 @@ @ ARMv6-M Port @ @ File : os_cpu_a.s -@ Version : V3.08.01 +@ Version : V3.08.02 @******************************************************************************************************** @ For : ARMv6-M Cortex-M0 or Cortex-M0+ @ Mode : Thumb2 diff --git a/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu.h b/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu.h index 34a303a..372ac1d 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv6-M Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv6-M Cortex-M0 or Cortex-M0+ * Mode : Thumb2 diff --git a/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu_a.asm b/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu_a.asm index 54fbc60..28a4c2a 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu_a.asm +++ b/Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv6-M Port ; ; File : os_cpu_a.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARMv6-M Cortex-M0 or Cortex-M0+ ; Mode : Thumb2 diff --git a/Ports/ARM-Cortex-M/ARMv6-M/os_cpu_c.c b/Ports/ARM-Cortex-M/ARMv6-M/os_cpu_c.c index d4bf802..60f81df 100644 --- a/Ports/ARM-Cortex-M/ARMv6-M/os_cpu_c.c +++ b/Ports/ARM-Cortex-M/ARMv6-M/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv6-M Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv6-M Cortex-M0 or Cortex-M0+ * Mode : Thumb2 @@ -279,8 +279,8 @@ void OSTaskReturnHook (OS_TCB *p_tcb) * prior to ARMV7 and to the A, R and M architecture profiles thereafter. Special considerations * associated with ARMV7M are discussed in section 2.3.3" * -* (1) Even if the SP 8-byte aligment is not a requirement for the ARMv7M profile, the stack is aligned -* to 8-byte boundaries to support legacy execution enviroments. +* (1) Even if the SP 8-byte alignment is not a requirement for the ARMv7M profile, the stack is aligned +* to 8-byte boundaries to support legacy execution environments. * * (c) Section 5.2.1.2 from the Procedure Call Standard for the ARM * architecture states : "The stack must also conform to the following @@ -288,7 +288,7 @@ void OSTaskReturnHook (OS_TCB *p_tcb) * * (1) SP mod 8 = 0. The stack must be double-word aligned" * -* (d) From the ARM Technical Support Knowledge Base. 8 Byte stack aligment. +* (d) From the ARM Technical Support Knowledge Base. 8 Byte stack alignment. * * "8 byte stack alignment is a requirement of the ARM Architecture Procedure * Call Standard [AAPCS]. This specifies that functions must maintain an 8 byte diff --git a/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu.h b/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu.h index c85da50..adba481 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-M Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 * * For : ARMv7-M Cortex-M * Mode : Thumb-2 ISA diff --git a/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu_a.asm b/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu_a.asm index 90f4797..817e252 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu_a.asm +++ b/Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-M Port ; ; File : os_cpu_a.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARMv7-M Cortex-M ; Mode : Thumb-2 ISA diff --git a/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu.h b/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu.h index d55cc24..37c3dfe 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-M Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-M Cortex-M * Mode : Thumb-2 ISA diff --git a/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu_a.asm b/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu_a.asm index 4f65ad6..f1dde12 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu_a.asm +++ b/Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-M Port ; ; File : os_cpu_s.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARMv7-M Cortex-M ; Mode : Thumb-2 ISA diff --git a/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu.h b/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu.h index d0f2236..8bfbc75 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-M Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-M Cortex-M * Mode : Thumb-2 ISA diff --git a/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu_a.S b/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu_a.S index e1d82c3..f8505c6 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu_a.S +++ b/Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu_a.S @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -17,7 +17,7 @@ @ ARMv7-M Port @ @ File : os_cpu_a.asm -@ Version : V3.08.01 +@ Version : V3.08.02 @******************************************************************************************************** @ For : ARMv7-M Cortex-M @ Mode : Thumb-2 ISA @@ -157,6 +157,7 @@ OSStartHighRdy: .thumb_func OSCtxSw: +.thumb_func OSIntCtxSw: LDR R0, =NVIC_INT_CTRL @ Trigger the PendSV exception (causes context switch) LDR R1, =NVIC_PENDSVSET diff --git a/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu.h b/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu.h index d59cc8a..729be3a 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu.h +++ b/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-M Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-M Cortex-M * Mode : Thumb-2 ISA diff --git a/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu_a.asm b/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu_a.asm index c0eaad7..fdb0aa3 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu_a.asm +++ b/Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-M Port ; ; File : os_cpu_a.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARMv7-M Cortex-M ; Mode : Thumb-2 ISA diff --git a/Ports/ARM-Cortex-M/ARMv7-M/os_cpu_c.c b/Ports/ARM-Cortex-M/ARMv7-M/os_cpu_c.c index ceab816..0a20852 100644 --- a/Ports/ARM-Cortex-M/ARMv7-M/os_cpu_c.c +++ b/Ports/ARM-Cortex-M/ARMv7-M/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-M Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-M Cortex-M * Mode : Thumb-2 ISA @@ -404,8 +404,8 @@ void OSTaskReturnHook (OS_TCB *p_tcb) * prior to ARMV7 and to the A, R and M architecture profiles thereafter. Special considerations * associated with ARMV7M are discussed in section 2.3.3" * -* (1) Even if the SP 8-byte aligment is not a requirement for the ARMv7M profile, the stack is aligned -* to 8-byte boundaries to support legacy execution enviroments. +* (1) Even if the SP 8-byte alignment is not a requirement for the ARMv7M profile, the stack is aligned +* to 8-byte boundaries to support legacy execution environments. * * (c) Section 5.2.1.2 from the Procedure Call Standard for the ARM * architecture states : "The stack must also conform to the following @@ -413,7 +413,7 @@ void OSTaskReturnHook (OS_TCB *p_tcb) * * (1) SP mod 8 = 0. The stack must be double-word aligned" * -* (d) From the ARM Technical Support Knowledge Base. 8 Byte stack aligment. +* (d) From the ARM Technical Support Knowledge Base. 8 Byte stack alignment. * * "8 byte stack alignment is a requirement of the ARM Architecture Procedure * Call Standard [AAPCS]. This specifies that functions must maintain an 8 byte diff --git a/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu.h b/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu.h index a009765..172613c 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu.h +++ b/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-R Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-R Cortex-R * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-d16.s b/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-d16.s index c205303..9803421 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-d16.s +++ b/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-d16.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-R Port ; ; File : os_cpu_a_vfp-d16.s -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARMv7-R Cortex-R ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-none.s b/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-none.s index 1a10d8f..75d77ba 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-none.s +++ b/Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-none.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-R Port ; ; File : os_cpu_a_vfp-none.s -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARMv7-R Cortex-R ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu.h b/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu.h index 76107bf..f1db4e0 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu.h +++ b/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-R Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-R Cortex-R * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-d16.asm b/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-d16.asm index 5f3e249..0391c5e 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-d16.asm +++ b/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-d16.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-R Port ; ; File : os_cpu_a_vfp-d16.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARMv7-R Cortex-R ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-none.asm b/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-none.asm index d202a6a..ce6fa37 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-none.asm +++ b/Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-none.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-R Port ; ; File : os_cpu_a_vfp-none.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARMv7-R Cortex-R ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu.h b/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu.h index 83cc47d..2871796 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu.h +++ b/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-R Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-R Cortex-R * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-d16.S b/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-d16.S index 91b5fc2..19ae40c 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-d16.S +++ b/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-d16.S @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -17,7 +17,7 @@ @ ARMv7-R Port @ @ File : os_cpu_a_vfp-d16.S -@ Version : V3.08.01 +@ Version : V3.08.02 @******************************************************************************************************** @ For : ARMv7-R Cortex-R @ Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-none.S b/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-none.S index f26e31c..568960f 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-none.S +++ b/Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-none.S @@ -2,7 +2,7 @@ @ uC/OS-III @ The Real-Time Kernel @ -@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +@ Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com @ @ SPDX-License-Identifier: APACHE-2.0 @ @@ -17,7 +17,7 @@ @ ARMv7-R Port @ @ File : os_cpu_a_vfp-none.S -@ Version : V3.08.01 +@ Version : V3.08.02 @******************************************************************************************************** @ For : ARMv7-R Cortex-R @ Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu.h b/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu.h index 5521327..56e9887 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu.h +++ b/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ARMv7-R Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-R Cortex-R * Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-d16.asm b/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-d16.asm index 35bad0c..9aef93a 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-d16.asm +++ b/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-d16.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-R Port ; ; File : os_cpu_a_vfp-d16.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARMv7-R Cortex-R ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-none.asm b/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-none.asm index fd8791f..5a1640a 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-none.asm +++ b/Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-none.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ARMv7-R Port ; ; File : os_cpu_a_vfp-none.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARMv7-R Cortex-R ; Mode : ARM or Thumb diff --git a/Ports/ARM-Cortex-R/ARMv7-R/os_cpu_c.c b/Ports/ARM-Cortex-R/ARMv7-R/os_cpu_c.c index 664501a..8cad1d6 100644 --- a/Ports/ARM-Cortex-R/ARMv7-R/os_cpu_c.c +++ b/Ports/ARM-Cortex-R/ARMv7-R/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * ARMv7-R Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARMv7-R Cortex-R * Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/IAR/os_cpu.h b/Ports/ARM/Generic/IAR/os_cpu.h index 852afa6..60de11d 100644 --- a/Ports/ARM/Generic/IAR/os_cpu.h +++ b/Ports/ARM/Generic/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ARM Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARM7 or ARM9 * Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/IAR/os_cpu_a.asm b/Ports/ARM/Generic/IAR/os_cpu_a.asm index 6460e86..665fd1d 100644 --- a/Ports/ARM/Generic/IAR/os_cpu_a.asm +++ b/Ports/ARM/Generic/IAR/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Generic ARM Port ; ; File : os_cpu_a.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/IAR/os_cpu_c.c b/Ports/ARM/Generic/IAR/os_cpu_c.c index 3850603..de12317 100644 --- a/Ports/ARM/Generic/IAR/os_cpu_c.c +++ b/Ports/ARM/Generic/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ARM Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARM7 or ARM9 * Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/IAR/os_cpu_fpu_a.asm b/Ports/ARM/Generic/IAR/os_cpu_fpu_a.asm index a8a1efa..c461256 100644 --- a/Ports/ARM/Generic/IAR/os_cpu_fpu_a.asm +++ b/Ports/ARM/Generic/IAR/os_cpu_fpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; VFP SUPPORT ; ; File : os_cpu_fpu_a.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/IAR/os_dcc.c b/Ports/ARM/Generic/IAR/os_dcc.c index 0f653e7..3b18ca9 100644 --- a/Ports/ARM/Generic/IAR/os_dcc.c +++ b/Ports/ARM/Generic/IAR/os_dcc.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * DCC Communication * * File : os_dcc.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARM7 or ARM9 * Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/RealView/os_cpu.h b/Ports/ARM/Generic/RealView/os_cpu.h index 4533b72..81ffefa 100644 --- a/Ports/ARM/Generic/RealView/os_cpu.h +++ b/Ports/ARM/Generic/RealView/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ARM Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARM7 or ARM9 * Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/RealView/os_cpu_a.s b/Ports/ARM/Generic/RealView/os_cpu_a.s index 2761511..1cb3aa4 100644 --- a/Ports/ARM/Generic/RealView/os_cpu_a.s +++ b/Ports/ARM/Generic/RealView/os_cpu_a.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Generic ARM Port ; ; File : os_cpu_a.s -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : ARM7 or ARM9 ; Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/RealView/os_cpu_c.c b/Ports/ARM/Generic/RealView/os_cpu_c.c index 3a185df..03867d4 100644 --- a/Ports/ARM/Generic/RealView/os_cpu_c.c +++ b/Ports/ARM/Generic/RealView/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ARM Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARM7 or ARM9 * Mode : ARM or Thumb diff --git a/Ports/ARM/Generic/RealView/os_dcc.c b/Ports/ARM/Generic/RealView/os_dcc.c index 3f56155..b4f3c0e 100644 --- a/Ports/ARM/Generic/RealView/os_dcc.c +++ b/Ports/ARM/Generic/RealView/os_dcc.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * DCC Communication * * File : os_dcc.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : ARM7 or ARM9 * Mode : ARM or Thumb diff --git a/Ports/AVR/ATxmega128/IAR/os_cpu.h b/Ports/AVR/ATxmega128/IAR/os_cpu.h index 9bfd16f..30b06ae 100644 --- a/Ports/AVR/ATxmega128/IAR/os_cpu.h +++ b/Ports/AVR/ATxmega128/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR Xmega Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/AVR/ATxmega128/IAR/os_cpu_a.s90 b/Ports/AVR/ATxmega128/IAR/os_cpu_a.s90 index c781e93..9a0613c 100644 --- a/Ports/AVR/ATxmega128/IAR/os_cpu_a.s90 +++ b/Ports/AVR/ATxmega128/IAR/os_cpu_a.s90 @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ATMEL AVR Xmega Port ; ; File : os_cpu_a.s90 -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ;******************************************************************************************************** diff --git a/Ports/AVR/ATxmega128/IAR/os_cpu_c.c b/Ports/AVR/ATxmega128/IAR/os_cpu_c.c index 96cf1de..d0c96ee 100644 --- a/Ports/AVR/ATxmega128/IAR/os_cpu_c.c +++ b/Ports/AVR/ATxmega128/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR Xmega Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* diff --git a/Ports/AVR/ATxmega128/IAR/os_cpu_i.s90 b/Ports/AVR/ATxmega128/IAR/os_cpu_i.s90 index 205cb7e..fb9a508 100644 --- a/Ports/AVR/ATxmega128/IAR/os_cpu_i.s90 +++ b/Ports/AVR/ATxmega128/IAR/os_cpu_i.s90 @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; ATMEL AVR Xmega Port ; ; File : os_cpu_i.s90 -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** diff --git a/Ports/AVR32/AP7000/IAR/os_cpu.h b/Ports/AVR32/AP7000/IAR/os_cpu.h index 2983090..aef7771 100644 --- a/Ports/AVR32/AP7000/IAR/os_cpu.h +++ b/Ports/AVR32/AP7000/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * ATMEL AVR32 AP7000 Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* diff --git a/Ports/AVR32/AP7000/IAR/os_cpu_a.asm b/Ports/AVR32/AP7000/IAR/os_cpu_a.asm index 89f0c5a..2af09f8 100644 --- a/Ports/AVR32/AP7000/IAR/os_cpu_a.asm +++ b/Ports/AVR32/AP7000/IAR/os_cpu_a.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * ATMEL AVR32 AP7000 Port * * File : os_cpu_a.asm -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* diff --git a/Ports/AVR32/AP7000/IAR/os_cpu_c.c b/Ports/AVR32/AP7000/IAR/os_cpu_c.c index fc59704..7af1cd6 100644 --- a/Ports/AVR32/AP7000/IAR/os_cpu_c.c +++ b/Ports/AVR32/AP7000/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * ATMEL AVR32 AP7000 Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* diff --git a/Ports/AVR32/UC3/AtmelStudio6/os_cpu.h b/Ports/AVR32/UC3/AtmelStudio6/os_cpu.h index 8ef3508..690c855 100644 --- a/Ports/AVR32/UC3/AtmelStudio6/os_cpu.h +++ b/Ports/AVR32/UC3/AtmelStudio6/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR32 UC3 Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : Atmel Studios ********************************************************************************************************* diff --git a/Ports/AVR32/UC3/AtmelStudio6/os_cpu_a.S b/Ports/AVR32/UC3/AtmelStudio6/os_cpu_a.S index f9af2c9..bcce2fc 100644 --- a/Ports/AVR32/UC3/AtmelStudio6/os_cpu_a.S +++ b/Ports/AVR32/UC3/AtmelStudio6/os_cpu_a.S @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR32 UC3 Port * * File : os_cpu_a.S -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : Atmel Studios ********************************************************************************************************* diff --git a/Ports/AVR32/UC3/AtmelStudio6/os_cpu_c.c b/Ports/AVR32/UC3/AtmelStudio6/os_cpu_c.c index ab2d8e4..ace3316 100644 --- a/Ports/AVR32/UC3/AtmelStudio6/os_cpu_c.c +++ b/Ports/AVR32/UC3/AtmelStudio6/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR32 UC3 Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : Atmel Studios ********************************************************************************************************* diff --git a/Ports/AVR32/UC3/IAR/os_cpu.h b/Ports/AVR32/UC3/IAR/os_cpu.h index 72fe5af..9d4a36f 100644 --- a/Ports/AVR32/UC3/IAR/os_cpu.h +++ b/Ports/AVR32/UC3/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR32 UC3 Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* diff --git a/Ports/AVR32/UC3/IAR/os_cpu_a.asm b/Ports/AVR32/UC3/IAR/os_cpu_a.asm index e90f092..6e0ea56 100644 --- a/Ports/AVR32/UC3/IAR/os_cpu_a.asm +++ b/Ports/AVR32/UC3/IAR/os_cpu_a.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR32 UC3 Port * * File : os_cpu_a.asm -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* diff --git a/Ports/AVR32/UC3/IAR/os_cpu_c.c b/Ports/AVR32/UC3/IAR/os_cpu_c.c index dc83a7e..f642b0b 100644 --- a/Ports/AVR32/UC3/IAR/os_cpu_c.c +++ b/Ports/AVR32/UC3/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * ATMEL AVR32 UC3 Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : IAR AVR32 ********************************************************************************************************* diff --git a/Ports/Blackfin/VDSP++/os_cpu.h b/Ports/Blackfin/VDSP++/os_cpu.h index 046b8e4..6e582d0 100644 --- a/Ports/Blackfin/VDSP++/os_cpu.h +++ b/Ports/Blackfin/VDSP++/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -25,7 +25,7 @@ * development team * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/Blackfin/VDSP++/os_cpu_a.asm b/Ports/Blackfin/VDSP++/os_cpu_a.asm index d603a7b..915794d 100644 --- a/Ports/Blackfin/VDSP++/os_cpu_a.asm +++ b/Ports/Blackfin/VDSP++/os_cpu_a.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -25,7 +25,7 @@ * development team * * File : os_cpu_a.asm -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/Blackfin/VDSP++/os_cpu_c.c b/Ports/Blackfin/VDSP++/os_cpu_c.c index 533705c..f255214 100644 --- a/Ports/Blackfin/VDSP++/os_cpu_c.c +++ b/Ports/Blackfin/VDSP++/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -25,7 +25,7 @@ * development team * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/C28x/Generic/CCS/os_cpu.h b/Ports/C28x/Generic/CCS/os_cpu.h index 041faac..dccf917 100644 --- a/Ports/C28x/Generic/CCS/os_cpu.h +++ b/Ports/C28x/Generic/CCS/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * TI C28x Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : TI C28x * Mode : C28 Object mode diff --git a/Ports/C28x/Generic/CCS/os_cpu_a.asm b/Ports/C28x/Generic/CCS/os_cpu_a.asm index a906664..48dbecd 100644 --- a/Ports/C28x/Generic/CCS/os_cpu_a.asm +++ b/Ports/C28x/Generic/CCS/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; TI C28x Port ; ; File : os_cpu_a.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : TI C28x ; Mode : C28 Object mode diff --git a/Ports/C28x/Generic/CCS/os_cpu_c.c b/Ports/C28x/Generic/CCS/os_cpu_c.c index 92e4280..c99893b 100644 --- a/Ports/C28x/Generic/CCS/os_cpu_c.c +++ b/Ports/C28x/Generic/CCS/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * TI C28x Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : TI C28x * Mode : C28 Object mode diff --git a/Ports/C28x/Generic/CCS/os_cpu_i.asm b/Ports/C28x/Generic/CCS/os_cpu_i.asm index f201569..0f8aac9 100644 --- a/Ports/C28x/Generic/CCS/os_cpu_i.asm +++ b/Ports/C28x/Generic/CCS/os_cpu_i.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; TI C28x Port ; ; File : os_cpu_i.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : TI C28x ; Mode : C28 Object mode diff --git a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu.h b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu.h index 2896cae..f22eae6 100644 --- a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu.h +++ b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic Coldfire with EMAC Port for CodeWarrior Compiler * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_a.asm b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_a.asm index 5c938b1..90dd580 100644 --- a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_a.asm +++ b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_a.asm @@ -3,7 +3,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -20,7 +20,7 @@ ; Generic Coldfire with EMAC Port for CodeWarrior Compiler ; ; File : os_cpu_a.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; Note(s) : 1) This port uses the MOVEM.L (A7),D0-D7/A0-A6, LEA 60(A7)A7 construct instead of ; the traditional 68xxx MOVEM.L (A7)+,D0-D7/A0-A6. It is perfectly in order to diff --git a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_c.c b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_c.c index cfdc454..267f904 100644 --- a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_c.c +++ b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic Coldfire with EMAC Port for CodeWarrior Compiler * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_i.asm b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_i.asm index 1a5cc9e..695dd7d 100644 --- a/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_i.asm +++ b/Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_i.asm @@ -3,7 +3,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -20,7 +20,7 @@ ; Generic Coldfire with EMAC Port for CodeWarrior Compiler ; ; File : os_cpu_i.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** */ diff --git a/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu.h b/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu.h index 61661f5..5813324 100644 --- a/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu.h +++ b/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* diff --git a/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_a.asm b/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_a.asm index 2a3f597..c6eebc1 100644 --- a/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_a.asm +++ b/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_a.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_a.asm -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Note(s) : 1) This port uses the MOVEM.L (A7),D0-D7/A0-A6, LEA 60(A7)A7 construct instead of * the traditional 68xxx MOVEM.L (A7)+,D0-D7/A0-A6. It is perfectly in order to diff --git a/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_c.c b/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_c.c index 5e218b7..c290d9e 100644 --- a/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_c.c +++ b/Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* diff --git a/Ports/Coldfire/Generic/CodeWarrior/os_cpu.h b/Ports/Coldfire/Generic/CodeWarrior/os_cpu.h index df09909..11aa505 100644 --- a/Ports/Coldfire/Generic/CodeWarrior/os_cpu.h +++ b/Ports/Coldfire/Generic/CodeWarrior/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* diff --git a/Ports/Coldfire/Generic/CodeWarrior/os_cpu_a.asm b/Ports/Coldfire/Generic/CodeWarrior/os_cpu_a.asm index 79240fb..589e4b1 100644 --- a/Ports/Coldfire/Generic/CodeWarrior/os_cpu_a.asm +++ b/Ports/Coldfire/Generic/CodeWarrior/os_cpu_a.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_a.asm -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Note(s) : 1) This port uses the MOVEM.L (A7),D0-D7/A0-A6, LEA 60(A7)A7 construct instead of * the traditional 68xxx MOVEM.L (A7)+,D0-D7/A0-A6. It is perfectly in order to diff --git a/Ports/Coldfire/Generic/CodeWarrior/os_cpu_c.c b/Ports/Coldfire/Generic/CodeWarrior/os_cpu_c.c index b2bfdbb..098bc48 100644 --- a/Ports/Coldfire/Generic/CodeWarrior/os_cpu_c.c +++ b/Ports/Coldfire/Generic/CodeWarrior/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* diff --git a/Ports/Coldfire/Generic/CodeWarrior/os_cpu_i.asm b/Ports/Coldfire/Generic/CodeWarrior/os_cpu_i.asm index 92489e6..93b5fd2 100644 --- a/Ports/Coldfire/Generic/CodeWarrior/os_cpu_i.asm +++ b/Ports/Coldfire/Generic/CodeWarrior/os_cpu_i.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_i.asm -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* diff --git a/Ports/Coldfire/Generic/IAR/os_cpu.h b/Ports/Coldfire/Generic/IAR/os_cpu.h index e3ec8e9..b198ea8 100644 --- a/Ports/Coldfire/Generic/IAR/os_cpu.h +++ b/Ports/Coldfire/Generic/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : IAR EWCF ********************************************************************************************************* diff --git a/Ports/Coldfire/Generic/IAR/os_cpu_a.asm b/Ports/Coldfire/Generic/IAR/os_cpu_a.asm index b3855d4..3382167 100644 --- a/Ports/Coldfire/Generic/IAR/os_cpu_a.asm +++ b/Ports/Coldfire/Generic/IAR/os_cpu_a.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_a.asm -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Note(s) : 1) This port uses the MOVEM.L (A7),D0-D7/A0-A6, LEA 60(A7)A7 construct instead of * the traditional 68xxx MOVEM.L (A7)+,D0-D7/A0-A6. It is perfectly in order to diff --git a/Ports/Coldfire/Generic/IAR/os_cpu_c.c b/Ports/Coldfire/Generic/IAR/os_cpu_c.c index c4545cf..1be3351 100644 --- a/Ports/Coldfire/Generic/IAR/os_cpu_c.c +++ b/Ports/Coldfire/Generic/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : IAR EWCF ********************************************************************************************************* diff --git a/Ports/Coldfire/Generic/IAR/os_cpu_i.asm b/Ports/Coldfire/Generic/IAR/os_cpu_i.asm index 114cad5..915fd7a 100644 --- a/Ports/Coldfire/Generic/IAR/os_cpu_i.asm +++ b/Ports/Coldfire/Generic/IAR/os_cpu_i.asm @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Generic ColdFire Port * * File : os_cpu_i.asm -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/EnSilica/eSi-3250/EDS/os_cpu.h b/Ports/EnSilica/eSi-3250/EDS/os_cpu.h index 3cdd92e..aad827e 100644 --- a/Ports/EnSilica/eSi-3250/EDS/os_cpu.h +++ b/Ports/EnSilica/eSi-3250/EDS/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * EnSilica eSi-3250 Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : EnSilica eSi-3250 * Mode : Little-Endian, 32 registers diff --git a/Ports/EnSilica/eSi-3250/EDS/os_cpu_a.S b/Ports/EnSilica/eSi-3250/EDS/os_cpu_a.S index 1c7140f..596ddfa 100644 --- a/Ports/EnSilica/eSi-3250/EDS/os_cpu_a.S +++ b/Ports/EnSilica/eSi-3250/EDS/os_cpu_a.S @@ -2,7 +2,7 @@ # uC/OS-III # The Real-Time Kernel # -# Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +# Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com # # SPDX-License-Identifier: APACHE-2.0 # @@ -17,7 +17,7 @@ # EnSilica eSi-32nn Port # # File : os_cpu_a.S -# Version : V3.08.01 +# Version : V3.08.02 #******************************************************************************************************** # For : EnSilica eSi-32nn # Mode : Little-Endian, 8, 16 or 32 registers diff --git a/Ports/EnSilica/eSi-3250/EDS/os_cpu_c.c b/Ports/EnSilica/eSi-3250/EDS/os_cpu_c.c index eb2aee5..1056ccb 100644 --- a/Ports/EnSilica/eSi-3250/EDS/os_cpu_c.c +++ b/Ports/EnSilica/eSi-3250/EDS/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * EnSilica eSi-32nn Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : EnSilica eSi-32nn * Mode : Little-Endian, 8, 16 or 32 registers diff --git a/Ports/HCS12/Paged/CodeWarrior/os_cpu.h b/Ports/HCS12/Paged/CodeWarrior/os_cpu.h index 7705ebf..86f676b 100644 --- a/Ports/HCS12/Paged/CodeWarrior/os_cpu.h +++ b/Ports/HCS12/Paged/CodeWarrior/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Banked Memory Model * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* diff --git a/Ports/HCS12/Paged/CodeWarrior/os_cpu_a.s b/Ports/HCS12/Paged/CodeWarrior/os_cpu_a.s index ad9e1fb..b98a156 100644 --- a/Ports/HCS12/Paged/CodeWarrior/os_cpu_a.s +++ b/Ports/HCS12/Paged/CodeWarrior/os_cpu_a.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Banked Memory Model ; ; File : os_cpu_a.s -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** NON_BANKED: section diff --git a/Ports/HCS12/Paged/CodeWarrior/os_cpu_c.c b/Ports/HCS12/Paged/CodeWarrior/os_cpu_c.c index 017bad5..cb1d018 100644 --- a/Ports/HCS12/Paged/CodeWarrior/os_cpu_c.c +++ b/Ports/HCS12/Paged/CodeWarrior/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Banked Memory Model * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Toolchain : CodeWarrior ********************************************************************************************************* diff --git a/Ports/M14K/CodeSourcery/os_cpu.h b/Ports/M14K/CodeSourcery/os_cpu.h index bf40a96..5163476 100644 --- a/Ports/M14K/CodeSourcery/os_cpu.h +++ b/Ports/M14K/CodeSourcery/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * MicroMips * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/M14K/CodeSourcery/os_cpu_a.S b/Ports/M14K/CodeSourcery/os_cpu_a.S index a448d7c..60e76ad 100644 --- a/Ports/M14K/CodeSourcery/os_cpu_a.S +++ b/Ports/M14K/CodeSourcery/os_cpu_a.S @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * MicroMips * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/M14K/CodeSourcery/os_cpu_c.c b/Ports/M14K/CodeSourcery/os_cpu_c.c index 4810f6f..cd51483 100644 --- a/Ports/M14K/CodeSourcery/os_cpu_c.c +++ b/Ports/M14K/CodeSourcery/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * MicroMips * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ @@ -146,7 +146,7 @@ void OSTaskDelHook (OS_TCB *ptcb) * * Description: This function is called when a task returns without being properly deleted. * -* Arguments : ptcb is a pointer to the task control block of the task that was accidently returned. +* Arguments : ptcb is a pointer to the task control block of the task that was accidentally returned. * * Note(s) : 1) Interrupts are disabled during this call. ********************************************************************************************************* diff --git a/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu.h b/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu.h index 3c681c6..762b0e8 100644 --- a/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu.h +++ b/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -22,7 +22,7 @@ * MPLAB * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_a.S b/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_a.S index 6f9ec2c..a4615f9 100644 --- a/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_a.S +++ b/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_a.S @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -22,7 +22,7 @@ * MPLAB * * File : os_cpu_a.S -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_c.c b/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_c.c index 0132034..772c540 100644 --- a/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_c.c +++ b/Ports/MIPS32-4K/Vectored-Interrupt/MPLAB-PIC32-GCC/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -22,7 +22,7 @@ * MPLAB * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/MSP430X/IAR/MSP430x5xx/os_cpu.h b/Ports/MSP430X/IAR/MSP430x5xx/os_cpu.h index 1be1518..c690e0c 100644 --- a/Ports/MSP430X/IAR/MSP430x5xx/os_cpu.h +++ b/Ports/MSP430X/IAR/MSP430x5xx/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * MSP430x5xx * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Compiler : IAR System Embedded Workbench for TI MSP430 V5.20 ********************************************************************************************************* diff --git a/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_a.s43 b/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_a.s43 index 3277c40..26a9518 100644 --- a/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_a.s43 +++ b/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_a.s43 @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; MSP430x5xx ; ; File : os_cpu.h -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** #include diff --git a/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_c.c b/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_c.c index 950682a..a6d5d05 100644 --- a/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_c.c +++ b/Ports/MSP430X/IAR/MSP430x5xx/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * MSP430x5xx * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Compiler : IAR System Embedded Workbench for TI MSP430 V5.20 ********************************************************************************************************* diff --git a/Ports/MicroBlaze/GNU/os_cpu.h b/Ports/MicroBlaze/GNU/os_cpu.h index b86ea7c..5a7c661 100644 --- a/Ports/MicroBlaze/GNU/os_cpu.h +++ b/Ports/MicroBlaze/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU C/C++ Compiler * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/MicroBlaze/GNU/os_cpu_a.S b/Ports/MicroBlaze/GNU/os_cpu_a.S index 38c698c..b1fcea5 100644 --- a/Ports/MicroBlaze/GNU/os_cpu_a.S +++ b/Ports/MicroBlaze/GNU/os_cpu_a.S @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU C/C++ Compiler * * File : os_cpu_a.S -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/MicroBlaze/GNU/os_cpu_c.c b/Ports/MicroBlaze/GNU/os_cpu_c.c index a23c78b..3956cd4 100644 --- a/Ports/MicroBlaze/GNU/os_cpu_c.c +++ b/Ports/MicroBlaze/GNU/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU C/C++ Compiler * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/Microchip/PIC24FJ128/C30/os_cpu.h b/Ports/Microchip/PIC24FJ128/C30/os_cpu.h index 42b2638..406f519 100644 --- a/Ports/Microchip/PIC24FJ128/C30/os_cpu.h +++ b/Ports/Microchip/PIC24FJ128/C30/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * PIC24 MPLab Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/Microchip/PIC24FJ128/C30/os_cpu_a.S b/Ports/Microchip/PIC24FJ128/C30/os_cpu_a.S index 62ca2a6..bcaaa4c 100644 --- a/Ports/Microchip/PIC24FJ128/C30/os_cpu_a.S +++ b/Ports/Microchip/PIC24FJ128/C30/os_cpu_a.S @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; PIC24 MPLab Port ; ; File : os_cpu_a.S -: Version : V3.08.01 +: Version : V3.08.02 ;******************************************************************************************************** diff --git a/Ports/Microchip/PIC24FJ128/C30/os_cpu_c.c b/Ports/Microchip/PIC24FJ128/C30/os_cpu_c.c index 1976cd2..c2eabff 100644 --- a/Ports/Microchip/PIC24FJ128/C30/os_cpu_c.c +++ b/Ports/Microchip/PIC24FJ128/C30/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * PIC24 MPLab Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/Microchip/PIC24FJ128/C30/os_cpu_util_a.s b/Ports/Microchip/PIC24FJ128/C30/os_cpu_util_a.s index faf8e8c..00350d5 100644 --- a/Ports/Microchip/PIC24FJ128/C30/os_cpu_util_a.s +++ b/Ports/Microchip/PIC24FJ128/C30/os_cpu_util_a.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; PIC24 MPLab Port ; ; File : os_cpu_util_a.s -: Version : V3.08.01 +: Version : V3.08.02 ;******************************************************************************************************** ; diff --git a/Ports/NiosII/GNU/os_cpu.h b/Ports/NiosII/GNU/os_cpu.h index d29e25f..d3bc990 100644 --- a/Ports/NiosII/GNU/os_cpu.h +++ b/Ports/NiosII/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Altera NiosII Port * * File : os_cpu_c.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Altera NiosII * Toolchain : GNU - Altera NiosII diff --git a/Ports/NiosII/GNU/os_cpu_a.S b/Ports/NiosII/GNU/os_cpu_a.S index 7acd26d..bb24089 100644 --- a/Ports/NiosII/GNU/os_cpu_a.S +++ b/Ports/NiosII/GNU/os_cpu_a.S @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -17,7 +17,7 @@ /* ********************************************************************************************************* * File : os_cpu_a.S -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/NiosII/GNU/os_cpu_c.c b/Ports/NiosII/GNU/os_cpu_c.c index f1b40ae..d2681c5 100644 --- a/Ports/NiosII/GNU/os_cpu_c.c +++ b/Ports/NiosII/GNU/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Altera NiosII Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Altera NiosII * Toolchain : GNU - Altera NiosII diff --git a/Ports/POSIX/GNU/os_cpu.h b/Ports/POSIX/GNU/os_cpu.h index de05c49..38486c1 100644 --- a/Ports/POSIX/GNU/os_cpu.h +++ b/Ports/POSIX/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * POSIX GNU Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : POSIX * Toolchain : GNU diff --git a/Ports/POSIX/GNU/os_cpu_c.c b/Ports/POSIX/GNU/os_cpu_c.c index 7358462..1f313ad 100644 --- a/Ports/POSIX/GNU/os_cpu_c.c +++ b/Ports/POSIX/GNU/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * POSIX GNU Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : POSIX * Toolchain : GNU diff --git a/Ports/PPC405/GNU/os_cpu.h b/Ports/PPC405/GNU/os_cpu.h index 2395f7e..dc757be 100644 --- a/Ports/PPC405/GNU/os_cpu.h +++ b/Ports/PPC405/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU C/C++ Compiler * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/PPC405/GNU/os_cpu_a.S b/Ports/PPC405/GNU/os_cpu_a.S index 02efcd5..fbcf536 100644 --- a/Ports/PPC405/GNU/os_cpu_a.S +++ b/Ports/PPC405/GNU/os_cpu_a.S @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU C/C++ Compiler * * File : os_cpu_a.S -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/PPC405/GNU/os_cpu_c.c b/Ports/PPC405/GNU/os_cpu_c.c index 892e16e..ea33755 100644 --- a/Ports/PPC405/GNU/os_cpu_c.c +++ b/Ports/PPC405/GNU/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU C/C++ Compiler * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu.h b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu.h index cb08cac..d37b5bb 100644 --- a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu.h +++ b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU Toolchain * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.S b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.S index daed6f8..cfbb150 100644 --- a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.S +++ b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.S @@ -2,7 +2,7 @@ # uC/OS-III # The Real-Time Kernel # -# Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +# Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com # # SPDX-License-Identifier: APACHE-2.0 # @@ -18,7 +18,7 @@ # GNU Toolchain # # File : os_cpu_a.S -# Version : V3.08.01 +# Version : V3.08.02 #******************************************************************************************************** .include "os_cpu_a.inc" diff --git a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.inc b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.inc index 4ded8c1..1923c76 100644 --- a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.inc +++ b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_a.inc @@ -2,7 +2,7 @@ # uC/OS-III # The Real-Time Kernel # -# Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +# Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com # # SPDX-License-Identifier: APACHE-2.0 # @@ -20,7 +20,7 @@ # GNU Toolchain # # File : os_cpu_a.inc -# Version : V3.08.01 +# Version : V3.08.02 #******************************************************************************************************** #******************************************************************************************************** diff --git a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_c.c b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_c.c index 482db30..a14641f 100644 --- a/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_c.c +++ b/Ports/PowerPC/MPC57xx-VLE/GNU/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * GNU Toolchain * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/RISC-V/RV32/GCC/os_cpu.h b/Ports/RISC-V/RV32/GCC/os_cpu.h index 43bf6e8..d6aa2a6 100644 --- a/Ports/RISC-V/RV32/GCC/os_cpu.h +++ b/Ports/RISC-V/RV32/GCC/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * RISC-V PORT * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : RISC-V RV32 * Toolchain : GNU C Compiler diff --git a/Ports/RISC-V/RV32/GCC/os_cpu_a.S b/Ports/RISC-V/RV32/GCC/os_cpu_a.S index ab66d9a..5b4157e 100644 --- a/Ports/RISC-V/RV32/GCC/os_cpu_a.S +++ b/Ports/RISC-V/RV32/GCC/os_cpu_a.S @@ -2,7 +2,7 @@ # uC/OS-III # The Real-Time Kernel # -# Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +# Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com # # SPDX-License-Identifier: APACHE-2.0 # @@ -18,7 +18,7 @@ # RISC-V PORT # # File : os_cpu_a.S -# Version : V3.08.01 +# Version : V3.08.02 #******************************************************************************************************** # For : RISC-V RV32 # Toolchain : GNU C Compiler diff --git a/Ports/RISC-V/RV32/GCC/os_cpu_c.c b/Ports/RISC-V/RV32/GCC/os_cpu_c.c index f9d83cd..ae10ef4 100644 --- a/Ports/RISC-V/RV32/GCC/os_cpu_c.c +++ b/Ports/RISC-V/RV32/GCC/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * RISC-V PORT * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : RISC-V RV32 * Toolchain : GNU C Compiler diff --git a/Ports/Renesas/78K0R/IAR/os_cpu.h b/Ports/Renesas/78K0R/IAR/os_cpu.h index de9d1c7..2c9e1c7 100644 --- a/Ports/Renesas/78K0R/IAR/os_cpu.h +++ b/Ports/Renesas/78K0R/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * IAR C/C++ Compiler for NEC 78K0R 4.60A * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/Renesas/78K0R/IAR/os_cpu_a.asm b/Ports/Renesas/78K0R/IAR/os_cpu_a.asm index c02bfbb..3572e65 100644 --- a/Ports/Renesas/78K0R/IAR/os_cpu_a.asm +++ b/Ports/Renesas/78K0R/IAR/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; IAR C/C++ Compiler for NEC 78K0R 4.60A ; ; File : os_cpu_a.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ;******************************************************************************************************** diff --git a/Ports/Renesas/78K0R/IAR/os_cpu_c.c b/Ports/Renesas/78K0R/IAR/os_cpu_c.c index 9d0c25c..5ff7018 100644 --- a/Ports/Renesas/78K0R/IAR/os_cpu_c.c +++ b/Ports/Renesas/78K0R/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * IAR C/C++ Compiler for NEC 78K0R 4.60A * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/Renesas/RL78/GNURL78/os_cpu.h b/Ports/Renesas/RL78/GNURL78/os_cpu.h index 6e14016..66885b2 100644 --- a/Ports/Renesas/RL78/GNURL78/os_cpu.h +++ b/Ports/Renesas/RL78/GNURL78/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RL78 Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas RL78 * Toolchain : E2Studios v2.x GNURL78 Compiler v1.x diff --git a/Ports/Renesas/RL78/GNURL78/os_cpu_a.asm b/Ports/Renesas/RL78/GNURL78/os_cpu_a.asm index 410cb38..4d0a639 100644 --- a/Ports/Renesas/RL78/GNURL78/os_cpu_a.asm +++ b/Ports/Renesas/RL78/GNURL78/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RL78 Port ; ; File : os_cpu_a.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas RL78 ; Toolchain : e2studios V 1.1.1.5 for w/ KPIT GNURL78 V1.1.0.x diff --git a/Ports/Renesas/RL78/GNURL78/os_cpu_a.inc b/Ports/Renesas/RL78/GNURL78/os_cpu_a.inc index cf3ebfd..663bb0a 100644 --- a/Ports/Renesas/RL78/GNURL78/os_cpu_a.inc +++ b/Ports/Renesas/RL78/GNURL78/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RL78 Port ; ; File : os_cpu_a.inc -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas RL78 ; Toolchain : e2studios V 1.1.1.5 for w/ KPIT GNURL78 V1.1.0.x diff --git a/Ports/Renesas/RL78/GNURL78/os_cpu_c.c b/Ports/Renesas/RL78/GNURL78/os_cpu_c.c index 630ad7f..84caaa9 100644 --- a/Ports/Renesas/RL78/GNURL78/os_cpu_c.c +++ b/Ports/Renesas/RL78/GNURL78/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RL78 Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas RL78 * Toolchain : E2Studios v2.x GNURL78 Compiler v1.x diff --git a/Ports/Renesas/RL78/IAR/os_cpu.h b/Ports/Renesas/RL78/IAR/os_cpu.h index fd23cb9..c1357be 100644 --- a/Ports/Renesas/RL78/IAR/os_cpu.h +++ b/Ports/Renesas/RL78/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RL78 Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas RL78 * Toolchain : IAR EWRL78 v1.2x and up diff --git a/Ports/Renesas/RL78/IAR/os_cpu_a.asm b/Ports/Renesas/RL78/IAR/os_cpu_a.asm index d415aa6..25893a5 100644 --- a/Ports/Renesas/RL78/IAR/os_cpu_a.asm +++ b/Ports/Renesas/RL78/IAR/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RL78 Port ; ; File : os_cpu_a.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas RL78 ; Toolchain : IAR EWRL78 v1.2x and up diff --git a/Ports/Renesas/RL78/IAR/os_cpu_a.inc b/Ports/Renesas/RL78/IAR/os_cpu_a.inc index 3eef65b..9b0ec59 100644 --- a/Ports/Renesas/RL78/IAR/os_cpu_a.inc +++ b/Ports/Renesas/RL78/IAR/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RL78 Port ; ; File : os_cpu_a.inc -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas RL78 ; Toolchain : IAR EWRL78 v1.2x and up diff --git a/Ports/Renesas/RL78/IAR/os_cpu_c.c b/Ports/Renesas/RL78/IAR/os_cpu_c.c index 48d258d..65458fc 100644 --- a/Ports/Renesas/RL78/IAR/os_cpu_c.c +++ b/Ports/Renesas/RL78/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RL78 Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas RL78 * Toolchain : IAR RL78 v1.2x and up diff --git a/Ports/Renesas/RX/GNURX/os_cpu.h b/Ports/Renesas/RX/GNURX/os_cpu.h index b8a73cf..479d8cc 100644 --- a/Ports/Renesas/RX/GNURX/os_cpu.h +++ b/Ports/Renesas/RX/GNURX/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific Code * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas RX * Toolchain : HEW with GNURX compiler diff --git a/Ports/Renesas/RX/GNURX/os_cpu_a.S b/Ports/Renesas/RX/GNURX/os_cpu_a.S index 0295a80..ccf6c3c 100644 --- a/Ports/Renesas/RX/GNURX/os_cpu_a.S +++ b/Ports/Renesas/RX/GNURX/os_cpu_a.S @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RX Specific Code ; ; File : os_cpu_a.S -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas RX ; Toolchain : HEW with GNURX compiler diff --git a/Ports/Renesas/RX/GNURX/os_cpu_c.c b/Ports/Renesas/RX/GNURX/os_cpu_c.c index f175071..0b71da2 100644 --- a/Ports/Renesas/RX/GNURX/os_cpu_c.c +++ b/Ports/Renesas/RX/GNURX/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific Code * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas RX * Toolchain : HEW with GNURX compiler diff --git a/Ports/Renesas/RX/IAR/os_cpu.h b/Ports/Renesas/RX/IAR/os_cpu.h index 25cdc26..55eaebe 100644 --- a/Ports/Renesas/RX/IAR/os_cpu.h +++ b/Ports/Renesas/RX/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific Code * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas RX * Toolchain : IAR Embedded Workbench for Renesas RX diff --git a/Ports/Renesas/RX/IAR/os_cpu_a.s b/Ports/Renesas/RX/IAR/os_cpu_a.s index cb2ad45..e057414 100644 --- a/Ports/Renesas/RX/IAR/os_cpu_a.s +++ b/Ports/Renesas/RX/IAR/os_cpu_a.s @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RX Specific Code ; ; File : os_cpu_a.s -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas RX ; Toolchain : IAR Embedded Workbench for Renesas RX diff --git a/Ports/Renesas/RX/IAR/os_cpu_c.c b/Ports/Renesas/RX/IAR/os_cpu_c.c index 1872a50..6f90d16 100644 --- a/Ports/Renesas/RX/IAR/os_cpu_c.c +++ b/Ports/Renesas/RX/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific Code * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas RX * Toolchain : IAR Embedded Workbench for Renesas RX diff --git a/Ports/Renesas/RX/RXC/os_cpu.h b/Ports/Renesas/RX/RXC/os_cpu.h index c1e6074..aa5f9c7 100644 --- a/Ports/Renesas/RX/RXC/os_cpu.h +++ b/Ports/Renesas/RX/RXC/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific Code * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas RX * Toolchain : HEW with RXC diff --git a/Ports/Renesas/RX/RXC/os_cpu_a.src b/Ports/Renesas/RX/RXC/os_cpu_a.src index b9ded97..ab73532 100644 --- a/Ports/Renesas/RX/RXC/os_cpu_a.src +++ b/Ports/Renesas/RX/RXC/os_cpu_a.src @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas RX Specific Code ; ; File : os_cpu_a.src -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas RXC compiler ; Toolchain : HEW with RXC diff --git a/Ports/Renesas/RX/RXC/os_cpu_c.c b/Ports/Renesas/RX/RXC/os_cpu_c.c index b3d3df8..5139e88 100644 --- a/Ports/Renesas/RX/RXC/os_cpu_c.c +++ b/Ports/Renesas/RX/RXC/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific Code * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas RX * Toolchain : HEW with RXC diff --git a/Ports/Renesas/SH2A-Banked/HEW/os_cpu.h b/Ports/Renesas/SH2A-Banked/HEW/os_cpu.h index 1428ab6..40a1bb8 100644 --- a/Ports/Renesas/SH2A-Banked/HEW/os_cpu.h +++ b/Ports/Renesas/SH2A-Banked/HEW/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Renesas SH SERIES C/C++ Compiler * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.inc b/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.inc index 76787c6..4d629e9 100644 --- a/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.inc +++ b/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas SH SERIES C/C++ Compiler (V.9.00.03.006) ; ; File : os_cpu_a.inc -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** diff --git a/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.src b/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.src index a5d56d9..bbf16b6 100644 --- a/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.src +++ b/Ports/Renesas/SH2A-Banked/HEW/os_cpu_a.src @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas SH SERIES C/C++ Compiler (V.9.00.03.006) ; ; File : os_cpu_a.src -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** .INCLUDE "os_cpu_a.inc" ; Include macros diff --git a/Ports/Renesas/SH2A-Banked/HEW/os_cpu_c.c b/Ports/Renesas/SH2A-Banked/HEW/os_cpu_c.c index 4a5bc71..5e7dce3 100644 --- a/Ports/Renesas/SH2A-Banked/HEW/os_cpu_c.c +++ b/Ports/Renesas/SH2A-Banked/HEW/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Renesas SH SERIES C/C++ Compiler * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu.h b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu.h index 7c409a8..0314156 100644 --- a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu.h +++ b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Renesas SH SERIES C/C++ Compiler * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.inc b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.inc index 91ea3de..c18ae80 100644 --- a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.inc +++ b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas SH SERIES C/C++ Compiler (V.9.00.03.006) ; ; File : os_cpu_a.inc -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** diff --git a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.src b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.src index 381c772..38875ed 100644 --- a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.src +++ b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_a.src @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas SH SERIES C/C++ Compiler (V.9.00.03.006) ; ; File : os_cpu_a.src -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** .INCLUDE "os_cpu_a.inc" ; Include OS_CTX_SAVE and OS_CTX_RESTORE macros diff --git a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_c.c b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_c.c index 39dc4cc..3af4ecc 100644 --- a/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_c.c +++ b/Ports/Renesas/SH2A-FPU-Banked/HEW/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Renesas SH SERIES C/C++ Compiler * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/Renesas/SH2A-FPU/HEW/os_cpu.h b/Ports/Renesas/SH2A-FPU/HEW/os_cpu.h index edf64ae..17f9210 100644 --- a/Ports/Renesas/SH2A-FPU/HEW/os_cpu.h +++ b/Ports/Renesas/SH2A-FPU/HEW/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Renesas SH SERIES C/C++ Compiler * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.inc b/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.inc index 647501c..4201071 100644 --- a/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.inc +++ b/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas SH SERIES C/C++ Compiler (V.9.00.03.006) ; ; File : os_cpu_a.inc -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** .IMPORT _OSIntNestingCtr diff --git a/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.src b/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.src index 41ab7f8..062b755 100644 --- a/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.src +++ b/Ports/Renesas/SH2A-FPU/HEW/os_cpu_a.src @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas SH SERIES C/C++ Compiler (V.9.00.03.006) ; ; File : os_cpu_a.src -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** .INCLUDE "os_cpu_a.inc" ; Include OS_CTX_SAVE and OS_CTX_RESTORE macros diff --git a/Ports/Renesas/SH2A-FPU/HEW/os_cpu_c.c b/Ports/Renesas/SH2A-FPU/HEW/os_cpu_c.c index 1c06075..a8e57a0 100644 --- a/Ports/Renesas/SH2A-FPU/HEW/os_cpu_c.c +++ b/Ports/Renesas/SH2A-FPU/HEW/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * Renesas SH SERIES C/C++ Compiler * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu.h b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu.h index 4b296c0..27f084e 100644 --- a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu.h +++ b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850E2M Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas V850E2M * Toolchain : CubeSuite+ V1.00.01 diff --git a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.asm b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.asm index c2c5466..b06a15e 100644 --- a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.asm +++ b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas V850E2M Port ; ; File : os_cpu_a.asm -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas V850E2M ; Toolchain : CubeSuite+ V1.00.01 diff --git a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.inc b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.inc index d859354..f22ec0b 100644 --- a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.inc +++ b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas V850E2M Port ; ; File : os_cpu_a.inc -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas V850E2M ; Toolchain : CubeSuite+ V1.00.01 diff --git a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_c.c b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_c.c index f5432e6..812250a 100644 --- a/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_c.c +++ b/Ports/Renesas/V850E2M/CubeSuite+/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850E2M Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas V850E2M * Toolchain : CubeSuite+ V1.00.01 diff --git a/Ports/Renesas/V850E2M/IAR/os_cpu.h b/Ports/Renesas/V850E2M/IAR/os_cpu.h index 8e11fa0..a12d874 100644 --- a/Ports/Renesas/V850E2M/IAR/os_cpu.h +++ b/Ports/Renesas/V850E2M/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850E2M Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas V850E2M * Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850E2M/IAR/os_cpu_a.inc b/Ports/Renesas/V850E2M/IAR/os_cpu_a.inc index faaf498..a39823c 100644 --- a/Ports/Renesas/V850E2M/IAR/os_cpu_a.inc +++ b/Ports/Renesas/V850E2M/IAR/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas V850E2M Port ; ; File : os_cpu_a.inc -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas V850E2M ; Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850E2M/IAR/os_cpu_a.s85 b/Ports/Renesas/V850E2M/IAR/os_cpu_a.s85 index 4290ea2..853cdaf 100644 --- a/Ports/Renesas/V850E2M/IAR/os_cpu_a.s85 +++ b/Ports/Renesas/V850E2M/IAR/os_cpu_a.s85 @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -18,7 +18,7 @@ ; Renesas V850E2M Port ; ; File : os_cpu_a.s85 -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas V850E2M ; Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850E2M/IAR/os_cpu_c.c b/Ports/Renesas/V850E2M/IAR/os_cpu_c.c index 46fecd9..fe1a459 100644 --- a/Ports/Renesas/V850E2M/IAR/os_cpu_c.c +++ b/Ports/Renesas/V850E2M/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850E2M Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas V850E2M * Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850E2S/IAR/os_cpu.h b/Ports/Renesas/V850E2S/IAR/os_cpu.h index 11b2fa5..36445fa 100644 --- a/Ports/Renesas/V850E2S/IAR/os_cpu.h +++ b/Ports/Renesas/V850E2S/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850E2S Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas V850E2S * Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850E2S/IAR/os_cpu_a.inc b/Ports/Renesas/V850E2S/IAR/os_cpu_a.inc index 15b6eb1..6545e5b 100644 --- a/Ports/Renesas/V850E2S/IAR/os_cpu_a.inc +++ b/Ports/Renesas/V850E2S/IAR/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -19,7 +19,7 @@ ; Renesas V850E2M Port ; ; File : os_cpu_a.inc -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas V850E2M ; Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850E2S/IAR/os_cpu_a.s85 b/Ports/Renesas/V850E2S/IAR/os_cpu_a.s85 index 883bc66..b10b4e4 100644 --- a/Ports/Renesas/V850E2S/IAR/os_cpu_a.s85 +++ b/Ports/Renesas/V850E2S/IAR/os_cpu_a.s85 @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -19,7 +19,7 @@ ; Renesas V850E2M Port ; ; File : os_cpu_a.s85 -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas V850E2M ; Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850E2S/IAR/os_cpu_c.c b/Ports/Renesas/V850E2S/IAR/os_cpu_c.c index 5e3cb09..927ec83 100644 --- a/Ports/Renesas/V850E2S/IAR/os_cpu_c.c +++ b/Ports/Renesas/V850E2S/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850E2S Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas V850E2S * Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850ES/IAR/os_cpu.h b/Ports/Renesas/V850ES/IAR/os_cpu.h index fdd7029..eb0f976 100644 --- a/Ports/Renesas/V850ES/IAR/os_cpu.h +++ b/Ports/Renesas/V850ES/IAR/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas V850ES Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas V850ES * Toolchain : IAR EWV850 v3.7x and up diff --git a/Ports/Renesas/V850ES/IAR/os_cpu_a.inc b/Ports/Renesas/V850ES/IAR/os_cpu_a.inc index 06b320d..52cea0e 100644 --- a/Ports/Renesas/V850ES/IAR/os_cpu_a.inc +++ b/Ports/Renesas/V850ES/IAR/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas V850ES Port ; ; File : os_cpu_a.inc -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas V850ES ; Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850ES/IAR/os_cpu_a.s85 b/Ports/Renesas/V850ES/IAR/os_cpu_a.s85 index 23db64e..cf28732 100644 --- a/Ports/Renesas/V850ES/IAR/os_cpu_a.s85 +++ b/Ports/Renesas/V850ES/IAR/os_cpu_a.s85 @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -17,7 +17,7 @@ ; Renesas V850ES Port ; ; File : os_cpu_a.s85 -; Version : V3.08.01 +; Version : V3.08.02 ;******************************************************************************************************** ; For : Renesas V850ES ; Toolchain : IAR EWV850 v3.7x and 3.8x diff --git a/Ports/Renesas/V850ES/IAR/os_cpu_c.c b/Ports/Renesas/V850ES/IAR/os_cpu_c.c index d6994d1..c6dd025 100644 --- a/Ports/Renesas/V850ES/IAR/os_cpu_c.c +++ b/Ports/Renesas/V850ES/IAR/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Renesas RX Specific code * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Renesas V850ES * Toolchain : IAR EWV850 v3.7x and up diff --git a/Ports/Template/os_cpu.h b/Ports/Template/os_cpu.h index 24d863e..ca36597 100644 --- a/Ports/Template/os_cpu.h +++ b/Ports/Template/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * $$$$ Insert Compiler Name * * Filename : os_cpu.h -* Version : $$$$ V3.08.01 +* Version : $$$$ V3.08.02 ********************************************************************************************************* * Note(s) : (1) This file is used to create a uC/OS-III port. You can use this template as a * starting point instead of typing everything from scratch. @@ -49,7 +49,7 @@ extern "C" { * * Note(s): OS_TASK_SW() invokes the task level context switch. * -* (1) On some processors, this corresponds to a call to OSCtxSw() which is an assemply language +* (1) On some processors, this corresponds to a call to OSCtxSw() which is an assembly language * function that performs the context switch. * * (2) On some processors, you need to simulate an interrupt using a 'sowfate interrupt' or a diff --git a/Ports/Template/os_cpu_a.asm b/Ports/Template/os_cpu_a.asm index d6717af..c276958 100644 --- a/Ports/Template/os_cpu_a.asm +++ b/Ports/Template/os_cpu_a.asm @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -20,7 +20,7 @@ ; $$$$ Compiler/Assembler Name ; ; Filename : os_cpu_a.asm -; Version : $$$$ V3.08.01 +; Version : $$$$ V3.08.02 ;******************************************************************************************************** ; Include macros from 'os_cpu_a.inc' diff --git a/Ports/Template/os_cpu_a.inc b/Ports/Template/os_cpu_a.inc index c876a0e..aef4fe5 100644 --- a/Ports/Template/os_cpu_a.inc +++ b/Ports/Template/os_cpu_a.inc @@ -2,7 +2,7 @@ ; uC/OS-III ; The Real-Time Kernel ; -; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +; Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com ; ; SPDX-License-Identifier: APACHE-2.0 ; @@ -20,7 +20,7 @@ ; $$$$ Compiler/Assembler Name ; ; Filename : os_cpu_a.inc -; Version : $$$$ V3.08.01 +; Version : $$$$ V3.08.02 ;******************************************************************************************************** ;******************************************************************************************************** diff --git a/Ports/Template/os_cpu_c.c b/Ports/Template/os_cpu_c.c index b7479eb..d3f6bcd 100644 --- a/Ports/Template/os_cpu_c.c +++ b/Ports/Template/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -21,7 +21,7 @@ * $$$$ Insert Compiler Name * * Filename : os_cpu_c.c -* Version : $$$$ V3.08.01 +* Version : $$$$ V3.08.02 ********************************************************************************************************* * Note(s) : (1) This file is used to create a uC/OS-III port. You can use this template as a * starting point instead of typing everything from scratch. diff --git a/Ports/Win32/Visual_Studio/os_cpu.h b/Ports/Win32/Visual_Studio/os_cpu.h index 79f4a7f..4bc9737 100644 --- a/Ports/Win32/Visual_Studio/os_cpu.h +++ b/Ports/Win32/Visual_Studio/os_cpu.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Microsoft Win32 Port * * File : os_cpu.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Win32 * Toolchain : Visual Studio diff --git a/Ports/Win32/Visual_Studio/os_cpu_c.c b/Ports/Win32/Visual_Studio/os_cpu_c.c index 2d380ab..1b20a7a 100644 --- a/Ports/Win32/Visual_Studio/os_cpu_c.c +++ b/Ports/Win32/Visual_Studio/os_cpu_c.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Microsoft Win32 Port * * File : os_cpu_c.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * For : Win32 * Toolchain : Visual Studio diff --git a/Source/__dbg_uCOS-III.c b/Source/__dbg_uCOS-III.c index 71d639a..8f1fdf9 100644 --- a/Source/__dbg_uCOS-III.c +++ b/Source/__dbg_uCOS-III.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * VARIABLES * * File : __dbg_uCOS-III.C -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Source/os.h b/Source/os.h index a9ffb3b..9d02c05 100644 --- a/Source/os.h +++ b/Source/os.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -17,7 +17,7 @@ /* ********************************************************************************************************* * File : os.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Note(s) : (1) Assumes the following versions (or more recent) of software modules are included * in the project build: @@ -35,7 +35,7 @@ ************************************************************************************************************************ */ -#define OS_VERSION 30800u /* Version of uC/OS-III (Vx.yy.zz mult. by 10000) */ +#define OS_VERSION 30802u /* Version of uC/OS-III (Vx.yy.zz mult. by 10000) */ /* ************************************************************************************************************************ @@ -732,7 +732,7 @@ struct os_flag_grp { /* Event Flag Group CPU_TS TS; /* Timestamp of when last post occurred */ #endif #if (defined(OS_CFG_TRACE_EN) && (OS_CFG_TRACE_EN > 0u)) - CPU_INT16U FlagID; /* Unique ID for third-party debuggers and tracers. */ + CPU_ADDR FlagID; /* Unique ID for third-party debuggers and tracers. */ #endif }; @@ -761,7 +761,7 @@ struct os_mem { /* MEMORY CONTROL BL OS_MEM *DbgNextPtr; #endif #if (defined(OS_CFG_TRACE_EN) && (OS_CFG_TRACE_EN > 0u)) - CPU_INT16U MemID; /* Unique ID for third-party debuggers and tracers. */ + CPU_ADDR MemID; /* Unique ID for third-party debuggers and tracers. */ #endif }; @@ -804,7 +804,7 @@ struct os_msg_q { /* OS_MSG_Q OS_MSG_QTY NbrEntriesMax; /* Peak number of entries in the queue */ #endif #if (defined(OS_CFG_TRACE_EN) && (OS_CFG_TRACE_EN > 0u)) - CPU_INT16U MsgQID; /* Unique ID for third-party debuggers and tracers. */ + CPU_ADDR MsgQID; /* Unique ID for third-party debuggers and tracers. */ #endif }; @@ -839,7 +839,7 @@ struct os_mutex { /* Mutual Exclusion CPU_TS TS; #endif #if (defined(OS_CFG_TRACE_EN) && (OS_CFG_TRACE_EN > 0u)) - CPU_INT16U MutexID; /* Unique ID for third-party debuggers and tracers. */ + CPU_ADDR MutexID; /* Unique ID for third-party debuggers and tracers. */ #endif }; @@ -926,7 +926,7 @@ struct os_sem { /* Semaphore CPU_TS TS; #endif #if (defined(OS_CFG_TRACE_EN) && (OS_CFG_TRACE_EN > 0u)) - CPU_INT16U SemID; /* Unique ID for third-party debuggers and tracers. */ + CPU_ADDR SemID; /* Unique ID for third-party debuggers and tracers. */ #endif }; @@ -991,7 +991,7 @@ struct os_tcb { CPU_TS TS; /* Timestamp */ #endif #if (defined(OS_CFG_TRACE_EN) && (OS_CFG_TRACE_EN > 0u)) - CPU_INT16U SemID; /* Unique ID for third-party debuggers and tracers. */ + CPU_ADDR SemID; /* Unique ID for third-party debuggers and tracers. */ #endif OS_SEM_CTR SemCtr; /* Task specific semaphore counter */ @@ -1064,7 +1064,7 @@ struct os_tcb { CPU_CHAR *DbgNamePtr; #endif #if (defined(OS_CFG_TRACE_EN) && (OS_CFG_TRACE_EN > 0u)) - CPU_INT16U TaskID; /* Unique ID for third-party debuggers and tracers. */ + CPU_ADDR TaskID; /* Unique ID for third-party debuggers and tracers. */ #endif }; diff --git a/Source/os_cfg_app.c b/Source/os_cfg_app.c index 0ff121f..9802779 100644 --- a/Source/os_cfg_app.c +++ b/Source/os_cfg_app.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * OS CONFIGURATION (APPLICATION SPECIFICS) * * File : os_cfg_app.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Note(s) : DO NOT CHANGE THIS FILE! ********************************************************************************************************* diff --git a/Source/os_core.c b/Source/os_core.c index 737e72d..441f0ee 100644 --- a/Source/os_core.c +++ b/Source/os_core.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * CORE FUNCTIONS * * File : os_core.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Source/os_dbg.c b/Source/os_dbg.c index 0e48937..0156e5c 100644 --- a/Source/os_dbg.c +++ b/Source/os_dbg.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * DEBUGGER CONSTANTS * * File : os_dbg.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Source/os_flag.c b/Source/os_flag.c index 5772c7b..1bd3759 100644 --- a/Source/os_flag.c +++ b/Source/os_flag.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * EVENT FLAG MANAGEMENT * * File : os_flag.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ @@ -1284,6 +1284,11 @@ void OS_FlagTaskRdy (OS_TCB *p_tcb, case OS_TASK_STATE_PEND_SUSPENDED: case OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED: +#if (OS_CFG_TICK_EN > 0u) + if (p_tcb->TaskState == OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED) { + OS_TickListRemove(p_tcb); /* Remove from tick list */ + } +#endif p_tcb->TaskState = OS_TASK_STATE_SUSPENDED; break; diff --git a/Source/os_mem.c b/Source/os_mem.c index 981e806..d4b504b 100644 --- a/Source/os_mem.c +++ b/Source/os_mem.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * MEMORY PARTITION MANAGEMENT * * File : os_mem.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Source/os_msg.c b/Source/os_msg.c index cd4836e..ed78171 100644 --- a/Source/os_msg.c +++ b/Source/os_msg.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * MESSAGE HANDLING SERVICES * * File : os_msg.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Source/os_mutex.c b/Source/os_mutex.c index 18113e5..0ba6384 100644 --- a/Source/os_mutex.c +++ b/Source/os_mutex.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * MUTEX MANAGEMENT * * File : os_mutex.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Source/os_prio.c b/Source/os_prio.c index 3fad964..d82fad0 100644 --- a/Source/os_prio.c +++ b/Source/os_prio.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * PRIORITY MANAGEMENT * * File : os_prio.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Source/os_q.c b/Source/os_q.c index 6b76f21..ff0173a 100644 --- a/Source/os_q.c +++ b/Source/os_q.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * MESSAGE QUEUE MANAGEMENT * * File : os_q.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Source/os_sem.c b/Source/os_sem.c index 02c4a69..92d8980 100644 --- a/Source/os_sem.c +++ b/Source/os_sem.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * SEMAPHORE MANAGEMENT * * File : os_sem.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Source/os_stat.c b/Source/os_stat.c index 29b0bee..1a2816e 100644 --- a/Source/os_stat.c +++ b/Source/os_stat.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * STATISTICS MODULE * * File : os_stat.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ @@ -179,7 +179,7 @@ void OSStatReset (OS_ERR *p_err) * * Argument(s): p_err is a pointer to a variable that will contain an error code returned by this function. * -* OS_ERR_NONE The call was successfu +* OS_ERR_NONE The call was successful * OS_ERR_OS_NOT_RUNNING If uC/OS-III is not running yet * * Returns : none diff --git a/Source/os_task.c b/Source/os_task.c index cf85f83..bb813a2 100644 --- a/Source/os_task.c +++ b/Source/os_task.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * TASK MANAGEMENT * * File : os_task.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ @@ -2822,6 +2822,8 @@ void OS_TaskChangePrio(OS_TCB *p_tcb, /* Block is empty when trace is disabled. */ OS_TRACE_MUTEX_TASK_PRIO_DISINHERIT(p_tcb_owner, prio_new); } + } else { + p_tcb_owner = (OS_TCB *)0; } } #endif diff --git a/Source/os_tick.c b/Source/os_tick.c index d631b17..c778e20 100644 --- a/Source/os_tick.c +++ b/Source/os_tick.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * TICK MANAGEMENT * * File : os_tick.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Source/os_time.c b/Source/os_time.c index 832be4f..6790bb5 100644 --- a/Source/os_time.c +++ b/Source/os_time.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * TIME MANAGEMENT * * File : os_time.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Source/os_tmr.c b/Source/os_tmr.c index 5c6d640..b1f0d05 100644 --- a/Source/os_tmr.c +++ b/Source/os_tmr.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * TIMER MANAGEMENT * * File : os_tmr.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Source/os_trace.h b/Source/os_trace.h index d2d107c..894a799 100644 --- a/Source/os_trace.h +++ b/Source/os_trace.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -17,7 +17,7 @@ /* ********************************************************************************************************* * File : os_trace.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* * Note(s) : (1) The header file os_trace_events.h is the interface between uC/OS-III and your * trace recorder of choice. To support trace recording, include one of the sub-folders diff --git a/Source/os_type.h b/Source/os_type.h index 14092ca..7dab04c 100644 --- a/Source/os_type.h +++ b/Source/os_type.h @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -17,7 +17,7 @@ /* ********************************************************************************************************* * File : os_type.h -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/Source/os_var.c b/Source/os_var.c index 5093cf0..12d27f0 100644 --- a/Source/os_var.c +++ b/Source/os_var.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -19,7 +19,7 @@ * VARIABLES * * File : os_var.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ diff --git a/TLS/CCES/os_tls.c b/TLS/CCES/os_tls.c index 319b5f0..e03bf44 100644 --- a/TLS/CCES/os_tls.c +++ b/TLS/CCES/os_tls.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * Cross Core Embedded Studio (CCES) IMPLEMENTATION * * File : os_tls.c -* Version : V3.08.01 +* Version : V3.08.02 ************************************************************************************************************************ */ @@ -180,7 +180,7 @@ OS_TLS OS_TLS_GetValue (OS_TCB *p_tcb, * OS_TLS_ID id, * OS_TLS value); * -* you can specify a NULL pointer if you don't want to have a fucntion associated with a TLS +* you can specify a NULL pointer if you don't want to have a function associated with a TLS * register. A NULL pointer (i.e. no function associated with a TLS register) is the default * value placed in OS_TLS_DestructPtrTbl[]. * diff --git a/TLS/IAR/os_tls.c b/TLS/IAR/os_tls.c index 3246d82..5c756d6 100644 --- a/TLS/IAR/os_tls.c +++ b/TLS/IAR/os_tls.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * IAR IMPLEMENTATION * * File : os_tls.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ @@ -225,7 +225,7 @@ OS_TLS OS_TLS_GetValue (OS_TCB *p_tcb, * OS_TLS_ID id, * OS_TLS value); * -* you can specify a NULL pointer if you don't want to have a fucntion associated with a TLS +* you can specify a NULL pointer if you don't want to have a function associated with a TLS * register. A NULL pointer (i.e. no function associated with a TLS register) is the default * value placed in OS_TLS_DestructPtrTbl[]. * @@ -508,7 +508,7 @@ static void OS_TLS_LockCreate (void **p_lock) (CPU_CHAR *) 0, (OS_ERR *)&err); - if (err != OS_ERR_NONE) { /* If the mutex create funtion fail? */ + if (err != OS_ERR_NONE) { /* If the mutex create function fail? */ CPU_CRITICAL_ENTER(); /* Return the OS_TLS_LOCK in front of the list */ p_tls_lock->NextPtr = OS_TLS_LockPoolListPtr; diff --git a/TLS/NewLib/os_tls.c b/TLS/NewLib/os_tls.c index 7bfa578..b7a3f95 100644 --- a/TLS/NewLib/os_tls.c +++ b/TLS/NewLib/os_tls.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -20,7 +20,7 @@ * NEWLIB IMPLEMENTATION * * File : os_tls.c -* Version : V3.08.01 +* Version : V3.08.02 ********************************************************************************************************* */ @@ -209,7 +209,7 @@ OS_TLS OS_TLS_GetValue (OS_TCB *p_tcb, * OS_TLS_ID id, * OS_TLS value); * -* you can specify a NULL pointer if you don't want to have a fucntion associated with a TLS +* you can specify a NULL pointer if you don't want to have a function associated with a TLS * register. A NULL pointer (i.e. no function associated with a TLS register) is the default * value placed in OS_TLS_DestructPtrTbl[]. * diff --git a/Template/bsp_os_dt.c b/Template/bsp_os_dt.c index f31f923..5c9565f 100644 --- a/Template/bsp_os_dt.c +++ b/Template/bsp_os_dt.c @@ -3,7 +3,7 @@ * uC/OS-III * The Real-Time Kernel * -* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com +* Copyright 2009-2022 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * @@ -188,7 +188,7 @@ OS_TICK OS_DynTickGet (void) tmrcnt = /* $$$$ */; /* Read current timer count. */ if (/* $$$$ */) { /* Check timer interrupt flag. */ - return (TickDelta); /* Counter Overflow has occured. */ + return (TickDelta); /* Counter Overflow has occurred. */ } tmrcnt = TIMER_TO_OSTICK(tmrcnt); /* Otherwise, the value we read is valid. */