diff --git a/dts/include/coronet/a12-cpu.dtsi b/dts/include/coronet/a12-cpu.dtsi
index 76d3964..4ba663d 100644
--- a/dts/include/coronet/a12-cpu.dtsi
+++ b/dts/include/coronet/a12-cpu.dtsi
@@ -43,11 +43,11 @@
 				};
 			};
 
-			mv6_port(0, "ethX2" , &aphy0, "gmii");
-			mv6_port(1, "ethX12", &aphy1, "gmii");
-			mv6_port(2, "ethX8" , &aphy2, "gmii");
-			mv6_port(3, "ethX4" , &aphy3, "gmii");
-			mv6_port(4, "ethX3" , &aphy4, "gmii");
+			mv6_port(0, 0, "ethX2" , &aphy0, "gmii");
+			mv6_port(1, 1, "ethX12", &aphy1, "gmii");
+			mv6_port(2, 2, "ethX8" , &aphy2, "gmii");
+			mv6_port(3, 3, "ethX4" , &aphy3, "gmii");
+			mv6_port(4, 4, "ethX3" , &aphy4, "gmii");
 		};
 
 		mdio {
@@ -55,11 +55,11 @@
 			#size-cells = <0x0>;
 			interrupt-parent = <&agate>;
 
-			aphy0: mv6_phy(0);
-			aphy1: mv6_phy(1);
-			aphy2: mv6_phy(2);
-			aphy3: mv6_phy(3);
-			aphy4: mv6_phy(4);
+			aphy0: mv6_phy(0, 1000);
+			aphy1: mv6_phy(1, 1000);
+			aphy2: mv6_phy(2, 1000);
+			aphy3: mv6_phy(3, 1000);
+			aphy4: mv6_phy(4, 1000);
 		};
 	};
 
@@ -91,13 +91,13 @@
 				};
 			};
 
-			mv6_port(0, "ethX1" , &ophy0, "mii");
-			mv6_port(1, "ethX5" , &ophy1, "mii");
-			mv6_port(2, "ethX6" , &ophy2, "mii");
-			mv6_port(3, "ethX7" , &ophy3, "mii");
-			mv6_port(4, "ethX9" , &ophy4, "mii");
-			mv6_port(5, "ethX10", &ophy5, "mii");
-			mv6_port(6, "ethX11", &ophy6, "mii");
+			mv6_port(0, 0, "ethX1" , &ophy0, "mii");
+			mv6_port(1, 1, "ethX5" , &ophy1, "mii");
+			mv6_port(2, 2, "ethX6" , &ophy2, "mii");
+			mv6_port(3, 3, "ethX7" , &ophy3, "mii");
+			mv6_port(4, 4, "ethX9" , &ophy4, "mii");
+			mv6_port(5, 5, "ethX10", &ophy5, "mii");
+			mv6_port(6, 6, "ethX11", &ophy6, "mii");
 		};
 
 		mdio {
@@ -105,13 +105,13 @@
 			#size-cells = <0>;
 			interrupt-parent = <&opal>;
 
-			ophy0: mv6_phy(0);
-			ophy1: mv6_phy(1);
-			ophy2: mv6_phy(2);
-			ophy3: mv6_phy(3);
-			ophy4: mv6_phy(4);
-			ophy5: mv6_phy(5);
-			ophy6: mv6_phy(6);
+			ophy0: mv6_phy(0, 100);
+			ophy1: mv6_phy(1, 100);
+			ophy2: mv6_phy(2, 100);
+			ophy3: mv6_phy(3, 100);
+			ophy4: mv6_phy(4, 100);
+			ophy5: mv6_phy(5, 100);
+			ophy6: mv6_phy(6, 100);
 		};
 	};
 };
diff --git a/dts/include/coronet/a20-cpu.dtsi b/dts/include/coronet/a20-cpu.dtsi
index 7f9cfc6..5db501d 100644
--- a/dts/include/coronet/a20-cpu.dtsi
+++ b/dts/include/coronet/a20-cpu.dtsi
@@ -55,10 +55,10 @@
 				};
 			};
 
-			mv6_port(0, "ethX6" , &aphy0, "gmii");
-			mv6_port(1, "ethX7" , &aphy1, "gmii");
-			mv6_port(2, "ethX14", &aphy2, "gmii");
-			mv6_port(3, "ethX8" , &aphy3, "gmii");
+			mv6_port(0, 0, "ethX6" , &aphy0, "gmii");
+			mv6_port(1, 1, "ethX7" , &aphy1, "gmii");
+			mv6_port(2, 2, "ethX14", &aphy2, "gmii");
+			mv6_port(3, 3, "ethX8" , &aphy3, "gmii");
 		};
 
 		mdio {
@@ -66,10 +66,10 @@
 			#size-cells = <0x0>;
 			interrupt-parent = <&agate>;
 
-			aphy0: mv6_phy(0);
-			aphy1: mv6_phy(1);
-			aphy2: mv6_phy(2);
-			aphy3: mv6_phy(3);
+			aphy0: mv6_phy(0, 100);
+			aphy1: mv6_phy(1, 100);
+			aphy2: mv6_phy(2, 100);
+			aphy3: mv6_phy(3, 100);
 		};
 	};
 
@@ -101,14 +101,14 @@
 				};
 			};
 
-			mv6_port(0, "ethX5" , &o1phy0, "mii");
-			mv6_port(1, "ethX11", &o1phy1, "mii");
-			mv6_port(2, "ethX12", &o1phy2, "mii");
-			mv6_port(3, "ethX13", &o1phy3, "mii");
-			mv6_port(4, "ethX17", &o1phy4, "mii");
-			mv6_port(5, "ethX18", &o1phy5, "mii");
-			mv6_port(6, "ethX19", &o1phy6, "mii");
-			mv6_port(7, "ethX20", &o1phy7, "mii");
+			mv6_port(0, 0, "ethX5" , &o1phy0, "mii");
+			mv6_port(1, 1, "ethX11", &o1phy1, "mii");
+			mv6_port(2, 2, "ethX12", &o1phy2, "mii");
+			mv6_port(3, 3, "ethX13", &o1phy3, "mii");
+			mv6_port(4, 4, "ethX17", &o1phy4, "mii");
+			mv6_port(5, 5, "ethX18", &o1phy5, "mii");
+			mv6_port(6, 6, "ethX19", &o1phy6, "mii");
+			mv6_port(7, 7, "ethX20", &o1phy7, "mii");
 		};
 
 		mdio {
@@ -116,14 +116,14 @@
 			#size-cells = <0>;
 			interrupt-parent = <&opal1>;
 
-			o1phy0: mv6_phy(0);
-			o1phy1: mv6_phy(1);
-			o1phy2: mv6_phy(2);
-			o1phy3: mv6_phy(3);
-			o1phy4: mv6_phy(4);
-			o1phy5: mv6_phy(5);
-			o1phy6: mv6_phy(6);
-			o1phy7: mv6_phy(7);
+			o1phy0: mv6_phy(0, 100);
+			o1phy1: mv6_phy(1, 100);
+			o1phy2: mv6_phy(2, 100);
+			o1phy3: mv6_phy(3, 100);
+			o1phy4: mv6_phy(4, 100);
+			o1phy5: mv6_phy(5, 100);
+			o1phy6: mv6_phy(6, 100);
+			o1phy7: mv6_phy(7, 100);
 		};
 	};
 
@@ -155,14 +155,14 @@
 				};
 			};
 
-			mv6_port(0, "ethX2" , &o2phy0, "mii");
-			mv6_port(1, "ethX4" , &o2phy1, "mii");
-			mv6_port(2, "ethX1" , &o2phy2, "mii");
-			mv6_port(3, "ethX3" , &o2phy3, "mii");
-			mv6_port(4, "ethX10", &o2phy4, "mii");
-			mv6_port(5, "ethX9" , &o2phy5, "mii");
-			mv6_port(6, "ethX15", &o2phy6, "mii");
-			mv6_port(7, "ethX16", &o2phy7, "mii");
+			mv6_port(0, 0, "ethX2" , &o2phy0, "mii");
+			mv6_port(1, 1, "ethX4" , &o2phy1, "mii");
+			mv6_port(2, 2, "ethX1" , &o2phy2, "mii");
+			mv6_port(3, 3, "ethX3" , &o2phy3, "mii");
+			mv6_port(4, 4, "ethX10", &o2phy4, "mii");
+			mv6_port(5, 5, "ethX9" , &o2phy5, "mii");
+			mv6_port(6, 6, "ethX15", &o2phy6, "mii");
+			mv6_port(7, 7, "ethX16", &o2phy7, "mii");
 		};
 
 		mdio {
@@ -170,14 +170,14 @@
 			#size-cells = <0>;
 			interrupt-parent = <&opal2>;
 
-			o2phy0: mv6_phy(0);
-			o2phy1: mv6_phy(1);
-			o2phy2: mv6_phy(2);
-			o2phy3: mv6_phy(3);
-			o2phy4: mv6_phy(4);
-			o2phy5: mv6_phy(5);
-			o2phy6: mv6_phy(6);
-			o2phy7: mv6_phy(7);
+			o2phy0: mv6_phy(0, 100);
+			o2phy1: mv6_phy(1, 100);
+			o2phy2: mv6_phy(2, 100);
+			o2phy3: mv6_phy(3, 100);
+			o2phy4: mv6_phy(4, 100);
+			o2phy5: mv6_phy(5, 100);
+			o2phy6: mv6_phy(6, 100);
+			o2phy7: mv6_phy(7, 100);
 		};
 	};
 };
diff --git a/dts/include/coronet/tbn-cpu.dtsi b/dts/include/coronet/tbn-cpu.dtsi
index 9eb397c..200f3b4 100644
--- a/dts/include/coronet/tbn-cpu.dtsi
+++ b/dts/include/coronet/tbn-cpu.dtsi
@@ -20,14 +20,14 @@
 			#address-cells = <0x1>;
 			#size-cells = <0x0>;
 
-			mv6_port(1, "ethX3", &phy1, "gmii");
-			mv6_port(2, "ethX4", &phy2, "gmii");
-			mv6_port(3, "ethX8", &phy3, "gmii");
-			mv6_port(4, "ethX6", &phy4, "gmii");
-			mv6_port(5, "ethX7", &phy5, "gmii");
-			mv6_port(6, "ethX5", &phy6, "gmii");
-			mv6_port(7, "ethX2", &phy7, "gmii");
-			mv6_port(8, "ethX1", &phy8, "gmii");
+			mv6_port(1, 1, "ethX3", &phy1, "gmii");
+			mv6_port(2, 2, "ethX4", &phy2, "gmii");
+			mv6_port(3, 3, "ethX8", &phy3, "gmii");
+			mv6_port(4, 4, "ethX6", &phy4, "gmii");
+			mv6_port(5, 5, "ethX7", &phy5, "gmii");
+			mv6_port(6, 6, "ethX5", &phy6, "gmii");
+			mv6_port(7, 7, "ethX2", &phy7, "gmii");
+			mv6_port(8, 8, "ethX1", &phy8, "gmii");
 		};
 
 		mdio {
@@ -35,14 +35,14 @@
 			#size-cells = <0x0>;
 			interrupt-parent = <&peridot>;
 
-			phy1: mv6_phy(1);
-			phy2: mv6_phy(2);
-			phy3: mv6_phy(3);
-			phy4: mv6_phy(4);
-			phy5: mv6_phy(5);
-			phy6: mv6_phy(6);
-			phy7: mv6_phy(7);
-			phy8: mv6_phy(8);
+			phy1: mv6_phy(1, 1000);
+			phy2: mv6_phy(2, 1000);
+			phy3: mv6_phy(3, 1000);
+			phy4: mv6_phy(4, 1000);
+			phy5: mv6_phy(5, 1000);
+			phy6: mv6_phy(6, 1000);
+			phy7: mv6_phy(7, 1000);
+			phy8: mv6_phy(8, 1000);
 		};
 	};
 };