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a2600nano_tn20k.gprj
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<?xml version="1" encoding="UTF-8"?>
<!DOCTYPE gowin-fpga-project>
<Project>
<Template>FPGA</Template>
<Version>5</Version>
<Device name="GW2AR-18C" pn="GW2AR-LV18QN88C8/I7">gw2ar18c-000</Device>
<FileList>
<File path="src/detect2600.sv" type="file.verilog" enable="1"/>
<File path="src/dualshock2.v" type="file.verilog" enable="1"/>
<File path="src/gowin_dpb/gowin_dpb_track_buffer_b.v" type="file.verilog" enable="1"/>
<File path="src/gowin_dpb/sector_dpram.v" type="file.verilog" enable="1"/>
<File path="src/hdmi/audio_clock_regeneration_packet.sv" type="file.verilog" enable="1"/>
<File path="src/hdmi/audio_info_frame.sv" type="file.verilog" enable="1"/>
<File path="src/hdmi/audio_sample_packet.sv" type="file.verilog" enable="1"/>
<File path="src/hdmi/auxiliary_video_information_info_frame.sv" type="file.verilog" enable="1"/>
<File path="src/hdmi/hdmi.sv" type="file.verilog" enable="1"/>
<File path="src/hdmi/packet_assembler.sv" type="file.verilog" enable="1"/>
<File path="src/hdmi/packet_picker.sv" type="file.verilog" enable="1"/>
<File path="src/hdmi/serializer.sv" type="file.verilog" enable="1"/>
<File path="src/hdmi/source_product_description_info_frame.sv" type="file.verilog" enable="1"/>
<File path="src/hdmi/tmds_channel.sv" type="file.verilog" enable="1"/>
<File path="src/loader_sd_card.sv" type="file.verilog" enable="1"/>
<File path="src/misc/hid.v" type="file.verilog" enable="1"/>
<File path="src/misc/mcu_spi.v" type="file.verilog" enable="1"/>
<File path="src/misc/osd_u8g2.v" type="file.verilog" enable="1"/>
<File path="src/misc/scandoubler.v" type="file.verilog" enable="1"/>
<File path="src/misc/sd_card.v" type="file.verilog" enable="1"/>
<File path="src/misc/sd_rw.v" type="file.verilog" enable="1"/>
<File path="src/misc/sdcmd_ctrl.v" type="file.verilog" enable="1"/>
<File path="src/misc/sysctrl.v" type="file.verilog" enable="1"/>
<File path="src/misc/video.v" type="file.verilog" enable="1"/>
<File path="src/misc/video_analyzer.v" type="file.verilog" enable="1"/>
<File path="src/misc/ws2812.v" type="file.verilog" enable="1"/>
<File path="src/video_stabilize.sv" type="file.verilog" enable="1"/>
<File path="src/A2601Core.vhd" type="file.vhdl" enable="1"/>
<File path="src/A2601top.vhd" type="file.vhdl" enable="1"/>
<File path="src/A6507.vhd" type="file.vhdl" enable="1"/>
<File path="src/A6532.vhd" type="file.vhdl" enable="1"/>
<File path="src/TIA/Common.vhd" type="file.vhdl" enable="1"/>
<File path="src/TIA/NTSCLookups.vhd" type="file.vhdl" enable="1"/>
<File path="src/TIA/TIA.vhd" type="file.vhdl" enable="1"/>
<File path="src/TIA/VGAColorTable.vhd" type="file.vhdl" enable="1"/>
<File path="src/TIA/audio_argh2600.vhd" type="file.vhdl" enable="1"/>
<File path="src/a2600_top_tn20k.vhd" type="file.vhdl" enable="1"/>
<File path="src/gowin_sdpb/gowin_sdpb.vhd" type="file.vhdl" enable="1"/>
<File path="src/t65/T65.vhd" type="file.vhdl" enable="1"/>
<File path="src/t65/T65_ALU.vhd" type="file.vhdl" enable="1"/>
<File path="src/t65/T65_MCode.vhd" type="file.vhdl" enable="1"/>
<File path="src/t65/T65_Pack.vhd" type="file.vhdl" enable="1"/>
<File path="src/a2600_top_tn20k.cst" type="file.cst" enable="1"/>
<File path="src/a2600_top_tn20k.sdc" type="file.sdc" enable="1"/>
</FileList>
</Project>