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ABC
ABC
ABC Logic Optimization & Technology Mapping Tool
ACE2
ACE2
ACE2 Activity Estimation Tool
blifexplorer
blifexplorer
bug
bug
Incorrect behaviour
build
build
Build system
dependencies
dependencies
Pull requests that update a dependency file
docs
docs
Documentation
duplicate
duplicate
enhancement
enhancement
Feature enhancement
external_libs
external_libs
FASM
FASM
FPGA Assembly
Good First Issue
Good First Issue
Good issues for new or first-time contributors
infra
infra
Project Infrastructure
invalid
invalid
kokoro:force-run
kokoro:force-run
lang-cpp
lang-cpp
C/C++ code
lang-hdl
lang-hdl
Hardware Description Language (Verilog/VHDL)
lang-make
lang-make
CMake/Make code
lang-netlist
lang-netlist
lang-perl
lang-perl
Perl code
lang-python
lang-python
Python code
lang-shell
lang-shell
Shell scripts (bash etc.)
libarchfpga
libarchfpga
Library for handling FPGA Architecture descriptions
libeasygl
libeasygl
libpugiutil
libpugiutil
libvtrutil
libvtrutil
Odin AST
Odin AST
Odin II Logic Synthesis Tool: AST related phase (folding, optimization, scope, unrolling))
Odin Elaboration
Odin Elaboration
Odin II Logic Synthesis Tool: Elaboration from an AST to a high level RTL netlist related phase