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Possible error in CMOD A7 platform #752

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bl0x opened this issue Jan 16, 2022 · 0 comments

bl0x commented Jan 16, 2022

Shouldn't this:

litex-buildenv/platforms/cmod_a7.py

Line 108 in a103774

Subsignal("oe_n", Pins("R19"), IOStandard("LVCMOS33")),

be P19, according to the description here:

litex-buildenv/platforms/cmod_a7.py

Line 94 in a103774

 #set_property -dict { PACKAGE_PIN P19 IOSTANDARD LVCMOS33 } [get_ports { RamOEn }]; #IO_L10P_T1_D14_14 Sch=sram-oe 

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