From e905eea1860a627fe0678ac6412f5101c7384f9b Mon Sep 17 00:00:00 2001 From: Hongbin1 Zhang Date: Tue, 17 Dec 2024 16:30:19 +0800 Subject: [PATCH] StandaloneMmPkg : Add MM core fv location PPI Add MM core FV location PPI, it will include MM core FV location which could be in FSP-I or Bootloader MM FV. Signed-off-by: Hongbin1 Zhang Cc: Jiewen Yao Cc: Ray Ni Cc: Star Zeng Cc: Jiaxin Wu Cc: Wei6 Xu Cc: Sami Mujawar Cc: Ard Biesheuvel Cc: Supreeth Venkatesh --- .../Include/Ppi/MmCoreFvLocationPpi.h | 35 +++++++++++++++++++ StandaloneMmPkg/StandaloneMmPkg.dec | 3 ++ 2 files changed, 38 insertions(+) create mode 100644 StandaloneMmPkg/Include/Ppi/MmCoreFvLocationPpi.h diff --git a/StandaloneMmPkg/Include/Ppi/MmCoreFvLocationPpi.h b/StandaloneMmPkg/Include/Ppi/MmCoreFvLocationPpi.h new file mode 100644 index 0000000000000..2033ead0dbbcc --- /dev/null +++ b/StandaloneMmPkg/Include/Ppi/MmCoreFvLocationPpi.h @@ -0,0 +1,35 @@ +/** @file + MM Core FV location PPI header file. + + MM Core FV location PPI is used by StandaloneMm IPL to find MM Core + . + + Copyright (c) 2024, Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef MM_CORE_FV_LOCATION_PPI_H_ +#define MM_CORE_FV_LOCATION_PPI_H_ + +#pragma pack(1) + +/// +/// Global ID for the MM_CORE_FV_LOCATION_PPI. +/// +#define MM_CORE_FV_LOCATION_GUID \ + { \ + 0x47a00618, 0x237a, 0x4386, { 0x8f, 0xc5, 0x2a, 0x86, 0xd8, 0xac, 0x41, 0x05 } \ + } + +typedef struct { + EFI_PHYSICAL_ADDRESS Address; + UINT64 Size; +} MM_CORE_FV_LOCATION_PPI; + +extern EFI_GUID gMmCoreFvLocationPpiGuid; + +#pragma pack() + +#endif diff --git a/StandaloneMmPkg/StandaloneMmPkg.dec b/StandaloneMmPkg/StandaloneMmPkg.dec index 5ac57c1013c5b..dc2313ea12181 100644 --- a/StandaloneMmPkg/StandaloneMmPkg.dec +++ b/StandaloneMmPkg/StandaloneMmPkg.dec @@ -51,6 +51,9 @@ gEventMmDispatchGuid = { 0x7e6efffa, 0x69b4, 0x4c1b, { 0xa4, 0xc7, 0xaf, 0xf9, 0xc9, 0x24, 0x4f, 0xee }} +[Ppis] + gMmCoreFvLocationPpiGuid = { 0x47a00618, 0x237a, 0x4386, { 0x8f, 0xc5, 0x2a, 0x86, 0xd8, 0xac, 0x41, 0x05 }} + [PcdsFixedAtBuild, PcdsPatchableInModule] ## Maximum permitted encapsulation levels of sections in a firmware volume, # in the MM phase. Minimum value is 1. Sections nested more deeply are rejected.