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Fix incorrect mcycle csr address #313

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fourcolor
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According to RISC-V Specifications Volume 2, Privileged Specification, the correct CSR address for the mcycle is 0xB00.

@jserv
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jserv commented Dec 30, 2023

CSR_MCYCLE (Machine cycle counter low word) is 0xb00 while CSR_CYCLE (Cycle counter low word) is 0xc00. The mnemonic identifier used is correct. Why would you propose such a change?

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Sorry, I realized that I mixed up 'mcycle' and 'cycle.' I made this change because I'm working on issue #28 . I believe this pr can be closed.

@fourcolor fourcolor closed this Dec 30, 2023
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