Commits on May 29, 2023

1. Introduce preliminary macro operation fusion …

   Through our observations, we have identified certain patterns in instruction
   sequences. By converting these specific RISC-V instruction patterns into
   faster and equivalent code, we can significantly improve execution efficiency.
   
   In our current analysis, we focus on a commonly used benchmark and have
   found the following frequently occurring instruction patterns: auipc + addi,
   auipc + add, multiple sw, and multiple lw.
   
   |  Metric  |     commit fba5802       |    macro fuse operation   |Speedup|
   |----------+--------------------------+---------------------------+-------|
   | CoreMark | 1351.065 (Iterations/Sec)|  1352.843 (Iterations/Sec)|+0.13% |
   | dhrystone|       1073 DMIPS         |        1146 DMIPS         | +6.8% |
   | nqueens  |       8295 msec          |        7824 msec          | +6.0% |

   

   qwe661234 committed May 29, 2023
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