From 0f0c47c4d34bb2ae70d0ab3b07793c3d88817ff1 Mon Sep 17 00:00:00 2001 From: Harishguna Satgunarajah Date: Thu, 21 Sep 2023 11:07:18 -0700 Subject: [PATCH] adding credit to @datdenkikniet (Johannes Draaijer) --- src/ethernet/cache.rs | 4 ++++ src/ethernet/eth.rs | 4 ++++ src/ethernet/mod.rs | 4 ++++ src/ethernet/packet_id.rs | 4 ++++ src/ethernet/raw_descriptor.rs | 5 +++++ src/ethernet/rx/descriptor.rs | 4 ++++ src/ethernet/rx/mod.rs | 4 ++++ src/ethernet/tx/descriptor.rs | 4 ++++ src/ethernet/tx/mod.rs | 4 ++++ src/ptp/mod.rs | 3 +++ src/ptp/subseconds.rs | 4 ++++ src/ptp/timestamp.rs | 4 ++++ 12 files changed, 48 insertions(+) diff --git a/src/ethernet/cache.rs b/src/ethernet/cache.rs index 4ad92b35..f4c78770 100644 --- a/src/ethernet/cache.rs +++ b/src/ethernet/cache.rs @@ -1,3 +1,7 @@ +//! This implementation is derived from 0BSD-relicensed work done by +//! Johannes Draaijer for the +//! [`stm32-eth`](https://github.com/stm32-rs/stm32-eth) project + #[cfg(feature = "ptp")] use crate::ptp::Timestamp; diff --git a/src/ethernet/eth.rs b/src/ethernet/eth.rs index 71f0e53b..df613eff 100644 --- a/src/ethernet/eth.rs +++ b/src/ethernet/eth.rs @@ -19,6 +19,10 @@ //! > want to enable the cache, the simplest method would be to mark SRAM3 //! > as uncacheable via the MPU. //! +//! This implementation is derived from 0BSD-relicensed work done by +//! Johannes Draaijer for the +//! [`stm32-eth`](https://github.com/stm32-rs/stm32-eth) project +//! //! [quartiq/stabilizer]: https://github.com/quartiq/stabilizer //! [notes]: https://github.com/quartiq/stabilizer/commit/ab1735950b2108eaa8d51eb63efadcd2e25c35c4 diff --git a/src/ethernet/mod.rs b/src/ethernet/mod.rs index 7b5339db..ec61d761 100644 --- a/src/ethernet/mod.rs +++ b/src/ethernet/mod.rs @@ -5,6 +5,10 @@ //! - SMSC LAN8742a //! - Micrel KSZ8081R //! +//! This implementation is derived from 0BSD-relicensed work done by +//! Johannes Draaijer for the +//! [`stm32-eth`](https://github.com/stm32-rs/stm32-eth) project +//! //! # Examples //! //! - [Simple link checker for the Nucleo-H743ZI2](https://github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/ethernet-nucleo-h743zi2.rs) diff --git a/src/ethernet/packet_id.rs b/src/ethernet/packet_id.rs index da07d2ee..f6e90e54 100644 --- a/src/ethernet/packet_id.rs +++ b/src/ethernet/packet_id.rs @@ -3,6 +3,10 @@ /// This packet ID can be used to obtain information about a specific /// ethernet frame (either sent or received) from the DMA. /// +//! This implementation is derived from 0BSD-relicensed work done by +//! Johannes Draaijer for the +//! [`stm32-eth`](https://github.com/stm32-rs/stm32-eth) project + #[cfg_attr( feature = "ptp", doc = " diff --git a/src/ethernet/raw_descriptor.rs b/src/ethernet/raw_descriptor.rs index 38e3411e..3baeb52c 100644 --- a/src/ethernet/raw_descriptor.rs +++ b/src/ethernet/raw_descriptor.rs @@ -1,3 +1,8 @@ +//! This implementation is derived from 0BSD-relicensed work done by +//! Johannes Draaijer for the +//! [`stm32-eth`](https://github.com/stm32-rs/stm32-eth) project + + //TODO remove // this is raw_descriptor use volatile_register::{RO, RW}; diff --git a/src/ethernet/rx/descriptor.rs b/src/ethernet/rx/descriptor.rs index f6bde26f..dfa4ed26 100644 --- a/src/ethernet/rx/descriptor.rs +++ b/src/ethernet/rx/descriptor.rs @@ -1,3 +1,7 @@ +//! This implementation is derived from 0BSD-relicensed work done by +//! Johannes Draaijer for the +//! [`stm32-eth`](https://github.com/stm32-rs/stm32-eth) project + use core::sync::atomic::{self, Ordering}; use crate::ethernet::{raw_descriptor::RawDescriptor, Cache, PacketId}; diff --git a/src/ethernet/rx/mod.rs b/src/ethernet/rx/mod.rs index e753a1a5..d3742fa1 100644 --- a/src/ethernet/rx/mod.rs +++ b/src/ethernet/rx/mod.rs @@ -1,3 +1,7 @@ +//! This implementation is derived from 0BSD-relicensed work done by +//! Johannes Draaijer for the +//! [`stm32-eth`](https://github.com/stm32-rs/stm32-eth) project + pub use descriptor::RxDescriptor; use super::{raw_descriptor::DescriptorRing, PacketId}; diff --git a/src/ethernet/tx/descriptor.rs b/src/ethernet/tx/descriptor.rs index 86839222..da79e5a8 100644 --- a/src/ethernet/tx/descriptor.rs +++ b/src/ethernet/tx/descriptor.rs @@ -1,3 +1,7 @@ +//! This implementation is derived from 0BSD-relicensed work done by +//! Johannes Draaijer for the +//! [`stm32-eth`](https://github.com/stm32-rs/stm32-eth) project + use core::sync::atomic::{self, Ordering}; use crate::ethernet::{raw_descriptor::RawDescriptor, Cache, PacketId}; diff --git a/src/ethernet/tx/mod.rs b/src/ethernet/tx/mod.rs index 4b207587..546214e6 100644 --- a/src/ethernet/tx/mod.rs +++ b/src/ethernet/tx/mod.rs @@ -1,3 +1,7 @@ +//! This implementation is derived from 0BSD-relicensed work done by +//! Johannes Draaijer for the +//! [`stm32-eth`](https://github.com/stm32-rs/stm32-eth) project + use super::{raw_descriptor::DescriptorRing, PacketId}; use crate::stm32::ETHERNET_DMA; diff --git a/src/ptp/mod.rs b/src/ptp/mod.rs index 70a0a514..74834533 100644 --- a/src/ptp/mod.rs +++ b/src/ptp/mod.rs @@ -1,6 +1,9 @@ //! PTP access and configuration. //! //! See [`EthernetPTP`] for a more details. +//! This implementation is derived from 0BSD-relicensed work done by +//! Johannes Draaijer for the +//! [`stm32-eth`](https://github.com/stm32-rs/stm32-eth) project use crate::ethernet::EthernetDMA; use crate::rcc::CoreClocks; diff --git a/src/ptp/subseconds.rs b/src/ptp/subseconds.rs index c9d736d7..b0df629d 100644 --- a/src/ptp/subseconds.rs +++ b/src/ptp/subseconds.rs @@ -1,3 +1,7 @@ +//! This implementation is derived from 0BSD-relicensed work done by +//! Johannes Draaijer for the +//! [`stm32-eth`](https://github.com/stm32-rs/stm32-eth) project + /// The amount of nanoseconds per second. pub const NANOS_PER_SECOND: u32 = 1_000_000_000; diff --git a/src/ptp/timestamp.rs b/src/ptp/timestamp.rs index 1c7f0a19..2c1d8e25 100644 --- a/src/ptp/timestamp.rs +++ b/src/ptp/timestamp.rs @@ -1,3 +1,7 @@ +//! This implementation is derived from 0BSD-relicensed work done by +//! Johannes Draaijer for the +//! [`stm32-eth`](https://github.com/stm32-rs/stm32-eth) project + use super::{Subseconds, NANOS_PER_SECOND}; /// A timestamp produced by the PTP periperhal