From ac67b4ccbdf804def76aee36285c1e434ec03968 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Wed, 14 Feb 2024 19:27:51 +0100
Subject: [PATCH] verilog-vhdl_export: discard more useless items

---
 src/verilog/verilog-vhdl_export.adb | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/verilog/verilog-vhdl_export.adb b/src/verilog/verilog-vhdl_export.adb
index 410548fb8f..b25bfb17e9 100644
--- a/src/verilog/verilog-vhdl_export.adb
+++ b/src/verilog/verilog-vhdl_export.adb
@@ -136,12 +136,14 @@ package body Verilog.Vhdl_Export is
                --   the identifier of the port.
                null;
             when N_Localparam
-              | N_Var =>
+              | N_Var
+              | N_Genvar =>
                null;
             when Nkinds_Nets
               | N_Assign
               | N_Module_Instance
               | N_Generate_Region
+              | N_Loop_Generate
               | N_Always
               | N_Initial =>
                null;