-
Notifications
You must be signed in to change notification settings - Fork 0
/
emu.cc
1349 lines (1227 loc) · 46.9 KB
/
emu.cc
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
#include <assert.h> // assert()
#include <string.h> // memcmp
#include <stdint.h> // [u]int[\d]_t
#include <iostream> // cout
#include <fstream> // fstream
#include <vector> // std::vector<>
using u8 = uint8_t;
using u16 = uint16_t;
using u32 = uint32_t;
using i8 = int8_t;
using i16 = int16_t;
using std::cout;
using std::cerr;
using std::endl;
using std::size_t;
static constexpr u32 CLOCK_HZ = 4194304;
enum struct CART_TYPE {
UNKNOWN = -1,
ROMONLY,
MBC1,
MBC2,
MBC3,
MBC4,
MBC5,
MBC6,
MBC7
};
#define PICNIC(message) do { cerr << __LINE__ << " " << \
__FUNCTION__ << " :" message << endl; abort(); } while(0)
struct Memory;
struct Cartridge
{
std::vector<u8> rom;
std::vector<u8> ram;
u16 rompos;
u16 rampos;
CART_TYPE type;
bool ram_enabled;
void store(u16 address, u8 value);
void store5(u16 address, u8 value);
u8 load(u16 address);
u8 load5(u16 address);
};
void
Cartridge::store(u16 address, u8 value)
{
switch(type) {
case CART_TYPE::MBC5:
store5(address, value); break;
default:
abort(); // nope
}
}
u8
Cartridge::load(u16 address)
{
switch(type) {
case CART_TYPE::MBC5:
return load5(address);
default:
abort(); // nope
}
}
void
Cartridge::store5(u16 address, u8 value)
{
if (address >= 0x0000 && address < 0x2000) {
ram_enabled = ((value & 0b00001111) == 0x0a); // RAM Enable
if (!ram_enabled) {
// TODO: STORE IN A FILE
}
} else if (address >= 0x2000 && address < 0x3000)
rompos = ((rompos & 0x0100) | (value & 0x00ff)); // ROM Bank Number
else if (address >= 0x3000 && address < 0x4000)
// High bit of ROM Bank Number
rompos = ((rompos & 0x00ff) | (((u16)value << 8) & 0x0100));
else if (address >= 0x4000 && address < 0x6000)
rampos = (value & 0x0f); // RAM Bank Number
else if (address >= 0xa000 && address < 0xc000)
ram[0x2000 * rampos + address - 0xa000] = value;
else
PICNIC("Tried to write to an invalid address! " << value);
}
u8
Cartridge::load5(u16 address)
{
if (address >= 0x0000 && address < 0x4000)
return rom[address];
else if (address >= 0x4000 && address < 0x8000)
return rom[0x4000 * rompos + address - 0x4000];
else if (address >= 0xa000 && address < 0xc000)
return ram[0x2000 * rampos + address - 0xa000];
else
PICNIC("Tried to load from an invalid address! " << address);
}
struct MemoryElementProxy
{
MemoryElementProxy(const u16 address, Memory& memory)
: address(address), memory(memory){}
// This is the implementation of setting
void operator=(u8 value);
// This is the implmentation of getting
operator u8() const;
private:
u16 address;
Memory& memory;
};
struct Memory
{
friend MemoryElementProxy;
Memory(Cartridge& cartridge)
: memory(0x10000), cartridge(cartridge){}
MemoryElementProxy operator[](u16 address)
{
return MemoryElementProxy(address, *this);
}
private:
std::vector<u8> memory;
Cartridge& cartridge;
};
// This is the implementation of setting
void
MemoryElementProxy::operator=(u8 value)
{
if ((address >= 0x0000 && address < 0x8000) || (address >= 0xa000 && address < 0xc000))
memory.cartridge.store(address, value);
else
memory.memory[address] = value;
}
MemoryElementProxy::operator u8() const
{
if ((address >= 0x0000 && address < 0x8000) || (address >= 0xa000 && address < 0xc000))
return memory.cartridge.load(address);
else
return memory.memory[address];
}
// special struct in order to perform
// instructions easily on register pairs
struct Regpair
{
// Emulate the regpair by combining reg1
// and reg2 together
Regpair(u8& reg1, u8& reg2) : reg1(reg1), reg2(reg2)
{
reg = ((u16)reg1 << 8) | reg2;
}
// Evil hack
operator u16() const { return reg; };
// overload to decrement the register
u16 operator--(int)
{
const u16 ret = reg;
reg--; storesplit();
return ret;
}
// overload to increment the register
u16 operator++(int)
{
const u16 ret = reg; // Cache the old value
reg++; storesplit(); // Update reg and store the splits
return ret;
}
// overload for addition assignment
Regpair& operator+=(u16 newvalue)
{
reg += newvalue;
storesplit();
return *this;
}
// overload to assign the register
Regpair& operator=(u16 newvalue)
{
reg = newvalue; // Update the reg
storesplit(); // Store the splits
return *this; // Return the struct
}
private:
u16 reg; // pseudo register
u8& reg1; // first register
u8& reg2; // second register
void storesplit()
{
reg1 = (u8)reg; // Throw away the upper 8 bits
reg2 = (u8)(reg >> 8); // shift right, then throw away the upper 8 bits
}
};
struct Gameboy
{
Gameboy() : ram(cartridge) {}
u8 A=0, B=0, C=0, D=0, E=0, H=0, L=0; // General purpose CPU registers
u16 SP=0xfffe, PC=0x0100; // Stack pointer and program counter
// F register
struct Freg
{
// Shift the flags to the first 4 bits, then put the
// remaining unused bits from LF at the end.
operator u8() const
{
return (Z << 7) | (N << 6) | (H << 5) | (CY << 4) | LF;
};
Freg& operator=(u8 newvalue)
{
// Bit mask the value and corospond it
// to each bit of the register.
// For examples sake, think of it as
// ----------------------------------
// | Z | N | H | CY | - | - | - | - |
// ----------------------------------
//0b 1 1 1 1 0 0 0 0
//
// Also set the values of LF to the last
// 4 bits by masking out the first 4 bits.
CY = newvalue & 0b00010000;
H = newvalue & 0b00100000;
N = newvalue & 0b01000000;
Z = newvalue & 0b10000000;
LF = newvalue & 0b00001111;
return *this;
}
bool Z=0, N=0, H=0, CY=0; // CPU Flags
u8 LF=0; // Emulating the lower 4 bits of the F register
} F;
Cartridge cartridge; // cartridge cartridge cartridge
Memory ram; // Ram persistence
void execIns(); // Execute a single instruction
void incCycle(unsigned); // Add to the clock ticks
void loadROM(const char *); // Load ROM in to memory
CART_TYPE getCartridgeTable(const u8); // Print memory cartridge information
u16 getRomTable(const u8); // Get ROM information
u8 getRamTable(const u8); // Get RAM information
void runGame(); // The most useless part
template<typename FTYPE> auto getReg(u8, FTYPE); // Parse the register
private:
bool system_halt = false; // Designates when we HALT opcode processing
bool IME = false; // TODO ?
void sendInterrupt(const u8 itype); // Set by hardware
void handleInterrupt(); // Handle interrupts
};
void
Gameboy::loadROM(const char *const filename)
{
auto& rom = this->cartridge.rom;
// Nintendo logo
static constexpr u8 logo[] = {
0xce, 0xed, 0x66, 0x66, 0xcc, 0x0d, 0x00, 0x0b, 0x03,
0x73, 0x00, 0x83, 0x00, 0x0c, 0x00, 0x0d, 0x00, 0x08,
0x11, 0x1f, 0x88, 0x89, 0x00, 0x0e, 0xdc, 0xcc, 0x6e,
0xe6, 0xdd, 0xdd, 0xd9, 0x99, 0xbb, 0xbb, 0x67, 0x63,
0x6e, 0x0e, 0xec, 0xcc, 0xdd, 0xdc, 0x99, 0x9f, 0xbb,
0xb9, 0x33, 0x3e
};
{
std::ifstream romfile(filename);
romfile.seekg(0, std::ios::end);
const size_t rom_size = romfile.tellg();
romfile.seekg(0, std::ios::beg);
rom.resize(rom_size);
romfile.read(reinterpret_cast<char *>(rom.data()), rom_size);
}
if (memcmp(&rom[0x0104], logo, 48) != 0) {
cout << "Invalid ROM detected, terminating." << endl;
std::exit(EXIT_FAILURE);
}
char buf[16];
memcpy(buf, &rom[0x134], 16);
buf[15] = '\0';
short padding_len = 16 - strlen(buf);
assert(padding_len >= 0 && padding_len <= 16);
char padding[padding_len];
memset(padding, ' ', padding_len);
cout << "\n@@@@@@@@@@@@@@@@@@@@\n";
cout << "@ " << buf << padding << "@" << endl;
cout << "@@@@@@@@@@@@@@@@@@@@\n\n";
cout << "Platform: GameBoy";
// If the MSB of 0x0143 is 1, then the
// color flag is turned on
if ((rom[0x134] >> 7)) {
cout << " Color";
if (rom[0x134] == 0xc0) // Designates Color only
cout << " (ONLY)";
}
cout << " (";
cout << "0x" << std::hex << (unsigned)rom[0x134] << ")" << endl;
const CART_TYPE cartType = getCartridgeTable(rom[0x0147]);
if (cartType == CART_TYPE::UNKNOWN)
PICNIC("ERROR: Unknown Cartridge Type.");
this->cartridge.type = cartType;
const u16 bankCount = getRomTable(rom[0x0148]);
size_t mb = bankCount * 0x4000;
if (mb != rom.size())
PICNIC("ERROR: ROM Size does not match file size.");
const u8 ramSize = getRamTable(rom[0x0149]);
this->cartridge.ram.resize(ramSize * 1024);
cout << "Destination Code: ";
if (rom[0x014a] == 0x00)
cout << "Japanese";
else
cout << "Non-Japanese";
cout << " (0x" << std::hex << (unsigned)rom[0x014a] << ")" << endl;
cout << "ROM Version: 0x" << std::hex << (unsigned)rom[0x14c] << endl;
cout << "Checksum: ";
const u8 checksumbyte = rom[0x14d];
u8 x = 0;
for (size_t i = 0x0134; i < 0x014d; ++i)
x -= (rom[i] + 1);
if (x != checksumbyte) {
cout << "Failed";
exit(EXIT_FAILURE);
} else {
cout << "Passed";
}
cout << endl;
}
CART_TYPE
Gameboy::getCartridgeTable(const u8 value)
{
cout << "Cartridge Type: ";
#define t(type, size) cout << type << \
" (0x" << std::hex << (unsigned)((u8)value) \
<< ")" << endl; return size;
switch(value) {
case 0x00: t("ROM ONLY", CART_TYPE::ROMONLY)
case 0x01: t("MBC1" , CART_TYPE::MBC1)
case 0x02: t("MBC1+RAM", CART_TYPE::MBC1)
case 0x03: t("MBC1+RAM+BATTERY", CART_TYPE::MBC1)
case 0x05: t("MBC2" , CART_TYPE::MBC2)
case 0x06: t("MBC2+BATTERY", CART_TYPE::MBC2)
case 0x08: t("ROM+RAM", CART_TYPE::ROMONLY)
case 0x09: t("ROM+RAM+BATTERY", CART_TYPE::ROMONLY)
case 0x0B: t("MMM01", CART_TYPE::ROMONLY)
case 0x0C: t("MMM01+RAM", CART_TYPE::ROMONLY)
case 0x0D: t("MMM01+RAM+BATTERY", CART_TYPE::ROMONLY)
case 0x0F: t("MBC3+TIMER+BATTERY", CART_TYPE::MBC3)
case 0x10: t("MBC3+TIMER+RAM+BATTERY", CART_TYPE::MBC3)
case 0x11: t("MBC3", CART_TYPE::MBC3)
case 0x12: t("MBC3+RAM", CART_TYPE::MBC3)
case 0x13: t("MBC3+RAM+BATTERY", CART_TYPE::MBC3)
case 0x15: t("MBC4", CART_TYPE::MBC4)
case 0x16: t("MBC4+RAM", CART_TYPE::MBC4)
case 0x17: t("MBC4+RAM+BATTERY", CART_TYPE::MBC4)
case 0x19: t("MBC5", CART_TYPE::MBC5)
case 0x1A: t("MBC5+RAM", CART_TYPE::MBC5)
case 0x1B: t("MBC5+RAM+BATTERY", CART_TYPE::MBC5)
case 0x1C: t("MBC5+RUMBLE", CART_TYPE::MBC5)
case 0x1D: t("MBC5+RUMBLE+RAM", CART_TYPE::MBC5)
case 0x1E: t("MBC5+RUMBLE+RAM+BATTERY", CART_TYPE::MBC5)
case 0x20: t("MBC6", CART_TYPE::MBC6)
case 0x22: t("MBC7+SENSOR+RUMBLE+RAM+BATTERY", CART_TYPE::MBC7)
case 0xfc: t("POCKET CAMERA", CART_TYPE::ROMONLY)
case 0xfd: t("BANDAI TAMA5", CART_TYPE::ROMONLY)
case 0xfe: t("HuC3", CART_TYPE::ROMONLY)
case 0xff: t("HuC1+RAM+BATTERY", CART_TYPE::ROMONLY)
default: t("UNKNOWN", CART_TYPE::UNKNOWN)
}
cout << " (0x" << std::hex << (unsigned)value << ")" << endl;
#undef t
return CART_TYPE::UNKNOWN;
}
u16
Gameboy::getRomTable(const u8 value)
{
cout << "ROM Size: ";
#define t(type, size) cout << type << \
" (0x" << std::hex << (unsigned)((u8)value) \
<< ")" << endl; return size;
switch(value) {
case 0x00: t("32KByte (no ROM banking)", 0)
case 0x01: t("64KByte (4 banks)", 4)
case 0x02: t("128KByte (8 banks)", 8)
case 0x03: t("256KByte (16 banks)", 16)
case 0x04: t("512KByte (32 banks)", 32)
case 0x05: t("1MByte (64 banks) - only 63 banks used by MBC1", 64)
case 0x06: t("2MByte (128 banks) - only 125 banks used by MBC1", 128)
case 0x07: t("4MByte (256 banks)", 256)
case 0x52: t("1.1MByte (72 banks)", 72)
case 0x53: t("1.2MByte (80 banks)", 80)
case 0x54: t("1.5MByte (96 banks)", 96)
default: t("UNKNOWN", 0)
}
#undef t
return 0;
}
u8
Gameboy::getRamTable(const u8 value)
{
cout << "RAM Size: ";
#define t(type, size) cout << type << \
" (0x" << std::hex << (unsigned)((u8)value) \
<< ")" << endl; return size;
switch(value) {
case 0x00: t("None", 0)
case 0x01: t("2 KBytes", 2)
case 0x02: t("8 Kbytes", 8)
case 0x03: t("32 KBytes (4 banks of 8KBytes each)", 32)
case 0x04: t("128 KBytes (16 banks of 8KBytes each)", 128)
case 0x05: t("64 KBytes (8 banks of 8KBytes each)", 64)
default: t("UNKNOWN", 0)
}
#undef t
return 0;
}
// Safetely turn the unsigned byte in to
// a signed byte without any compiler or
// OS magic
i8
toSigned8(u8 byte)
{
if (byte < 0x80)
return (i8)byte;
return (i8)(byte - 0x80) - 0x80;
}
void
Gameboy::incCycle(unsigned cycles)
{
static u32 s_cycles;
s_cycles += cycles;
if (s_cycles == CLOCK_HZ) {
// cout << "one second has passed" << endl;
s_cycles = 0;
} else if (s_cycles > CLOCK_HZ) {
// cout << "PAST ONE SECOND?? " << std::dec << (s_cycles - CLOCK_HZ) << endl;
s_cycles = 0;
}
}
template<typename FTYPE>
auto Gameboy::getReg(u8 r, FTYPE f)
{
Regpair HL(H, L);
// TODO Fix me so incCycle() happens
// after
switch(r) {
case 0b111: incCycle(8); return f(A);
case 0b000: incCycle(8); return f(B);
case 0b001: incCycle(8); return f(C);
case 0b010: incCycle(8); return f(D);
case 0b011: incCycle(8); return f(E);
case 0b100: incCycle(8); return f(H);
case 0b101: incCycle(8); return f(L);
case 0b110: incCycle(16); return f(ram[HL]);
default: PICNIC("Unknown register in RES " << r);
}
}
void
Gameboy::handleInterrupt()
{
if (IME) {
const u8 IE = ram[0xffff];
const u8 IF = ram[0xff0f];
// Nothing to handle
if (IF == 0x0) { return; }
IME = false;
ram[--SP] = (u8)(PC >> 8);
ram[--SP] = (u8)PC;
if ((IF & 0b1) && (IE & 0b1)) {
PC = 0x0040;
ram[0xff0f] = (~0b1 & IF);
} else if ((IF & 0b10) && (IE & 0b10)) {
PC = 0x0048;
ram[0xff0f] = (~0b10 & IF);
} else if ((IF & 0b100) && (IE & 0b100)) {
PC = 0x0050;
ram[0xff0f] = (~0b100 & IF);
} else if ((IF & 0b1000) && (IE & 0b1000)) {
PC = 0x0058;
ram[0xff0f] = (~0b1000 & IF);
} else if ((IF & 0b10000) && (IE & 0b10000)) {
PC = 0x0060;
ram[0xff0f] = (~0b10000 & IF);
} else {
PICNIC("Received invalid IF interrupt! " << IF);
}
system_halt = false; // TODO Reset system halt status
}
}
void
Gameboy::sendInterrupt(const u8 itype)
{
ram[0xff0f] = (ram[0xff0f] | itype); // Store to IF register
}
void
Gameboy::execIns()
{
// fyl hates me for this :<
#define t(opcode, action, sleep) \
case (opcode): action; \
incCycle(sleep); break
// The Z80 processor allowed for combining
// registers to increase the capacity of the
// potential register storage. In this case,
// pre-calculate the combined-register values
// so we can use it later on.
Regpair BC(B, C);
Regpair DE(D, E);
Regpair HL(H, L);
// get the nex parameter in the instruction
const auto get8 = [this]() -> u8 { return ram[PC++]; };
// calculate the two byte immediate value
const auto get16 = [this, get8]() -> u16
{
u16 lower = get8();
u16 upper = get8();
return upper << 8 | lower;
};
// Adds a signed 8 bit parameter to the
// stack pointer while setting the carry flag
// and half carry flag. This also resets the
// zero and subtract flag.
const auto Addi8toSP = [this, get8]() -> u16
{
const u8 ub8 = get8();
const i8 b8 = toSigned8(ub8);
const u16 op = SP + b8;
F.Z = 0; F.N = 0;
F.CY = (u16)((u8)SP) + ub8 > 0xff;
F.H = (SP & 0x0f) + (ub8 & 0x0f) >= 0x10;
return op;
};
/* == 8-bit ALU OPERATIONS */
// Add another byte to register A
// Flag in this case could potentially be
// a carry flag
const auto Add = [&](u8 other, u8 flag = 0)
{
F.Z = !(A + other + flag);
F.N = 0;
F.H = ((A & 0x0f) + (other & 0x0f) + (flag & 0x0f)) > 0x0f;
F.CY = ((u16)A + other + flag) > 0xff;
A += other + flag;
};
// Subtract another byte to register A
// Flag in this case could potentially be
// a carry flag
const auto Sub = [&](u8 other, u8 flag = 0)
{
F.Z = !(A - (other + flag));
F.N = 1;
F.H = ((other & 0x0f) + (flag & 0x0f)) <= (A & 0x0f);
F.CY = ((u16)other + flag) > A;
A -= other + flag;
};
// Logical AND other byte with A.
// Set the zero flag accordingly, subtract
// and carry flag are reset, half carry
// flag is set to 1.
const auto And = [&](u8 other)
{
A &= other;
F.Z = !A;
F.N = 0; F.H = 1; F.CY = 0;
};
// Logical OR other byte with A.
// Set the zero flag accordingly, subtract,
// half carry flag and carry flag are reset
const auto Or = [&](u8 other)
{
A |= other;
F.Z = !A;
F.N = 0; F.H = 0; F.CY = 0;
};
// Logical XOR other byte with A.
// Set the zero flag accordingly, subtract,
// half carry flag and carry flag are reset
const auto Xor = [&](u8 other)
{
A ^= other;
F.Z = !A;
F.N = 0; F.H = 0; F.CY = 0;
};
// Compare other byte with A
// Set the zero flag accordingly set the
// subtract flag to 1, set the carry flag if
// the other byte is greater than A, set the
// half carry flag if the lower nibble is less
// than or equal to the lower nibble of A.
const auto CP = [&](u8 other)
{
F.Z = A == other;
F.N = 1;
F.H = (other & 0x0f) <= (A & 0x0f);
F.CY = other > A;
};
// Increment register.
// Set the zero flag accordingly, reset the half
// carry flag, set the half carry flag if we get
// a carry from the lower nibble of the register
const auto INC = [&](auto&& reg)
{
F.Z = !(reg + 1);
F.N = 0;
F.H = (reg & 0x0f) >= 0xf;
};
// Decrement register.
// Set the zero flag accordingly, set the subtract
// flag to 1, set the half carry flag if we get a borrow
// from the lower nibble of the register
const auto DEC = [&](auto&& reg)
{
F.Z = !(reg - 1);
F.N = 1;
F.H = (reg & 0x0f) >= 1;
};
/* 16-bit ALU OPERATIONS */
// Same as the 8-bit ADD operation, except
// combining 2 16-bit register pairs, not
// 2 8-bit registers.
const auto ADD16 = [&](Regpair& reg1, u16 reg2)
{
F.N = 0;
F.H = ((reg1 & 0xff) + (reg2 & 0xff)) > 0xff;
F.CY = ((u32)reg1 + reg2) > 0xffff;
reg1 += reg2;
};
/* MISC ALU OPERATIONS */
// Swap the upper and lower nibble of the register
// Set the zero flag accordingly, reset all other
// flags
const auto SWAP = [&](auto&& reg)
{
reg = (reg >> 4 | reg << 4);
F.Z = !(reg);
F.N = 0; F.H = 0; F.CY = 0;
};
// Rotate val left. Old bit 7 to carry flag. Reset
// subtract flag and half carry flag, set zero flag to 0
// if result is 0. Carry flag contains old bit 7 data.
// If `carry` is specified, then we carry the bit through
// the carry flag
const auto RLEFT = [&](auto&& val, bool carry = false)
{
bool tmp = (val >> 7);
F.N = 0; F.H = 0;
if (carry) {
val = ((val >> 7) | F.CY);
F.CY = tmp;
} else {
val = ((val >> 7) | (val << 1));
F.CY = (val & 0b1);
}
F.Z = !(val);
};
// Rotate val right. Old bit 0 to carry flag. Reset
// subtract flag and half carry flag, set zero flag to 0
// if result is 0. Carry flag contains old bit 0 data.
// If `carry` is specified, then we carry the bit through
// the carry flag
const auto RRIGHT = [&](auto&& val, bool carry = false)
{
bool tmp = (val & 0b00000001); // Get the 0th bit
F.N = 0; F.H = 0;
if (carry) {
// Shift val over 1 bit, move F.CY over to the 7th bit
val = ((val >> 1) | (F.CY << 7));
F.CY = tmp;
} else {
F.CY = (val & 0b1);
val = ((val >> 1) | (val << 7));
}
F.Z = !(val);
};
// Shift val left into carry.
// Set LSB (bit 0) to 0
const auto SLEFT = [&](auto&& val)
{
F.N = 0; F.H = 0;
F.CY = (val >> 7); // set carry flag to old 7th bit
val = (val << 1); // shift left once
F.Z = !(val);
};
// Shift val right into carry.
// MSB does not change if msb is true,
// otherwise msb is set to 0
const auto SRIGHT = [&](auto&& val, bool msb = true)
{
F.N = 0; F.H = 0;
F.CY = (val & 0b1);
val = ((val >> 1) | ((msb ? (val & 0b10000000) : 0b0)));
F.Z = !(val);
};
// Test bit in register
// Set zero flag if bit of register is 0
// Reset subtract flag, set half carry flag
const auto BIT = [&](auto&& reg, const u8 bit)
{
assert(bit < 8);
F.N = 0; F.H = 1;
F.Z = !(reg & (1 << bit));
};
// Set bit in register
const auto SETBIT = [&](auto&& reg, u8 bit, bool reset = false)
{
assert(bit < 8);
if (reset)
reg = (reg & ~(1 << bit));
else
reg = (reg | (1 << bit));
};
// CALL two byte immediate value
// Push address of next instruction on to stack
// and then jump to address nn
const auto CALL = [&](bool exec = true)
{
const u16 addr = get16();
if (!exec)
return;
ram[--SP] = (u8)(PC >> 8);
ram[--SP] = (u8)PC;
PC = addr;
};
// RET
// Pop two bytes from the stack and jump
// to that address
const auto RET = [&]
{
const u8 lower = ram[SP++];
const u8 upper = ram[SP++];
PC = ((upper << 8) | lower);
};
// Get the next opcode
const u8 ins = ram[PC++];
// cout << "Executing 0x" << std::hex
// << (unsigned)ins << "at PC 0x" << std::hex <<
// (unsigned)PC << " with next byte 0x" << std::hex <<
// (unsigned)ram[PC] << " 0x" << std::hex <<
// (unsigned)ram[PC + 1] << " 0x" << std::hex <<
// (unsigned)ram[PC + 2] << endl;
switch (ins) {
// LD register, value
t(0x06, B = get8() , 8); // store to B
t(0x0e, C = get8() , 8); // store to C
t(0x16, D = get8() , 8); // store to D
t(0x1e, E = get8() , 8); // store to E
t(0x26, H = get8() , 8); // store to H
t(0x2e, L = get8() , 8); // store to L
// LD register, register
t(0x7f, /*A = A*/ , 4); // shut up compiler
t(0x78, A = B , 4); // store B to A
t(0x79, A = C , 4); // store C to A
t(0x7a, A = D , 4); // store D to A
t(0x7b, A = E , 4); // store E to A
t(0x7c, A = H , 4); // store H to A
t(0x7d, A = L , 4); // store L to A
t(0x7e, A = ram[HL] , 8); // store the value at HL to A
t(0x40, /*B = B*/ , 4); // shut up compiler
t(0x41, B = C , 4); // store C to B
t(0x42, B = D , 4); // store D to B
t(0x43, B = E , 4); // store E to B
t(0x44, B = H , 4); // store H to B
t(0x45, B = L , 4); // store L to B
t(0x46, B = ram[HL] , 8); // store the value at HL to B
t(0x48, C = B , 4); // store B to C
t(0x49, /*C = C*/ , 4); // shut up compiler
t(0x4a, C = D , 4); // store D to C
t(0x4b, C = E , 4); // store E to C
t(0x4c, C = H , 4); // store H to C
t(0x4d, C = L , 4); // store L to C
t(0x4e, C = ram[HL] , 8); // store the value at HL to C
t(0x50, D = B , 4); // store B to D
t(0x51, D = C , 4); // store C to D
t(0x52, /*D = D*/ , 4); // shut up compiler
t(0x53, D = E , 4); // store E to D
t(0x54, D = H , 4); // store H to D
t(0x55, D = L , 4); // store L to D
t(0x56, D = ram[HL] , 8); // store the value at HL to D
t(0x58, E = B , 4); // store B to E
t(0x59, E = C , 4); // store C to E
t(0x5a, E = D , 4); // store D to E
t(0x5b, /*E = E*/ , 4); // shut up compiler
t(0x5c, E = H , 4); // store H to E
t(0x5d, E = L , 4); // store L to E
t(0x5e, E = ram[HL] , 8); // store the value at HL to E
t(0x60, H = B , 4); // store B to H
t(0x61, H = C , 4); // store C to H
t(0x62, H = D , 4); // store D to H
t(0x63, H = E , 4); // store E to H
t(0x64, /*H = H*/ , 4); // shut up compiler
t(0x65, H = L , 4); // store L to H
t(0x66, H = ram[HL] , 8); // store the value at HL to H
t(0x68, L = B , 4); // store B to L
t(0x69, L = C , 4); // store C to L
t(0x6a, L = D , 4); // store D to L
t(0x6b, L = E , 4); // store E to L
t(0x6c, L = H , 4); // store H to L
t(0x6d, /*L = L*/ , 4); // shut up compiler
t(0x6e, L = ram[HL] , 8); // store the value at HL to L
t(0x70, ram[HL] = B , 8); // store B at the value of HL
t(0x71, ram[HL] = C , 8); // store C at the value of HL
t(0x72, ram[HL] = D , 8); // store D at the value of HL
t(0x73, ram[HL] = E , 8); // store E at the value of HL
t(0x74, ram[HL] = H , 8); // store H at the value of HL
t(0x75, ram[HL] = L , 8); // store L at the value of HL
t(0x36, ram[HL] = get8(), 12); // store to the value of HL
// LD A, register|#
t(0x0a, A = ram[BC] , 8); // store the value at BC to A
t(0x1a, A = ram[DE] , 8); // store the value at DE to A
t(0xfa, A = ram[get16()], 16); // store the value at the
// parameter to A
t(0x3e, A = get8() , 8); // store to A
// LD register|#, A
t(0x47, B = A , 4); // store A to B
t(0x4f, C = A , 4); // store A to C
t(0x57, D = A , 4); // store A to D
t(0x5f, E = A , 4); // store A to E
t(0x67, H = A , 4); // store A to H
t(0x6f, L = A , 4); // store A to L
t(0x02, ram[BC] = A , 8); // store A at the value of BC
t(0x12, ram[DE] = A , 8); // store A at the value of DE
t(0x77, ram[HL] = A , 8); // store A at the value of HL
t(0xea, ram[get16()] = A, 16); // store A to the value at the parameter
// LD A, ($FF00 + C) ; I/O
t(0xf2, A = ram[C+0xff00], 8); // store the value at address 0xff00 + register C into A
// LD ($FF00 + C), A ; I/O
t(0xe2, ram[C+0xff00] = A, 8); // store A into the address at 0xff00 + register C
// LD A, (HLD): LD A, (HL-): LDD A, (HL)
// LD A, (HL) : DEC HL ; pseudo reference
t(0x3a, A = ram[HL--], 8); // store decremented address HL into A
// LD (HLD), A: LD (HL-), A: LDD (HL), A
// LD (HL) , A: DEC HL ; pseudo reference
t(0x32, ram[HL--] = A, 8); // store A into decremented address HL
// LD A, (HLI): LD A, (HL+): LDI A, (HL)
// LD A, (HL) : INC HL ; pseudo reference
t(0x2a, A = ram[HL++], 8); // store incremented address HL into A
// LD (HLI), A: LD (HL+), A: LDI (HL), A
// LD (HL) , A: INC HL ; pseudo reference
t(0x22, ram[HL++] = A, 8); // store A into incremented address HL
// LDH (#), A ; I/O
t(0xe0, ram[0xff00+get8()] = A, 12); // store A at address 0xff00 + one byte
// immediate value
// LDH A, (#) ; I/O
t(0xf0, A = ram[0xff00+get8()], 12); // store address of 0xff00 + one byte
// immediate value into A
// LD register, ##
t(0x01, BC = get16(), 12); // store 2 byte immediate value to BC
t(0x11, DE = get16(), 12); // store 2 byte immediate value to DE
t(0x21, HL = get16(), 12); // store 2 byte immediate value to HL
t(0x31, SP = get16(), 12); // store 2 byte immediate value to SP
// LD SP, HL
t(0xf9, SP = HL , 8); // store HL into the stack pointer
// LD HL, SP + #: LDHL SP, #
// store stack pointer + one byte signed
// immediate parameter into register HL, reset the zero flag and subtract
// flag, update half carry flag and carry flag according to the addition.
// TODO: Verify this works
t(0xf8, {const u16 op = Addi8toSP(); L = ram[op]; H = ram[op + 0x01];}, 12);
// LD (##), SP
t(0x08, ram[get16()] = SP, 20); // Store stack pointer at address of ##
// PUSH registers
t(0xf5, ram[--SP] = A; ram[--SP] = F, 16); // store A and F on the stack, decrementing the stack pointer
t(0xc5, ram[--SP] = B; ram[--SP] = C, 16); // store B and C on the stack, decrementing the stack pointer
t(0xd5, ram[--SP] = D; ram[--SP] = E, 16); // store D and E on the stack, decrementing the stack pointer
t(0xe5, ram[--SP] = H; ram[--SP] = L, 16); // store H and L on the stack, decrementing the stack pointer
// POP registers
t(0xf1, F = ram[SP++]; A = ram[SP++], 12); // store two bytes off the stack in to register pair AF
t(0xc1, C = ram[SP++]; B = ram[SP++], 12); // store two bytes off the stack in to register pair BC
t(0xd1, E = ram[SP++]; D = ram[SP++], 12); // store two bytes off the stack in to register pair DE
t(0xe1, L = ram[SP++]; H = ram[SP++], 12); // store two bytes off the stack in to register pair HL
/* == BEGIN 8-bit ALU OPERATIONS == */
// ADD A, #
// for these next instructions we set the zero flag if the result is zero,
// reset the subtract flag to 0, update the half carry flag if there is a carry
// from bit 3, and update the carry flag if there is a carry from bit 7.
t(0x87, Add(A), 4); // Add A to A
t(0x80, Add(B), 4); // Add B to A
t(0x81, Add(C), 4); // Add C to A
t(0x82, Add(D), 4); // Add D to A
t(0x83, Add(E), 4); // Add E to A
t(0x84, Add(H), 4); // Add H to A
t(0x85, Add(L), 4); // Add L to A
t(0x86, Add(ram[HL]), 8); // Add *HL to A
t(0xc6, Add(get8()), 4); // Add the one byte immediate parameter to A
// ADC A, #
// now we add n + the carry flag to A. Same as above.
t(0x8f, Add(A, F.CY), 4); // Add A + carry flag to A
t(0x88, Add(B, F.CY), 4); // Add B + carry flag to A
t(0x89, Add(C, F.CY), 4); // Add C + carry flag to A
t(0x8a, Add(D, F.CY), 4); // Add D + carry flag to A
t(0x8b, Add(E, F.CY), 4); // Add E + carry flag to A
t(0x8c, Add(H, F.CY), 4); // Add H + carry flag to A
t(0x8d, Add(L, F.CY), 4); // Add L + carry flag to A
t(0x8e, Add(ram[HL], F.CY), 8); // Add *HL + carry flag to A
t(0xce, Add(get8(), F.CY), 8); // Add one byte immediate value + carry flag to A
// SUB n
// Subtract n from A, update the zero flag if the result is zero, update the subtract flag on 1,
// update the half carry flag if there is no borrow from bit 4, update the borrow flag if there
// is no borrow.
t(0x97, Sub(A), 4); // Subtract A from A
t(0x90, Sub(B), 4); // Subtract B from A
t(0x91, Sub(C), 4); // Subtract C from A
t(0x92, Sub(D), 4); // Subtract D from A