From 58ea8416b35be96d1c2f152b69ce10944e54b4b0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alexander=20Mei=C3=9Fner?= <AlexanderMeissner@gmx.net>
Date: Fri, 29 Dec 2023 18:15:14 +0100
Subject: [PATCH] Adjusts offset of memory access in disassembler tests.

---
 tests/disassembler.rs | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/tests/disassembler.rs b/tests/disassembler.rs
index a3080b31..57856131 100644
--- a/tests/disassembler.rs
+++ b/tests/disassembler.rs
@@ -139,22 +139,22 @@ fn test_lddw() {
 // Example for InstructionType::LoadReg.
 #[test]
 fn test_ldxdw() {
-    disasm!("entrypoint:\n    ldxdw r1, [r2+0x3]\n");
-    disasm!("entrypoint:\n    ldxdw r1, [r2-0x3]\n");
+    disasm!("entrypoint:\n    ldxdw r1, [r2+0x7999]\n");
+    disasm!("entrypoint:\n    ldxdw r1, [r2-0x8000]\n");
 }
 
 // Example for InstructionType::StoreImm.
 #[test]
 fn test_sth() {
-    disasm!("entrypoint:\n    sth [r1+0x2], 3\n");
-    disasm!("entrypoint:\n    sth [r1-0x2], 3\n");
+    disasm!("entrypoint:\n    sth [r1+0x7999], 3\n");
+    disasm!("entrypoint:\n    sth [r1-0x8000], 3\n");
 }
 
 // Example for InstructionType::StoreReg.
 #[test]
 fn test_stxh() {
-    disasm!("entrypoint:\n    stxh [r1+0x2], r3\n");
-    disasm!("entrypoint:\n    stxh [r1-0x2], r3\n");
+    disasm!("entrypoint:\n    stxh [r1+0x7999], r3\n");
+    disasm!("entrypoint:\n    stxh [r1-0x8000], r3\n");
 }
 
 // Test all supported AluBinary mnemonics.