-
Notifications
You must be signed in to change notification settings - Fork 6
/
Copy pathtnptest.cc
executable file
·7476 lines (5973 loc) · 204 KB
/
tnptest.cc
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
#include <unistd.h>
//#include "TnpPacket.h"
//#include "TnpClient.h"
#include "Util.h"
#include "UsbTest.h"
#include "tnptest.h"
#include "BringupVideoSettings.h" // Local Vesa/Pll Settings
#include <map>
#include <string>
#include <iostream>
#include <vector>
#include "common/ISP1760Driver.h"
#include "common/Ep0Client.h"
#include "common/VideoDisplayDriver.h"
#include "common/TnpStreamSocket.h"
#include "common/TnpDiscover.h"
#include "common/Workpool.h"
#include "TnpDiscoverTest.h"
#include "AttoButtonTest.h"
static TestList* BringupTests;
static const uint32_t AudioTnpEndpoint = 3;
Ep0Client *ep0Client;
Ep0Client *ep0ClientOob;
ISP1760Driver *ispDrv;
VideoDisplayDriver *videoDrv;
TnpStreamSocket *sStream;
//TnpDgramSocket *sDgram;
string* boardName;
RtnStatus_t gStatus = TEST_OK;
bool gDone = false;
bool debugModeUsb = false;
uint32_t audioCSRRead(uint32_t addr);
//#define TNP_DEBUG
#include "image.h"
#include "rletile.h"
// onEvent for audio_in
class EndpointInput : public TnpSocket::EndpointInput {
public:
EndpointInput(RtnStatus_t *status, bool *done, uint32_t num_iter = 200){status_ = status; done_ = done; num_iter_ = num_iter;}
~EndpointInput() {}
void onEvent( const TnpSocket::SocketEvent& e);
EndpointInput* clone() const {
return new EndpointInput(status_, done_);
}
protected :
RtnStatus_t *status_;
bool *done_;
uint32_t num_iter_;
};
RtnStatus_t (*localAudioProc)(char *, uint32_t);
uint32_t audio_pkt_num = 0;
void spiWriteNF (uint32_t addr, uint32_t data) {
EP0WRITE(0x5001, 0x80000000 | addr);
EP0WRITE(0x5000, data);
EP0FLUSH;
usleep(2000);
}
void spiWrite (uint32_t addr, uint32_t data) {
EP0WRITE(0x5001, 0x80000000 | addr);
EP0WRITE(0x5000, data);
EP0FLUSH;
// sleep(1);//(50/1000);
}
void spiErase (uint32_t addr) {
EP0WRITE(0x5001, 0x80000000 | addr);
EP0FLUSH;
EP0WRITE(0x5002, 0x00000000); //erase
EP0FLUSH;
printf("SPI ERASE SECTOR %08x \n",addr);
sleep(3);
}
uint32_t spiRead (uint32_t addr) {
uint32_t data;
EP0WRITE(0x5001, 0x80000000 | addr);
data = EP0READ(0x5000);
return data;
}
void clkBitWrite(uint32_t bitData, int32_t i) {
assert (bitData == 0 || bitData == 1);
// Set the data out
uint32_t wrData = bitData;
EP0WRITE(0x10, wrData);
//printf("CLK Synthesizer Data Write @ %08x: 0x%08x\n",0x10, wrData);
// Toggle the clk or the strobe
if (i != 0) {
wrData = bitData | (1 << 8);
EP0WRITE(0x10, wrData);
}
else {
wrData = bitData | (1 << 8);
EP0WRITE(0x10, wrData);
wrData = bitData | (1 << 16); // Toggle the Strobe bit.
EP0WRITE(0x10, wrData);
}
printf("CLK Synthesizer Clock and Strobe Write @ %08x: 0x%08x\n",0x10, wrData);
// Clear the clk or strobe signal
wrData = bitData ;
EP0WRITE(0x10, wrData);
}
void clkWordWrite (uint32_t wdData) {
assert (!(wdData & 0xfe000000));
for (int32_t i=24; i >= 0; i--) {
clkBitWrite( (wdData & (1 << i)) >> i, i);
}
}
uint32_t axtoi(const char *hexStg) {
uint32_t n = 0; // position in string
uint32_t m = 0; // position in digit[] to shift
uint32_t count; // loop index
uint32_t intValue = 0; // integer value of hex string
uint32_t digit[5]; // hold values to convert
while (n < 6) {
if (hexStg[n]=='\0')
break;
if (hexStg[n] > 0x29 && hexStg[n] < 0x40 ) //if 0 to 9
digit[n] = hexStg[n] & 0x0f; //convert to int
else if (hexStg[n] >='a' && hexStg[n] <= 'f') //if a to f
digit[n] = (hexStg[n] & 0x0f) + 9; //convert to int
else if (hexStg[n] >='A' && hexStg[n] <= 'F') //if A to F
digit[n] = (hexStg[n] & 0x0f) + 9; //convert to int
else break;
n++;
}
count = n;
m = n - 1;
n = 0;
while(n < count) {
// digit[n] is value of hex digit at position n
// (m << 2) is the number of positions to shift
// OR the bits into return value
intValue = intValue | (digit[n] << (m << 2));
m--; // adjust the position to set
n++; // next digit to process
}
return (intValue);
}
void spiDump() {
uint32_t spi_addr = 0x37FFF;
uint32_t testdat = 0x0;
uint32_t spi_data = 0x0;
while(testdat != 0xffffffff){
spi_addr++;
testdat = spiRead(spi_addr);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, testdat);
}
spi_addr++;
testdat = spiRead(spi_addr);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, testdat);
//
// uint32_t spi_addr = 0x38000;
// uint32_t TEST0,TEST1,TEST2,TEST3,TEST4;
//
// TEST0 = spiRead(spi_addr);
// printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, TEST0);
// spi_addr++;
// TEST1 = spiRead(spi_addr);
// printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, TEST1);
// spi_addr++;
// TEST2 = spiRead(spi_addr);
// printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, TEST2);
// spi_addr++;
// TEST3 = spiRead(spi_addr);
// printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, TEST3);
// spi_addr++;
// TEST4 = spiRead(spi_addr);
// printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, TEST4);
}
void chipIDrd() {
uint32_t chipID_addr = 0x1;
uint32_t ethLow_addr = 0x10;
printf("READ @ %08x: 0x%08x\n",chipID_addr, EP0CFGREAD(chipID_addr));
EP0FLUSH;
printf("READ @ %08x: 0x%08x\n",ethLow_addr, EP0CFGREAD(ethLow_addr));
}
RtnStatus_t i2cEdidSetup() {
// Cleanup register info from last transfer.
EP0WRITE(0x6010, 0x00000000);
EP0WRITE(0x600c, 0x00000000);
printf("I2C Clean Up complete\n");
//printf("Read configuration registers before writing them ...\n");
//printf("I2C READ Address Register @ %08x: 0x%08x\n",0x6000, EP0READ(0x6000));
//printf("I2C READ Offset Register @ %08x: 0x%08x\n",0x6004, EP0READ(0x6004));
//printf("I2C READ Status Register @ %08x: 0x%08x\n",0x6010, EP0READ(0x6010));
//printf("I2C READ Control Register @ %08x: 0x%08x\n",0x600C, EP0READ(0x600c));
//printf("Configuration read of register complete!\n");
//printf("-------------------------------------------------------\n");
//printf("\n");
//printf("I2C WRITE Address Register @ %08x: 0x%08x\n",0x6000, 0x00a1a060);
EP0WRITE(0x6000, 0x00a1a060);
//printf("I2C WRITE Offset Register @ %08x: 0x%08x\n",0x6004, 0x00000000);
//EP0WRITE(0x6004, 0x00001300);
//printf("I2C WRITE Status Register @ %08x: 0x%08x\n",0x6010, 0x00000000);
//EP0WRITE(0x6010, 0x00000000);
//printf("I2C WRITE Control Register @ %08x: 0x%08x\n",0x600c, 0x0040ff1f);
//EP0WRITE(0x600c, 0x0043ff1f);
/*
printf("I2C READ Address Register @ %08x: 0x%08x\n",0x6000, EP0READ(0x6000));
printf("I2C READ Offset Register @ %08x: 0x%08x\n",0x6004, EP0READ(0x6004));
printf("I2C READ Status Register @ %08x: 0x%08x\n",0x6010, EP0READ(0x6010));
printf("I2C READ Control Register @ %08x: 0x%08x\n",0x600C, EP0READ(0x600c));
printf("I2C READ Data Register @ %08x: 0x%08x\n",0x6008, EP0READ(0x6008));
*/
uint32_t offset = 0;
uint32_t nBytes = 128;
while ( offset < nBytes ) {
EP0WRITE(0x6004, (( offset ) & 0xff ) << 8 );
EP0WRITE( 0x600C, ( 0x4 << 20 ) | ( 0x3ff << 8 ) | ( 0x1f ));
uint32_t rd_data = EP0READ(0x6008);
printf("I2C READ EDID Table @ offset %08x: 0x%08x\n",offset, rd_data);
if (offset == 0) {
if (rd_data != 0xffffff00) {
return TEST_FAIL;
}
}
if (offset == 4) {
if (rd_data != 0x00ffffff) {
return TEST_FAIL;
}
}
//printf("I2C READ EDID Table @ offset %08x: 0x%08x\n",offset, EP0READ(0x6008));
EP0WRITE( 0x600c, 0 );
EP0WRITE( 0x6010, 0 );
offset += 4;
}
return TEST_OK;
}
#define LED_RGB(re,r,ge,g,be,b) \
(((b & 0xff) << 0) \
| ((be & 0x7) << 8) \
| ((g & 0x7f) << 11) \
| ((ge & 0x7) << 18) \
| ((r & 0xff) << 21) \
| ((re & 0x7) << 29))
RtnStatus_t ledGreenBlue(void* ptr) {
EP0WRITE(0x8086,LED_RGB(0,0, 0,0, 7,255)); // Color (OFF)
EP0WRITE(0x8087,LED_RGB(0,0, 7,255, 0,0)); // Color (ON)
EP0WRITE(0x8013,0x0000000C); // Pattern
return TEST_OK;
}
RtnStatus_t ledRed(void* ptr) {
EP0WRITE(0x8086,LED_RGB(7,255, 0,0, 0,0)); // Color (OFF)
EP0WRITE(0x8087,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8013,0x00000000); // Pattern
return TEST_OK;
}
RtnStatus_t ledAmber(void* ptr) {
EP0WRITE(0x8086,LED_RGB(7,99, 7,255, 0,0)); // Color (OFF)
EP0WRITE(0x8087,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8013,0x00000000); // Pattern
return TEST_OK;
}
RtnStatus_t ledGreen(void* ptr) {
EP0WRITE(0x8086,LED_RGB(0,0, 7,155, 0,0)); // Color (OFF)
EP0WRITE(0x8087,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8013,0x00000000); // Pattern
return TEST_OK;
}
RtnStatus_t ledBlue(void* ptr) {
EP0WRITE(0x8086,LED_RGB(0,0, 0,0, 7,255)); // Color (OFF)
EP0WRITE(0x8087,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8013,0x00000000); // Pattern
return TEST_OK;
}
// indicate unit is bad, failed test
// changed behavior of LED
// RED in CONNECT state
// RED in hasIP state
void ledIndicateFail() {
// Code 0 - Startup
EP0WRITE(0x8080,LED_RGB(0,0, 0,0, 0,0)); // Color (OFF)
EP0WRITE(0x8081,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8010,0x00000000); // Pattern
// Code 1 - No Link
EP0WRITE(0x8082,LED_RGB(0,0, 0,0, 0,0)); // Color (OFF)
EP0WRITE(0x8083,LED_RGB(7,255, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8011,0x00000009); // Pattern
// Code 2 - No IP
EP0WRITE(0x8084,LED_RGB(7,99, 7,255, 0,0)); // Color (OFF)
EP0WRITE(0x8085,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8012,0x00000009); // Pattern
// Code 3 - Has IP
EP0WRITE(0x8086,LED_RGB(7,255, 0,0, 0,0)); // Color (OFF)
EP0WRITE(0x8087,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8013,0x00000000); // Pattern
// Code 3 - Button Pend
EP0WRITE(0x8088,LED_RGB(0,0, 0,0, 7,255)); // Color (OFF)
EP0WRITE(0x8089,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8014,0x00000000); // Pattern
// Code 4 - Connect // Changed to RED to indicate failing unit
EP0WRITE(0x808a,LED_RGB(7,255, 0,0, 0,0)); // Color (OFF)
EP0WRITE(0x808b,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8015,0x00000000); // Pattern
EP0WRITE(0x8000,0x00000001); // Enable
sleep(1);
}
RtnStatus_t ledTest(void* ptr) {
// Code 0 - Startup
EP0WRITE(0x8080,LED_RGB(0,0, 0,0, 0,0)); // Color (OFF)
EP0WRITE(0x8081,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8010,0x00000000); // Pattern
// Code 1 - No Link
EP0WRITE(0x8082,LED_RGB(0,0, 0,0, 0,0)); // Color (OFF)
EP0WRITE(0x8083,LED_RGB(7,255, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8011,0x00000009); // Pattern
// Code 2 - No IP
EP0WRITE(0x8084,LED_RGB(7,99, 7,255, 0,0)); // Color (OFF)
EP0WRITE(0x8085,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8012,0x00000009); // Pattern
// Code 3 - Has IP
EP0WRITE(0x8086,LED_RGB(7,99, 7,255, 0,0)); // Color (OFF)
EP0WRITE(0x8087,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8013,0x00000000); // Pattern
// Code 3 - Button Pend
EP0WRITE(0x8088,LED_RGB(0,0, 0,0, 7,255)); // Color (OFF)
EP0WRITE(0x8089,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8014,0x00000000); // Pattern
// Code 4 - Connect
EP0WRITE(0x808a,LED_RGB(0,0, 0,0, 7,255)); // Color (OFF)
EP0WRITE(0x808b,LED_RGB(0,0, 0,0, 0,0)); // Color (ON)
EP0WRITE(0x8015,0x00000000); // Pattern
EP0WRITE(0x8000,0x00000001); // Enable
sleep(1);
return TEST_OK;
}
RtnStatus_t spiUserErase(void *ptr)
{
uint32_t spi_addr = 0x38000;
spiErase(spi_addr); // ERASE takes 5 secs
printf("SPI Erased User Data \n");
return TEST_OK;
}
void spiInit(uint32_t mac_addr, bool locken) {
uint32_t spi_addr = 0x38000;
uint32_t spi_data;
spiErase (spi_addr); // ERASE takes 5 secs
printf("Mac_addr requested = %08x\n", mac_addr);
// First Cmd in Flash
spi_data = 0x1 << 28 | // CFG WR OPCODE
0x00; // "BOARD ID ADDR"
spiWrite(spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
// Determine the Board ID from the MAC Addr provided
spi_data = ((mac_addr & 0xf00) == 0x500) ? 0x00040100 : ((mac_addr & 0xf00) == 0x400) ? 0x00040001 : 0x00020001;
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
spi_data = 0x1 << 28 | // CFG WR OPCODE
0x11; // "LSB MAC ADDR" csr reg addr within cfg space
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
spi_data = (0x02000000 | (mac_addr & 0x00ffffff)); // LSB of MAC ADDR
printf("SPI Write Data = %08x\n", spi_data);
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
spi_data = 0x1 << 28 | // CFG WR OPCODE
0x10; // "LSB MAC ADDR" csr reg addr within cfg space
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
spi_data = 0x0000001c; // LSB of MAC ADDR
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
if(locken) {
printf("***SPI WRITING SPI PROTECT LOCK***");
spi_data = 0x1 << 28 | // CFG WR OPCODE
0xFF; // protect register
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
spi_data = 0x00000001; // LSB of MAC ADDR
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
}
// spi_data = 0xffffffff; // LSB of MAC ADDR
// spiWrite(++spi_addr, spi_data);
++spi_addr;
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
++spi_addr;
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
}
//--------------------------------------------------
void spiInitAjit(uint32_t mac_addr, bool locken) {
uint32_t spi_addr = 0x38000;
uint32_t spi_data;
spiErase (spi_addr); // ERASE takes 5 secs
printf("Mac_addr requested = %08x\n", mac_addr);
// First Cmd in Flash
spi_data = 0x1 << 28 | // CFG WR OPCODE
0x00; // "BOARD ID ADDR"
spiWrite(spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
// Determine the Board ID from the MAC Addr provided
//spi_data = ((mac_addr & 0xf00) == 0x500) ? 0x00040100 : ((mac_addr & 0xf00) == 0x400) ? 0x00040001 : 0x00020001;
spi_data = 0x00040200; //P6
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
spi_data = 0x1 << 28 | // CFG WR OPCODE
0x11; // "LSB MAC ADDR" csr reg addr within cfg space
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
spi_data = (0x02000000 | (mac_addr & 0x00ffffff)); // LSB of MAC ADDR
//spi_data = | mac_addr; //0x02200018;
printf("SPI Write Data = %08x\n", spi_data);
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
spi_data = 0x1 << 28 | // CFG WR OPCODE
0x10; // "LSB MAC ADDR" csr reg addr within cfg space
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
spi_data = 0x0000001c; // LSB of MAC ADDR
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
if(locken) {
printf("***SPI WRITING SPI PROTECT LOCK***");
spi_data = 0x1 << 28 | // CFG WR OPCODE
0xFF; // protect register
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
spi_data = 0x00000001; // LSB of MAC ADDR
spiWrite(++spi_addr, spi_data);
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
}
// spi_data = 0xffffffff; // LSB of MAC ADDR
// spiWrite(++spi_addr, spi_data);
++spi_addr;
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
++spi_addr;
printf("SPI READ DATA @ %08x: 0x%08x\n",spi_addr, spiRead(spi_addr));
}
uint32_t audioCSRRead(uint32_t addr) {
bool rdValid = false; // read data has been returned
bool csrReady = false; // EP0 ready to accept a new CSR Rd/Wr yet
uint32_t status;
uint32_t rdData;
uint32_t rdAddr;
status = EP0READ(0x4002);
csrReady = !(status & 0x80000000);
while (!csrReady) {// while not ready, keep polling
printf ("Previous CSR to LM4550 still pending, status=%x...\n",status);
csrReady = !(EP0READ(0x4002) & 0x80000000);
status = EP0READ(0x4002);
}
// setup Rd Cmd
// 0x4001 ADCCSRCMD
// [31] Rd=1/Wr=0
// [22:16] addr
// [15:0] wrData
EP0WRITE(0x4001, ((addr & 0xff) << 16) | 0x80000000);
// Poll for Rd Valid
// 0x4002 ADCCSRSTAT
// [31] adcCsrReg still busy
// [30] RdData Valid
// [22:16] RdAddr
// [15:0] RdData
csrReady = !(EP0READ(0x4002) & 0x80000000);
while (!csrReady) {// while not ready, keep polling
printf ("CSR Read Return from LM4550 @ addr=%x is not ready yet...\n", addr);
csrReady = !(EP0READ(0x4002) & 0x80000000);
}
printf ("CSR Read to LM4550 @ addr=%x has been transmitted...\n", addr);
uint32_t i=0;
while (!rdValid) {
i++;
status = EP0READ(0x4002);
rdValid = status & 0x40000000;
rdData = status & 0x0000ffff;
rdAddr = (status & 0x007f0000) >> 16;
//printf ("CSR Read Data Return = %x for try #%d \n", status, i);
}
//printf("ADCCSRSTAT : valid=%x Rd Addr=%x Rd Data=%x\n", rdValid, rdAddr, rdData);
return rdData;
}
void audioCSRWrite(uint32_t addr, uint32_t data)
{
bool csrReady=false;
uint32_t status;
// 0x4001 ADCCSRCMD
// [31] Rd=1/Wr=0
// [22:16] addr
// [15:0] wrData
status = EP0READ(0x4002);
csrReady = !(status & 0x80000000);
while (!csrReady) {// while not ready, keep polling
printf ("Previous CSR to LM4550 still pending, status=%x...\n",status);
csrReady = !(EP0READ(0x4002) & 0x80000000);
}
EP0WRITE(0x4001, ((addr & 0x7f) << 16) | (data & 0xffff));
csrReady = !(EP0READ(0x4002) & 0x80000000);
while (!csrReady) {
csrReady = !(EP0READ(0x4002) & 0x80000000);
printf ("CSR Write still pending transmission...\n");
}
printf("Audio write @ addr=%x and data=%x has been sent out\n", addr, data);
}
//---------------------------------------------------------------------
//*********************************************************************
//********** AUDIO INIT STUFF *****************************
//*********************************************************************
//--------------------------------------------------------------------
void audioInit() {
EP0WRITE(0x4000, 0x1); // assert cold reset
EP0FLUSH;
sleep(1); // > 1us
EP0WRITE(0x4000, 0x0); // deassert cold reset
EP0FLUSH;
sleep(1);
EP0WRITE(0x4000, 0x80000000); // assert RxEn
EP0FLUSH;
// check for status register to see if LM4550 is ready
// [0] : ADC is ready for transmit data
// [1] : DAC is ready for receiving data
// [2] : Analog mixers ready
// [3] : Vref is up to nominal level
uint32_t audio_status;
audio_status = audioCSRRead(0x26);
while ((audio_status & 0xf) != 0xf) {
printf ("LM4550 chip is not ready yet...\n");
}
printf ("LM4550 chip is up and running... \n");
audioCSRWrite(0x06, 0x0000); // Mono volume
audioCSRWrite(0x04, 0x0f0f); // Headphone volume
audioCSRWrite(0x18, 0x0008); // PCM out volume
printf ("Audio Init done... \n");
}
//-------------------------------
//--- I2C WRITE ---------------------------
//-------------------------------
// the address is the address for the device
void i2cwrite(uint32_t addr, uint32_t data)
{
uint32_t tmp;
//--------------------------------
//i2cwrite
EP0WRITE(0x6010, 0x0);
EP0WRITE(0x6010, 0x0);
EP0WRITE(0x600c, 0x0);
EP0WRITE(0x600c, 0x0);
EP0FLUSH;
EP0WRITE(0x6000, addr);
EP0WRITE(0x6000, addr);
EP0WRITE(0x6008,data);
EP0WRITE(0x6008,data);
//// 2 bytes of data, speed 0xff, enable i2c adc clock and data,
//// addr1 valid, addr0 invalid, segment valid, write=0, start xfer
//3'b0,
//9'h2(num bytes of data),
//12'hff (3ff is default for slowest speed)
//3'b1 (Enable the I2C ADC clock and datapath),
//1'b1, (addr1_valid)
//1'b0, (addr0_valid)
//1'b0, (segment_valid)
//1'b0, (read=1/write=0)
//1'b1; (start transfer)
EP0WRITE(0x600c,0x0020ff31);
EP0WRITE(0x600c,0x0020ff31);
EP0FLUSH;
printf ("INFO: ...I2C Write Addr::0x%08x - Data::0x%08x \n",addr,data);
for(uint32_t i=0; i<64; i++) {
tmp = EP0READ(0x6010);
tmp = EP0READ(0x6010);
printf("INFO: ...Polling I2C Status: 0x%08x\n",tmp );
if ((tmp & 0x1)) break;
EP0FLUSH;
}
//-------------------------------
}
//-------------------------------
//--- wolfson WRITE ---------------------------
//-------------------------------
// the address is for the internal register
// the data and address has an interesting arrangement
// the i2c address for the wolfson is 0x34
void wolfwrite(uint32_t addr, uint32_t data)
{
uint32_t i2cdata;
// 16'b0,data[7:0],addr[6:0],data[8]
i2cdata = (0x0000FF00 & (data << 8));
i2cdata = i2cdata | (0x00000001 & (data >> 8));
i2cdata = i2cdata | (0x000000FE & (addr << 1));
printf ("INFO: ...Wolfson Write RegAdr=0x%02x data=0x%03x\n",addr,data);
i2cwrite(0x00340000,i2cdata); // i2c wolfson part address
}
void audioInitP4(bool switchover = true, bool max_vol = false) {
// Initializing Wolfson part
wolfwrite(0x0f,0x1); // reset register values to default
// enable everything
// Pwr Mgmt1
wolfwrite(0x19,0x0);
sleep(1);
wolfwrite(0x19,0x1FE);
// Pwr Mgmt2
wolfwrite(0x1A,0x1FE);
// enable on-board speaker by default
// switchover when headphone is detected
wolfwrite(0x18,0x40);
printf (">>> Enable everything...<<< \n");
//addr = 8 data 9'b0_0011_0111 sample rate 22.05khz
//addr = 8 data 9'b0_0010_0011 sample rate 44.118khz
//addr = 8 data 9'b0_0010_0111 sample rate 8.01khz
printf (">>> Audio Sample rate set up 22.05khz...<<<\n");
wolfwrite(0x08,0x37); //sample rate 22.05khz
//wolfwrite(0x08,0x23); //sample rate 44.11khz
//addr = 7 data 9'b0_0100_0010 enable master mode
printf (">>> Audio Enable Master Mode... <<< \n");
wolfwrite(0x07,0x042); //enable master mode
// Enable Left Mixer
// left mixer
// addr = 0x22 data 9'b1_0000_0000
wolfwrite(0x22, 0x100);
// Enable Right Mixer
// right mixer
// addr = 0x25 data 9'b1_0000_0000
wolfwrite(0x25, 0x100);
// Update gains
// default values at the moment
// addr = 0x0a, data 9'b1_1111_1111
// addr = 0x0b, data 9'b1_1111_1111
// addr = 0x02, data 9'b1_0111_1001
// addr = 0x03, data 9'b1_0111_1001
if(max_vol) {
wolfwrite(0x0a, 0x0ff);
wolfwrite(0x0b, 0x1ff);
// Choon newly added to beef up volume further
// turn up max volume
// remove for now, so that we don't overdrive the output stage
wolfwrite(0x2, 0x07f);
wolfwrite(0x3, 0x17f);
wolfwrite(0x28, 0x07f);
wolfwrite(0x29, 0x17f);
} else { // normal vol
wolfwrite(0x0a, 0x0ef);
wolfwrite(0x0b, 0x1ef);
}
wolfwrite(0x02, 0x079);
wolfwrite(0x03, 0x179);
// Tom feedback to add 9/8/07
if(switchover) {
wolfwrite(0x18, 0x50);
} else {
wolfwrite(0x18, 0x10);
}
wolfwrite(0x17, 0x1c0);
// remove digital soft mute
wolfwrite(0x05, 0x000);
// for audio_in path
wolfwrite(0x11, 0x17b); // ALC for left channel
wolfwrite(0x14, 0x043); // noise gate to reduce hissing sound
EP0WRITE(0x4000, 0x00000001); // reset assertiion in BCLK domain
EP0FLUSH;
sleep(1); // > 1us
//EP0WRITE(0x4003, 0x0); // set trig value
//EP0WRITE(0x4000, 0x40000000); // enable mono and enable Tx/Rx
EP0FLUSH;
sleep(1); // > 1us
printf ("Set up for Mono and enabling Tx/Rx...\n");
printf ("DONE AUDIO INIT!!!...\n");
}
// loops back mic-in to speaker out in Wolfson
void audioInitLpbk() {
//wolfwrite
// LMIXSEL = LINPUT1
// LI2LO = enable LMIXSEL to LOUT
wolfwrite(0x22, 0x180);
// LI2R0 = enable LMIXSEL to ROUT
wolfwrite(0x24, 0x080);
}
// disconnecting audio
void audioDisconnect() {
printf("Disconnecting audio...\n");
EP0WRITE(0x4000, 0x00000000); // enable mono and enable Tx/Rx
EP0FLUSH;
sleep(1);
EP0WRITE(0x4003, 0x0); // set trig value
}
//---------------------------------------------------------------------
//*********************************************************************
//********** AUDIO INIT STUFF END *****************************
//*********************************************************************
//--------------------------------------------------------------------
bool cvtSupport() {
uint32_t offset;
uint32_t rd_data;
offset = 0x18;
EP0WRITE(0x6004, (( offset ) & 0xff ) << 8 );
EP0WRITE( 0x600C, ( 0x4 << 20 ) | ( 0x3ff << 8 ) | ( 0x1f ));
rd_data = EP0READ(0x6008);
printf("I2C READ EDID Table @ offset %08x: 0x%08x\n",offset, rd_data);
return (((rd_data & 0x1)) == 1);
}
uint32_t calcClkSynthSettings(uint32_t freq) {
uint32_t fin = 25; // 25MHz
uint32_t fout;
uint32_t RDW;
uint32_t VDW;
uint32_t RDW_max = 123; // max divider value for fin
float VDW_min;
float VDW_max;
uint32_t OD;
float fout_calc;
bool converge=false;
float ppm;
uint32_t S;
for(RDW=1;RDW < RDW_max;RDW++) {
// use commercial temperature range
VDW_min = ((55/(2*(float)fin))*(RDW+2))-8;
VDW_max = ((400/(2*(float)fin))*(RDW+2))-8;
if(VDW_min < 4) VDW_min=3; // VDW range 4-511
//printf("RDW=%0d, VDW_min=%0f, VDW_max=%0f\n",RDW, VDW_min,VDW_max);
for(VDW=(int)VDW_max;VDW>(int)VDW_min;VDW--) {
for(OD=2;OD<10;OD++) {
if(converge) break;
if(OD==9) {OD=OD+1;} // no OD=9
fout_calc = (float)fin * 2 * ((float)VDW+8)/(((float)RDW+2)*(float)OD);
ppm = ((fout_calc - (float)freq) / (float)freq) * 1000000;
if(ppm < 0) ppm = (ppm * -1); // ppm was negative
//printf("VDW=%0d, RDW=%0d, OD=%0d, fout_calc = %0f, ppm=%0f\n",VDW, RDW, OD, fout_calc, ppm);
if(ppm < 500) { // if < 500ppm
converge = true;
break;
}
}
if(converge) break;
}
if(converge) break;
}
printf("VDW=%0d, RDW=%0d, OD=%0d, fout_calc = %0f\n",VDW,RDW,OD,fout_calc);
switch (OD)
{
case 2 :
S = 0x1;
break;
case 3 :
S = 0x6;
break;
case 4 :
S = 0x3;
break;
case 5 :
S = 0x4;
break;
case 6 :
S = 0x7;
break;
case 7 :
S = 0x5;
break;
case 8 :
S = 0x2;
break;
case 10 :
S = 0x0;
break;
}
uint32_t F = 0x0;
uint32_t TTL = 0x1;
uint32_t C = 0x0;
uint32_t settings = ((RDW & 0x7f) |
((VDW & 0x001) << 7) |
((VDW & 0x1fe) >> 1 << 8) |
((S & 0x7) << 16) |
((F & 0x3) << 19) |
((TTL & 0x1) << 21) |
((C & 0x3) << 22));
printf("clk synth settings = 0x%0x\n", settings);
return settings;
}