diff --git a/meson.build b/meson.build index b537dbe50..67e34a678 100644 --- a/meson.build +++ b/meson.build @@ -123,6 +123,8 @@ simde_neon_families = [ 'qdmulh_lane', 'qdmulh_n', 'qdmull', + 'qrdmlah', + 'qrdmlsh', 'qrdmulh', 'qrdmulh_lane', 'qrdmulh_n', diff --git a/simde/arm/neon.h b/simde/arm/neon.h index 634abc122..fbc48ae48 100644 --- a/simde/arm/neon.h +++ b/simde/arm/neon.h @@ -144,6 +144,8 @@ #include "neon/qdmulh_lane.h" #include "neon/qdmulh_n.h" #include "neon/qdmull.h" +#include "neon/qrdmlah.h" +#include "neon/qrdmlsh.h" #include "neon/qrdmulh.h" #include "neon/qrdmulh_lane.h" #include "neon/qrdmulh_n.h" diff --git a/simde/arm/neon/qrdmlah.h b/simde/arm/neon/qrdmlah.h new file mode 100644 index 000000000..c1edfcdb9 --- /dev/null +++ b/simde/arm/neon/qrdmlah.h @@ -0,0 +1,173 @@ +/* SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Copyright: + * 2023 Yung-Cheng Su + */ + +#if !defined(SIMDE_ARM_NEON_QRDMLAH_H) +#define SIMDE_ARM_NEON_QRDMLAH_H + +#include "types.h" +#include "qadd.h" +#include "qrdmulh.h" + +HEDLEY_DIAGNOSTIC_PUSH +SIMDE_DISABLE_UNWANTED_DIAGNOSTICS +SIMDE_BEGIN_DECLS_ + +SIMDE_FUNCTION_ATTRIBUTES +int16_t +simde_vqrdmlahh_s16(int16_t a, int16_t b, int16_t c) { + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) + return vqrdmlahh_s16(a, b, c); + #else + return simde_vqaddh_s16(a, simde_vqrdmulhh_s16(b, c)); + #endif +} +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) + #undef vqrdmlahh_s16 + #define vqrdmlahh_s16(a, b, c) simde_vqrdmlahh_s16((a), (b), (c)) +#endif + +SIMDE_FUNCTION_ATTRIBUTES +int32_t +simde_vqrdmlahs_s32(int32_t a, int32_t b, int32_t c) { + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) + return vqrdmlahs_s32(a, b, c); + #else + return simde_vqadds_s32(a, simde_vqrdmulhs_s32(b, c)); + #endif +} +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) + #undef vqrdmlahs_s32 + #define vqrdmlahs_s32(a, b, c) simde_vqrdmlahs_s32((a), (b), (c)) +#endif + +SIMDE_FUNCTION_ATTRIBUTES +simde_int16x4_t +simde_vqrdmlah_s16(simde_int16x4_t a, simde_int16x4_t b, simde_int16x4_t c) { + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) + return vqrdmlah_s16(a, b, c); + #else + simde_int16x4_private + r_, + a_ = simde_int16x4_to_private(a), + b_ = simde_int16x4_to_private(b), + c_ = simde_int16x4_to_private(c); + + SIMDE_VECTORIZE + for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { + r_.values[i] = simde_vqrdmlahh_s16(a_.values[i], b_.values[i], c_.values[i]); + } + + return simde_int16x4_from_private(r_); + + #endif +} +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) + #undef vqrdmlah_s16 + #define vqrdmlah_s16(a, b, c) simde_vqrdmlah_s16((a), (b), (c)) +#endif + +SIMDE_FUNCTION_ATTRIBUTES +simde_int32x2_t +simde_vqrdmlah_s32(simde_int32x2_t a, simde_int32x2_t b, simde_int32x2_t c) { + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) + return vqrdmlah_s32(a, b, c); + #else + simde_int32x2_private + r_, + a_ = simde_int32x2_to_private(a), + b_ = simde_int32x2_to_private(b), + c_ = simde_int32x2_to_private(c); + + SIMDE_VECTORIZE + for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { + r_.values[i] = simde_vqrdmlahs_s32(a_.values[i], b_.values[i], c_.values[i]); + } + + return simde_int32x2_from_private(r_); + + #endif +} +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) + #undef vqrdmlah_s32 + #define vqrdmlah_s32(a, b, c) simde_vqrdmlah_s32((a), (b), (c)) +#endif + +SIMDE_FUNCTION_ATTRIBUTES +simde_int16x8_t +simde_vqrdmlahq_s16(simde_int16x8_t a, simde_int16x8_t b, simde_int16x8_t c) { + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) + return vqrdmlahq_s16(a, b, c); + #else + simde_int16x8_private + r_, + a_ = simde_int16x8_to_private(a), + b_ = simde_int16x8_to_private(b), + c_ = simde_int16x8_to_private(c); + + SIMDE_VECTORIZE + for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { + r_.values[i] = simde_vqrdmlahh_s16(a_.values[i], b_.values[i], c_.values[i]); + } + + return simde_int16x8_from_private(r_); + + #endif +} +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) + #undef vqrdmlahq_s16 + #define vqrdmlahq_s16(a, b, c) simde_vqrdmlahq_s16((a), (b), (c)) +#endif + +SIMDE_FUNCTION_ATTRIBUTES +simde_int32x4_t +simde_vqrdmlahq_s32(simde_int32x4_t a, simde_int32x4_t b, simde_int32x4_t c) { + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) + return vqrdmlahq_s32(a, b, c); + #else + simde_int32x4_private + r_, + a_ = simde_int32x4_to_private(a), + b_ = simde_int32x4_to_private(b), + c_ = simde_int32x4_to_private(c); + + SIMDE_VECTORIZE + for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { + r_.values[i] = simde_vqrdmlahs_s32(a_.values[i], b_.values[i], c_.values[i]); + } + + return simde_int32x4_from_private(r_); + + #endif +} +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) + #undef vqrdmlahq_s32 + #define vqrdmlahq_s32(a, b, c) simde_vqrdmlahq_s32((a), (b), (c)) +#endif + +SIMDE_END_DECLS_ +HEDLEY_DIAGNOSTIC_POP + +#endif /* !defined(SIMDE_ARM_NEON_QRDMLAH_H) */ diff --git a/simde/arm/neon/qrdmlsh.h b/simde/arm/neon/qrdmlsh.h new file mode 100644 index 000000000..9ba721317 --- /dev/null +++ b/simde/arm/neon/qrdmlsh.h @@ -0,0 +1,173 @@ +/* SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Copyright: + * 2023 Yung-Cheng Su + */ + +#if !defined(SIMDE_ARM_NEON_QRDMLSH_H) +#define SIMDE_ARM_NEON_QRDMLSH_H + +#include "types.h" +#include "qadd.h" +#include "qrdmulh.h" + +HEDLEY_DIAGNOSTIC_PUSH +SIMDE_DISABLE_UNWANTED_DIAGNOSTICS +SIMDE_BEGIN_DECLS_ + +SIMDE_FUNCTION_ATTRIBUTES +int16_t +simde_vqrdmlshh_s16(int16_t a, int16_t b, int16_t c) { + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) + return vqrdmlshh_s16(a, b, c); + #else + return simde_vqaddh_s16(a, simde_vqrdmulhh_s16(-b, c)); + #endif +} +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) + #undef vqrdmlshh_s16 + #define vqrdmlshh_s16(a, b, c) simde_vqrdmlshh_s16((a), (b), (c)) +#endif + +SIMDE_FUNCTION_ATTRIBUTES +int32_t +simde_vqrdmlshs_s32(int32_t a, int32_t b, int32_t c) { + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) + return vqrdmlshs_s32(a, b, c); + #else + return simde_vqadds_s32(a, simde_vqrdmulhs_s32(-b, c)); + #endif +} +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) + #undef vqrdmlshs_s32 + #define vqrdmlshs_s32(a, b, c) simde_vqrdmlshs_s32((a), (b), (c)) +#endif + +SIMDE_FUNCTION_ATTRIBUTES +simde_int16x4_t +simde_vqrdmlsh_s16(simde_int16x4_t a, simde_int16x4_t b, simde_int16x4_t c) { + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) + return vqrdmlsh_s16(a, b, c); + #else + simde_int16x4_private + r_, + a_ = simde_int16x4_to_private(a), + b_ = simde_int16x4_to_private(b), + c_ = simde_int16x4_to_private(c); + + SIMDE_VECTORIZE + for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { + r_.values[i] = simde_vqrdmlshh_s16(a_.values[i], b_.values[i], c_.values[i]); + } + + return simde_int16x4_from_private(r_); + + #endif +} +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) + #undef vqrdmlsh_s16 + #define vqrdmlsh_s16(a, b, c) simde_vqrdmlsh_s16((a), (b), (c)) +#endif + +SIMDE_FUNCTION_ATTRIBUTES +simde_int32x2_t +simde_vqrdmlsh_s32(simde_int32x2_t a, simde_int32x2_t b, simde_int32x2_t c) { + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) + return vqrdmlsh_s32(a, b, c); + #else + simde_int32x2_private + r_, + a_ = simde_int32x2_to_private(a), + b_ = simde_int32x2_to_private(b), + c_ = simde_int32x2_to_private(c); + + SIMDE_VECTORIZE + for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { + r_.values[i] = simde_vqrdmlshs_s32(a_.values[i], b_.values[i], c_.values[i]); + } + + return simde_int32x2_from_private(r_); + + #endif +} +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) + #undef vqrdmlsh_s32 + #define vqrdmlsh_s32(a, b, c) simde_vqrdmlsh_s32((a), (b), (c)) +#endif + +SIMDE_FUNCTION_ATTRIBUTES +simde_int16x8_t +simde_vqrdmlshq_s16(simde_int16x8_t a, simde_int16x8_t b, simde_int16x8_t c) { + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) + return vqrdmlshq_s16(a, b, c); + #else + simde_int16x8_private + r_, + a_ = simde_int16x8_to_private(a), + b_ = simde_int16x8_to_private(b), + c_ = simde_int16x8_to_private(c); + + SIMDE_VECTORIZE + for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { + r_.values[i] = simde_vqrdmlshh_s16(a_.values[i], b_.values[i], c_.values[i]); + } + + return simde_int16x8_from_private(r_); + + #endif +} +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) + #undef vqrdmlshq_s16 + #define vqrdmlshq_s16(a, b, c) simde_vqrdmlshq_s16((a), (b), (c)) +#endif + +SIMDE_FUNCTION_ATTRIBUTES +simde_int32x4_t +simde_vqrdmlshq_s32(simde_int32x4_t a, simde_int32x4_t b, simde_int32x4_t c) { + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) + return vqrdmlshq_s32(a, b, c); + #else + simde_int32x4_private + r_, + a_ = simde_int32x4_to_private(a), + b_ = simde_int32x4_to_private(b), + c_ = simde_int32x4_to_private(c); + + SIMDE_VECTORIZE + for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) { + r_.values[i] = simde_vqrdmlshs_s32(a_.values[i], b_.values[i], c_.values[i]); + } + + return simde_int32x4_from_private(r_); + + #endif +} +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) + #undef vqrdmlshq_s32 + #define vqrdmlshq_s32(a, b, c) simde_vqrdmlshq_s32((a), (b), (c)) +#endif + +SIMDE_END_DECLS_ +HEDLEY_DIAGNOSTIC_POP + +#endif /* !defined(SIMDE_ARM_NEON_QRDMLSH_H) */ diff --git a/test/arm/neon/qrdmlah.c b/test/arm/neon/qrdmlah.c new file mode 100644 index 000000000..f92cb27a9 --- /dev/null +++ b/test/arm/neon/qrdmlah.c @@ -0,0 +1,443 @@ +#define SIMDE_TEST_ARM_NEON_INSN qrdmlah + +#include "test-neon.h" +#include "../../../simde/arm/neon/qrdmlah.h" + +static int +test_simde_vqrdmlahh_s16 (SIMDE_MUNIT_TEST_ARGS) { +#if 1 + static const struct { + int16_t a; + int16_t b; + int16_t c; + int16_t r; + } test_vec[] = { + { INT16_C( 30656), + -INT16_C( 19466), + INT16_C( 18374), + INT16_C( 19741) }, + { -INT16_C( 8457), + INT16_C( 26747), + -INT16_C( 7839), + -INT16_C( 14856) }, + { INT16_C( 13346), + INT16_C( 1479), + -INT16_C( 28487), + INT16_C( 12060) }, + { INT16_C( 26813), + -INT16_C( 23836), + INT16_C( 30182), + INT16_C( 4858) }, + { -INT16_C( 312), + -INT16_C( 23307), + INT16_C( 24956), + -INT16_C( 18063) }, + { INT16_C( 15471), + INT16_C( 26072), + -INT16_C( 24849), + -INT16_C( 4300) }, + { -INT16_C( 6227), + INT16_C( 10365), + -INT16_C( 8625), + -INT16_C( 8955) }, + { INT16_C( 28937), + -INT16_C( 12270), + -INT16_C( 13193), + INT16_MAX }, + }; + + for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) { + int16_t a = test_vec[i].a; + int16_t b = test_vec[i].b; + int16_t c = test_vec[i].c; + int16_t r; + + r = simde_vqrdmlahh_s16(a, b, c); + + simde_assert_equal_i16(r, test_vec[i].r); + } + + return 0; +#else + fputc('\n', stdout); + for (int i = 0 ; i < 8 ; i++) { + int16_t a = simde_test_codegen_random_i16(); + int16_t b = simde_test_codegen_random_i16(); + int16_t c = simde_test_codegen_random_i16(); + int16_t r; + + r = simde_vqrdmlahh_s16(a, b, c); + + simde_test_codegen_write_i16(2, a, SIMDE_TEST_VEC_POS_FIRST); + simde_test_codegen_write_i16(2, b, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_codegen_write_i16(2, c, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_codegen_write_i16(2, r, SIMDE_TEST_VEC_POS_LAST); + } + return 1; +#endif +} + +static int +test_simde_vqrdmlahh_s32 (SIMDE_MUNIT_TEST_ARGS) { +#if 1 + static const struct { + int32_t a; + int32_t b; + int32_t c; + int32_t r; + } test_vec[] = { + { INT32_C( 1251206131), + INT32_C( 1068782168), + -INT32_C( 1771955267), + INT32_C( 369320863) }, + { -INT32_C( 185862299), + INT32_C( 2037134812), + -INT32_C( 1514592853), + -INT32_C( 1622627524) }, + { INT32_C( 919836184), + -INT32_C( 165931773), + INT32_C( 1346416888), + INT32_C( 815801240) }, + { -INT32_C( 1081084670), + INT32_C( 1968566544), + -INT32_C( 999734808), + -INT32_C( 1997526803) }, + { INT32_C( 557766262), + INT32_C( 331806715), + -INT32_C( 1857447282), + INT32_C( 270772933) }, + { -INT32_C( 1484298833), + INT32_C( 402180117), + -INT32_C( 841513027), + -INT32_C( 1641897150) }, + { INT32_C( 1631792249), + -INT32_C( 484004755), + INT32_C( 2097505410), + INT32_C( 1159051703) }, + { -INT32_C( 376386725), + INT32_C( 343595365), + INT32_C( 1421607487), + -INT32_C( 148930863) }, + }; + + for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) { + int32_t a = test_vec[i].a; + int32_t b = test_vec[i].b; + int32_t c = test_vec[i].c; + int32_t r; + + r = simde_vqrdmlahs_s32(a, b, c); + + simde_assert_equal_i32(r, test_vec[i].r); + } + + return 0; +#else + fputc('\n', stdout); + for (int i = 0 ; i < 8 ; i++) { + int32_t a = simde_test_codegen_random_i32(); + int32_t b = simde_test_codegen_random_i32(); + int32_t c = simde_test_codegen_random_i32(); + int32_t r; + + r = simde_vqrdmlahs_s32(a, b, c); + + simde_test_codegen_write_i32(2, a, SIMDE_TEST_VEC_POS_FIRST); + simde_test_codegen_write_i32(2, b, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_codegen_write_i32(2, c, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_codegen_write_i32(2, r, SIMDE_TEST_VEC_POS_LAST); + } + return 1; +#endif +} + +static int +test_simde_vqrdmlah_s16 (SIMDE_MUNIT_TEST_ARGS) { +#if 1 + static const struct { + int16_t a[4]; + int16_t b[4]; + int16_t c[4]; + int16_t r[4]; + } test_vec[] = { + { { -INT16_C( 8017), INT16_C( 21852), -INT16_C( 31403), INT16_C( 23989) }, + { -INT16_C( 28592), INT16_C( 7035), -INT16_C( 27036), INT16_C( 24029) }, + { -INT16_C( 24847), INT16_C( 22362), INT16_C( 23626), INT16_C( 12326) }, + { INT16_C( 13663), INT16_C( 26653), INT16_MIN, INT16_MAX } }, + { { INT16_C( 19644), -INT16_C( 5987), INT16_C( 27055), INT16_C( 24240) }, + { INT16_C( 3145), -INT16_C( 24653), INT16_C( 26769), -INT16_C( 7684) }, + { INT16_C( 30712), INT16_C( 24061), -INT16_C( 9714), -INT16_C( 70) }, + { INT16_C( 22592), -INT16_C( 24089), INT16_C( 19119), INT16_C( 24256) } }, + { { INT16_C( 5496), -INT16_C( 15530), INT16_C( 31857), INT16_C( 12019) }, + { -INT16_C( 28472), INT16_C( 30486), -INT16_C( 14599), INT16_C( 17365) }, + { -INT16_C( 30510), INT16_C( 25570), -INT16_C( 8464), -INT16_C( 5819) }, + { INT16_C( 32006), INT16_C( 8259), INT16_MAX, INT16_C( 8935) } }, + { { INT16_C( 16982), INT16_C( 25670), INT16_C( 28), -INT16_C( 27549) }, + { -INT16_C( 18155), -INT16_C( 30889), INT16_C( 19254), -INT16_C( 331) }, + { -INT16_C( 13349), -INT16_C( 10890), INT16_C( 19346), INT16_C( 25624) }, + { INT16_C( 24378), INT16_MAX, INT16_C( 11395), -INT16_C( 27808) } }, + { { -INT16_C( 1324), -INT16_C( 15160), INT16_C( 3544), INT16_C( 11949) }, + { -INT16_C( 3249), INT16_C( 27538), -INT16_C( 2572), INT16_C( 2559) }, + { INT16_C( 22447), -INT16_C( 6768), INT16_C( 17826), INT16_C( 32227) }, + { -INT16_C( 3550), -INT16_C( 20848), INT16_C( 2145), INT16_C( 14466) } }, + { { INT16_C( 22801), -INT16_C( 23726), INT16_C( 27301), INT16_C( 30983) }, + { -INT16_C( 12444), INT16_C( 15677), -INT16_C( 5156), INT16_C( 11115) }, + { -INT16_C( 290), -INT16_C( 11626), -INT16_C( 26893), -INT16_C( 23844) }, + { INT16_C( 22911), -INT16_C( 29288), INT16_C( 31533), INT16_C( 22895) } }, + { { INT16_C( 27885), -INT16_C( 28793), INT16_C( 27570), -INT16_C( 15604) }, + { INT16_C( 24516), INT16_C( 26982), INT16_C( 28105), INT16_C( 12002) }, + { INT16_C( 8253), INT16_C( 6507), -INT16_C( 10741), -INT16_C( 5819) }, + { INT16_MAX, -INT16_C( 23435), INT16_C( 18357), -INT16_C( 17735) } }, + { { -INT16_C( 9260), -INT16_C( 14148), -INT16_C( 26511), INT16_C( 24170) }, + { -INT16_C( 3580), -INT16_C( 18707), -INT16_C( 1443), INT16_C( 8569) }, + { -INT16_C( 8359), INT16_C( 8843), INT16_C( 27981), -INT16_C( 30128) }, + { -INT16_C( 8347), -INT16_C( 19196), -INT16_C( 27743), INT16_C( 16291) } }, + }; + + for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) { + simde_int16x4_t a = simde_vld1_s16(test_vec[i].a); + simde_int16x4_t b = simde_vld1_s16(test_vec[i].b); + simde_int16x4_t c = simde_vld1_s16(test_vec[i].c); + simde_int16x4_t r = simde_vqrdmlah_s16(a, b, c); + + simde_test_arm_neon_assert_equal_i16x4(r, simde_vld1_s16(test_vec[i].r)); + } + + return 0; +#else + fputc('\n', stdout); + for (int i = 0 ; i < 8 ; i++) { + simde_int16x4_t a = simde_test_arm_neon_random_i16x4(); + simde_int16x4_t b = simde_test_arm_neon_random_i16x4(); + simde_int16x4_t c = simde_test_arm_neon_random_i16x4(); + simde_int16x4_t r = simde_vqrdmlah_s16(a, b, c); + + simde_test_arm_neon_write_i16x4(2, a, SIMDE_TEST_VEC_POS_FIRST); + simde_test_arm_neon_write_i16x4(2, b, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i16x4(2, c, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i16x4(2, r, SIMDE_TEST_VEC_POS_LAST); + } + return 1; +#endif +} + +static int +test_simde_vqrdmlah_s32 (SIMDE_MUNIT_TEST_ARGS) { +#if 1 + static const struct { + int32_t a[2]; + int32_t b[2]; + int32_t c[2]; + int32_t r[2]; + } test_vec[] = { + { { -INT32_C( 37212184), INT32_C( 1279192937) }, + { INT32_C( 1067723269), INT32_C( 1460253124) }, + { -INT32_C( 220182439), INT32_C( 253140152) }, + { -INT32_C( 146686318), INT32_C( 1451324025) } }, + { { -INT32_C( 1905971062), INT32_C( 1885950856) }, + { -INT32_C( 345165438), INT32_C( 624405280) }, + { -INT32_C( 1704665898), -INT32_C( 403607923) }, + { -INT32_C( 1631979802), INT32_C( 1768597265) } }, + { { INT32_C( 1859768758), -INT32_C( 125964434) }, + { -INT32_C( 1467555040), -INT32_C( 1206325194) }, + { INT32_C( 1118012705), INT32_C( 107469360) }, + { INT32_C( 1095737245), -INT32_C( 186334159) } }, + { { INT32_C( 1151388854), -INT32_C( 265579974) }, + { -INT32_C( 782367645), INT32_C( 348838900) }, + { -INT32_C( 188985154), INT32_C( 1655493696) }, + { INT32_C( 1220239609), INT32_C( 3339699) } }, + { { -INT32_C( 1985720487), -INT32_C( 527430870) }, + { INT32_C( 287584471), INT32_C( 637620162) }, + { INT32_C( 1224171348), -INT32_C( 111361733) }, + { -INT32_C( 1821783188), -INT32_C( 560495842) } }, + { { INT32_C( 1391335442), INT32_C( 1169464044) }, + { INT32_C( 349067498), INT32_C( 1005870692) }, + { INT32_C( 1364007311), -INT32_C( 1133031832) }, + { INT32_C( 1613051039), INT32_C( 638757552) } }, + { { -INT32_C( 385585234), INT32_C( 1122132016) }, + { INT32_C( 1687539832), INT32_C( 1437157739) }, + { INT32_C( 107575458), INT32_C( 1698782678) }, + { -INT32_C( 301050076), INT32_MAX } }, + { { -INT32_C( 541618570), -INT32_C( 1952764195) }, + { -INT32_C( 831217507), INT32_C( 2031113728) }, + { -INT32_C( 1830968025), -INT32_C( 1847097361) }, + { INT32_C( 167086560), INT32_MIN } }, + }; + + for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) { + simde_int32x2_t a = simde_vld1_s32(test_vec[i].a); + simde_int32x2_t b = simde_vld1_s32(test_vec[i].b); + simde_int32x2_t c = simde_vld1_s32(test_vec[i].c); + simde_int32x2_t r = simde_vqrdmlah_s32(a, b, c); + + simde_test_arm_neon_assert_equal_i32x2(r, simde_vld1_s32(test_vec[i].r)); + } + + return 0; +#else + fputc('\n', stdout); + for (int i = 0 ; i < 8 ; i++) { + simde_int32x2_t a = simde_test_arm_neon_random_i32x2(); + simde_int32x2_t b = simde_test_arm_neon_random_i32x2(); + simde_int32x2_t c = simde_test_arm_neon_random_i32x2(); + simde_int32x2_t r = simde_vqrdmlah_s32(a, b, c); + + simde_test_arm_neon_write_i32x2(2, a, SIMDE_TEST_VEC_POS_FIRST); + simde_test_arm_neon_write_i32x2(2, b, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i32x2(2, c, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i32x2(2, r, SIMDE_TEST_VEC_POS_LAST); + } + return 1; +#endif +} + +static int +test_simde_vqrdmlahq_s16 (SIMDE_MUNIT_TEST_ARGS) { +#if 1 + static const struct { + int16_t a[8]; + int16_t b[8]; + int16_t c[8]; + int16_t r[8]; + } test_vec[] = { + { { INT16_C( 17403), -INT16_C( 16448), INT16_C( 10315), INT16_C( 3945), -INT16_C( 11297), INT16_C( 27818), INT16_C( 16611), INT16_C( 6124) }, + { -INT16_C( 7037), INT16_C( 22575), INT16_C( 21339), INT16_C( 31844), -INT16_C( 2247), INT16_C( 6153), -INT16_C( 31266), -INT16_C( 9965) }, + { -INT16_C( 11320), INT16_C( 5017), INT16_C( 763), -INT16_C( 9694), -INT16_C( 12842), -INT16_C( 18106), INT16_C( 12813), -INT16_C( 28464) }, + { INT16_C( 19834), -INT16_C( 12992), INT16_C( 10812), -INT16_C( 5476), -INT16_C( 10416), INT16_C( 24418), INT16_C( 4385), INT16_C( 14780) } }, + { { -INT16_C( 234), INT16_C( 29160), INT16_C( 19538), -INT16_C( 29715), -INT16_C( 2493), INT16_C( 8611), -INT16_C( 18821), INT16_C( 17403) }, + { -INT16_C( 27511), -INT16_C( 31658), INT16_C( 31126), INT16_C( 27743), -INT16_C( 23226), INT16_C( 21286), -INT16_C( 2344), -INT16_C( 4381) }, + { -INT16_C( 13322), INT16_C( 18528), INT16_C( 19735), INT16_C( 23252), INT16_C( 30532), -INT16_C( 16516), INT16_C( 30510), -INT16_C( 18685) }, + { INT16_C( 10951), INT16_C( 11260), INT16_MAX, -INT16_C( 10029), -INT16_C( 24134), -INT16_C( 2118), -INT16_C( 21003), INT16_C( 19901) } }, + { { INT16_C( 22795), -INT16_C( 24260), -INT16_C( 25646), INT16_C( 6158), INT16_C( 13376), INT16_C( 6251), INT16_C( 20010), INT16_C( 8199) }, + { INT16_C( 26393), INT16_C( 12393), INT16_C( 15796), -INT16_C( 1909), INT16_C( 1972), -INT16_C( 7496), -INT16_C( 17538), -INT16_C( 30310) }, + { -INT16_C( 10732), -INT16_C( 6358), INT16_C( 14449), -INT16_C( 19969), INT16_C( 27500), -INT16_C( 26678), -INT16_C( 11847), -INT16_C( 11337) }, + { INT16_C( 14151), -INT16_C( 26665), -INT16_C( 18681), INT16_C( 7321), INT16_C( 15031), INT16_C( 12354), INT16_C( 26351), INT16_C( 18686) } }, + { { INT16_C( 8248), -INT16_C( 5117), -INT16_C( 29091), INT16_C( 4837), -INT16_C( 25195), INT16_C( 5108), -INT16_C( 29096), INT16_C( 27804) }, + { -INT16_C( 14492), -INT16_C( 10925), INT16_C( 21503), INT16_C( 27783), INT16_C( 20926), INT16_C( 30467), -INT16_C( 17886), INT16_C( 23114) }, + { INT16_C( 20187), INT16_C( 14406), INT16_C( 11228), INT16_C( 29258), INT16_C( 16328), INT16_C( 8325), INT16_C( 8909), INT16_C( 12941) }, + { -INT16_C( 680), -INT16_C( 9920), -INT16_C( 21723), INT16_C( 29644), -INT16_C( 14768), INT16_C( 12848), INT16_MIN, INT16_MAX } }, + { { -INT16_C( 7959), -INT16_C( 6137), -INT16_C( 29133), -INT16_C( 3756), INT16_C( 22495), INT16_C( 361), -INT16_C( 19694), -INT16_C( 4773) }, + { -INT16_C( 24063), -INT16_C( 8667), INT16_C( 28877), -INT16_C( 27056), -INT16_C( 10833), INT16_C( 31926), INT16_C( 17399), -INT16_C( 8018) }, + { -INT16_C( 18908), INT16_C( 22473), INT16_C( 7492), INT16_C( 9289), -INT16_C( 19851), -INT16_C( 30939), -INT16_C( 32411), INT16_C( 26484) }, + { INT16_C( 5926), -INT16_C( 12081), -INT16_C( 22531), -INT16_C( 11426), INT16_C( 29058), -INT16_C( 29783), INT16_MIN, -INT16_C( 11253) } }, + { { -INT16_C( 26333), -INT16_C( 4027), -INT16_C( 27383), -INT16_C( 18298), INT16_C( 15722), INT16_C( 25141), -INT16_C( 7296), -INT16_C( 23486) }, + { INT16_C( 2969), -INT16_C( 8452), INT16_C( 17705), -INT16_C( 25086), INT16_C( 10231), INT16_C( 23589), -INT16_C( 26200), -INT16_C( 13373) }, + { INT16_C( 2098), INT16_C( 15548), INT16_C( 17053), INT16_C( 2292), INT16_C( 10623), INT16_C( 106), -INT16_C( 21491), -INT16_C( 22876) }, + { -INT16_C( 26143), -INT16_C( 8037), -INT16_C( 18169), -INT16_C( 20053), INT16_C( 19039), INT16_C( 25217), INT16_C( 9887), -INT16_C( 14150) } }, + { { -INT16_C( 24392), -INT16_C( 7804), -INT16_C( 31003), -INT16_C( 9089), -INT16_C( 23378), INT16_C( 22073), -INT16_C( 963), INT16_C( 28450) }, + { -INT16_C( 8699), -INT16_C( 23893), -INT16_C( 24544), -INT16_C( 24406), INT16_C( 5321), -INT16_C( 10592), INT16_C( 17601), INT16_C( 31101) }, + { INT16_C( 485), -INT16_C( 13734), -INT16_C( 9848), INT16_C( 13991), -INT16_C( 8067), -INT16_C( 17780), -INT16_C( 20772), -INT16_C( 7895) }, + { -INT16_C( 24521), INT16_C( 2210), -INT16_C( 23627), -INT16_C( 19510), -INT16_C( 24688), INT16_C( 27820), -INT16_C( 12120), INT16_C( 20957) } }, + { { -INT16_C( 10868), -INT16_C( 21116), INT16_C( 11893), INT16_C( 15949), -INT16_C( 4797), INT16_C( 1045), -INT16_C( 28111), INT16_C( 5757) }, + { -INT16_C( 10349), INT16_C( 7137), -INT16_C( 30544), INT16_C( 11601), -INT16_C( 8600), INT16_C( 17639), INT16_C( 4236), INT16_C( 6438) }, + { -INT16_C( 21787), INT16_C( 23238), INT16_C( 5080), INT16_C( 7065), -INT16_C( 20992), INT16_C( 12575), -INT16_C( 25536), -INT16_C( 11448) }, + { -INT16_C( 3987), -INT16_C( 16055), INT16_C( 7158), INT16_C( 18450), INT16_C( 712), INT16_C( 7814), -INT16_C( 31412), INT16_C( 3508) } }, + }; + + for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) { + simde_int16x8_t a = simde_vld1q_s16(test_vec[i].a); + simde_int16x8_t b = simde_vld1q_s16(test_vec[i].b); + simde_int16x8_t c = simde_vld1q_s16(test_vec[i].c); + simde_int16x8_t r = simde_vqrdmlahq_s16(a, b, c); + + simde_test_arm_neon_assert_equal_i16x8(r, simde_vld1q_s16(test_vec[i].r)); + } + + return 0; +#else + fputc('\n', stdout); + for (int i = 0 ; i < 8 ; i++) { + simde_int16x8_t a = simde_test_arm_neon_random_i16x8(); + simde_int16x8_t b = simde_test_arm_neon_random_i16x8(); + simde_int16x8_t c = simde_test_arm_neon_random_i16x8(); + simde_int16x8_t r = simde_vqrdmlahq_s16(a, b, c); + + simde_test_arm_neon_write_i16x8(2, a, SIMDE_TEST_VEC_POS_FIRST); + simde_test_arm_neon_write_i16x8(2, b, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i16x8(2, c, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i16x8(2, r, SIMDE_TEST_VEC_POS_LAST); + } + return 1; +#endif +} + +static int +test_simde_vqrdmlahq_s32 (SIMDE_MUNIT_TEST_ARGS) { +#if 1 + static const struct { + int32_t a[4]; + int32_t b[4]; + int32_t c[4]; + int32_t r[4]; + } test_vec[] = { + { { -INT32_C( 2037743945), -INT32_C( 1441556118), -INT32_C( 640087943), INT32_C( 2023424865) }, + { INT32_C( 1849891103), -INT32_C( 1831901942), -INT32_C( 1321204163), -INT32_C( 130060992) }, + { INT32_C( 1434372843), -INT32_C( 587165341), -INT32_C( 88680039), -INT32_C( 59616803) }, + { -INT32_C( 802142657), -INT32_C( 940677180), -INT32_C( 585529001), INT32_C( 2027035519) } }, + { { INT32_C( 1969927530), INT32_C( 1476868634), -INT32_C( 2130098368), -INT32_C( 1602664268) }, + { INT32_C( 1995831058), INT32_C( 559150472), -INT32_C( 1407514161), -INT32_C( 978809510) }, + { INT32_C( 1564087106), -INT32_C( 1917501107), INT32_C( 1024376456), INT32_C( 433948422) }, + { INT32_MAX, INT32_C( 977599804), INT32_MIN, -INT32_C( 1800455223) } }, + { { INT32_C( 110088830), -INT32_C( 1758993720), INT32_C( 1162035947), INT32_C( 302705615) }, + { INT32_C( 1265583358), INT32_C( 249111685), -INT32_C( 397678622), -INT32_C( 318691217) }, + { -INT32_C( 1024159494), INT32_C( 1566120818), INT32_C( 765697118), -INT32_C( 2042647160) }, + { -INT32_C( 493482337), -INT32_C( 1577321093), INT32_C( 1020241445), INT32_C( 605838870) } }, + { { INT32_C( 2010296050), -INT32_C( 1266308142), INT32_C( 27119762), -INT32_C( 202400008) }, + { -INT32_C( 1581915345), INT32_C( 1560219646), INT32_C( 864723627), INT32_C( 1102760271) }, + { INT32_C( 1253674104), -INT32_C( 906019273), INT32_C( 130784271), INT32_C( 1778039354) }, + { INT32_C( 1086793650), -INT32_C( 1924561848), INT32_C( 79782444), INT32_C( 710645901) } }, + { { -INT32_C( 1693732707), INT32_C( 1794640575), -INT32_C( 73497940), -INT32_C( 1019389877) }, + { INT32_C( 453965540), INT32_C( 1139019060), -INT32_C( 481579095), INT32_C( 105727337) }, + { -INT32_C( 1264428811), INT32_C( 236952162), INT32_C( 1728691484), -INT32_C( 114604523) }, + { -INT32_C( 1961025596), INT32_C( 1920319310), -INT32_C( 461161744), -INT32_C( 1025032216) } }, + { { INT32_C( 1897150780), -INT32_C( 273352634), INT32_C( 299040680), INT32_C( 974659397) }, + { -INT32_C( 638600585), INT32_C( 1894190676), -INT32_C( 522718773), INT32_C( 1960378935) }, + { -INT32_C( 2115637957), -INT32_C( 1922000411), -INT32_C( 559987815), -INT32_C( 635914398) }, + { INT32_MAX, -INT32_C( 1968655535), INT32_C( 435347256), INT32_C( 394150581) } }, + { { -INT32_C( 978122895), -INT32_C( 533357803), -INT32_C( 1010824052), INT32_C( 1245157647) }, + { INT32_C( 1825315974), INT32_C( 1341734070), -INT32_C( 500328321), -INT32_C( 1061403313) }, + { INT32_C( 1652911949), -INT32_C( 1773946358), -INT32_C( 698743865), INT32_C( 589336989) }, + { INT32_C( 426817528), -INT32_C( 1641708160), -INT32_C( 848028240), INT32_C( 953875228) } }, + { { INT32_C( 1687153838), -INT32_C( 1464628951), INT32_C( 1904926753), INT32_C( 1915831845) }, + { -INT32_C( 1059735626), INT32_C( 945231985), -INT32_C( 1206996709), -INT32_C( 254005438) }, + { INT32_C( 1146383131), INT32_C( 384632820), INT32_C( 226981863), INT32_C( 1954527422) }, + { INT32_C( 1121439149), -INT32_C( 1295329760), INT32_C( 1777351224), INT32_C( 1684649366) } }, + }; + + for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) { + simde_int32x4_t a = simde_vld1q_s32(test_vec[i].a); + simde_int32x4_t b = simde_vld1q_s32(test_vec[i].b); + simde_int32x4_t c = simde_vld1q_s32(test_vec[i].c); + simde_int32x4_t r = simde_vqrdmlahq_s32(a, b, c); + + simde_test_arm_neon_assert_equal_i32x4(r, simde_vld1q_s32(test_vec[i].r)); + } + + return 0; +#else + fputc('\n', stdout); + for (int i = 0 ; i < 8 ; i++) { + simde_int32x4_t a = simde_test_arm_neon_random_i32x4(); + simde_int32x4_t b = simde_test_arm_neon_random_i32x4(); + simde_int32x4_t c = simde_test_arm_neon_random_i32x4(); + simde_int32x4_t r = simde_vqrdmlahq_s32(a, b, c); + + simde_test_arm_neon_write_i32x4(2, a, SIMDE_TEST_VEC_POS_FIRST); + simde_test_arm_neon_write_i32x4(2, b, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i32x4(2, c, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i32x4(2, r, SIMDE_TEST_VEC_POS_LAST); + } + return 1; +#endif +} + +SIMDE_TEST_FUNC_LIST_BEGIN +SIMDE_TEST_FUNC_LIST_ENTRY(vqrdmlahh_s16) +SIMDE_TEST_FUNC_LIST_ENTRY(vqrdmlahh_s32) +SIMDE_TEST_FUNC_LIST_ENTRY(vqrdmlah_s16) +SIMDE_TEST_FUNC_LIST_ENTRY(vqrdmlah_s32) +SIMDE_TEST_FUNC_LIST_ENTRY(vqrdmlahq_s16) +SIMDE_TEST_FUNC_LIST_ENTRY(vqrdmlahq_s32) +SIMDE_TEST_FUNC_LIST_END + +#include "test-neon-footer.h" \ No newline at end of file diff --git a/test/arm/neon/qrdmlsh.c b/test/arm/neon/qrdmlsh.c new file mode 100644 index 000000000..2a873c365 --- /dev/null +++ b/test/arm/neon/qrdmlsh.c @@ -0,0 +1,443 @@ +#define SIMDE_TEST_ARM_NEON_INSN qrdmlsh + +#include "test-neon.h" +#include "../../../simde/arm/neon/qrdmlsh.h" + +static int +test_simde_vqrdmlshh_s16 (SIMDE_MUNIT_TEST_ARGS) { +#if 1 + static const struct { + int16_t a; + int16_t b; + int16_t c; + int16_t r; + } test_vec[] = { + { -INT16_C( 4762), + -INT16_C( 12912), + -INT16_C( 24871), + -INT16_C( 14562) }, + { -INT16_C( 23120), + -INT16_C( 8732), + INT16_C( 2674), + -INT16_C( 22407) }, + { INT16_C( 18627), + INT16_C( 20248), + -INT16_C( 30680), + INT16_MAX }, + { INT16_C( 6721), + -INT16_C( 1158), + -INT16_C( 12995), + INT16_C( 6262) }, + { INT16_C( 11210), + INT16_C( 15844), + -INT16_C( 7884), + INT16_C( 15022) }, + { -INT16_C( 25985), + INT16_C( 4046), + -INT16_C( 22424), + -INT16_C( 23216) }, + { INT16_C( 6318), + -INT16_C( 28083), + -INT16_C( 16139), + -INT16_C( 7514) }, + { -INT16_C( 18276), + -INT16_C( 19192), + INT16_C( 12552), + -INT16_C( 10924) }, + }; + + for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) { + int16_t a = test_vec[i].a; + int16_t b = test_vec[i].b; + int16_t c = test_vec[i].c; + int16_t r; + + r = simde_vqrdmlshh_s16(a, b, c); + + simde_assert_equal_i16(r, test_vec[i].r); + } + + return 0; +#else + fputc('\n', stdout); + for (int i = 0 ; i < 8 ; i++) { + int16_t a = simde_test_codegen_random_i16(); + int16_t b = simde_test_codegen_random_i16(); + int16_t c = simde_test_codegen_random_i16(); + int16_t r; + + r = simde_vqrdmlshh_s16(a, b, c); + + simde_test_codegen_write_i16(2, a, SIMDE_TEST_VEC_POS_FIRST); + simde_test_codegen_write_i16(2, b, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_codegen_write_i16(2, c, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_codegen_write_i16(2, r, SIMDE_TEST_VEC_POS_LAST); + } + return 1; +#endif +} + +static int +test_simde_vqrdmlshh_s32 (SIMDE_MUNIT_TEST_ARGS) { +#if 1 + static const struct { + int32_t a; + int32_t b; + int32_t c; + int32_t r; + } test_vec[] = { + { INT32_C( 117785660), + INT32_C( 790454664), + -INT32_C( 513974284), + INT32_C( 306971440) }, + { -INT32_C( 1040318372), + INT32_C( 557790548), + -INT32_C( 189730628), + -INT32_C( 991037461) }, + { INT32_C( 1023116168), + INT32_C( 33294533), + -INT32_C( 737672628), + INT32_C( 1034553026) }, + { INT32_C( 1459889507), + -INT32_C( 516398716), + -INT32_C( 1247660447), + INT32_C( 1159868478) }, + { INT32_C( 685171052), + INT32_C( 1495042001), + -INT32_C( 812312822), + INT32_C( 1250689578) }, + { INT32_C( 1825608224), + -INT32_C( 146679660), + -INT32_C( 2108799491), + INT32_C( 1681570809) }, + { INT32_C( 123963046), + INT32_C( 683476412), + -INT32_C( 1219390490), + INT32_C( 512056635) }, + { INT32_C( 621833498), + -INT32_C( 1510693499), + -INT32_C( 888027849), + -INT32_C( 2868767) }, + }; + + for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) { + int32_t a = test_vec[i].a; + int32_t b = test_vec[i].b; + int32_t c = test_vec[i].c; + int32_t r; + + r = simde_vqrdmlshs_s32(a, b, c); + + simde_assert_equal_i32(r, test_vec[i].r); + } + + return 0; +#else + fputc('\n', stdout); + for (int i = 0 ; i < 8 ; i++) { + int32_t a = simde_test_codegen_random_i32(); + int32_t b = simde_test_codegen_random_i32(); + int32_t c = simde_test_codegen_random_i32(); + int32_t r; + + r = simde_vqrdmlshs_s32(a, b, c); + + simde_test_codegen_write_i32(2, a, SIMDE_TEST_VEC_POS_FIRST); + simde_test_codegen_write_i32(2, b, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_codegen_write_i32(2, c, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_codegen_write_i32(2, r, SIMDE_TEST_VEC_POS_LAST); + } + return 1; +#endif +} + +static int +test_simde_vqrdmlsh_s16 (SIMDE_MUNIT_TEST_ARGS) { +#if 1 + static const struct { + int16_t a[4]; + int16_t b[4]; + int16_t c[4]; + int16_t r[4]; + } test_vec[] = { + { { INT16_C( 21149), -INT16_C( 25662), INT16_C( 4247), INT16_C( 15645) }, + { -INT16_C( 32618), INT16_C( 21317), INT16_C( 645), INT16_C( 27515) }, + { -INT16_C( 13163), -INT16_C( 20446), INT16_C( 12858), -INT16_C( 16427) }, + { INT16_C( 8046), -INT16_C( 12361), INT16_C( 3994), INT16_C( 29439) } }, + { { -INT16_C( 13865), INT16_C( 3940), INT16_C( 30094), INT16_C( 11482) }, + { -INT16_C( 25144), INT16_C( 24519), -INT16_C( 6995), INT16_C( 17565) }, + { -INT16_C( 7580), -INT16_C( 5737), INT16_C( 4836), INT16_C( 31060) }, + { -INT16_C( 19681), INT16_C( 8233), INT16_C( 31126), -INT16_C( 5167) } }, + { { INT16_C( 30431), INT16_C( 6441), -INT16_C( 344), INT16_C( 32728) }, + { INT16_C( 15560), INT16_C( 22158), INT16_C( 27057), INT16_C( 31106) }, + { INT16_C( 18694), -INT16_C( 19495), INT16_C( 30253), -INT16_C( 28169) }, + { INT16_C( 21554), INT16_C( 19624), -INT16_C( 25324), INT16_MAX } }, + { { -INT16_C( 29096), INT16_C( 15482), -INT16_C( 12639), -INT16_C( 32587) }, + { -INT16_C( 8380), -INT16_C( 4967), INT16_C( 29149), -INT16_C( 23188) }, + { -INT16_C( 1363), INT16_C( 24316), INT16_C( 32355), INT16_C( 27096) }, + { -INT16_C( 29445), INT16_C( 19168), INT16_MIN, -INT16_C( 13413) } }, + { { -INT16_C( 20024), -INT16_C( 2787), INT16_C( 5159), INT16_C( 32647) }, + { INT16_C( 419), INT16_C( 17595), INT16_C( 28880), INT16_C( 5316) }, + { INT16_C( 23887), INT16_C( 11521), INT16_C( 28110), INT16_C( 31698) }, + { -INT16_C( 20329), -INT16_C( 8973), -INT16_C( 19616), INT16_C( 27505) } }, + { { -INT16_C( 12697), -INT16_C( 13351), -INT16_C( 20147), INT16_C( 5428) }, + { INT16_C( 20834), -INT16_C( 30454), -INT16_C( 28314), INT16_C( 2312) }, + { -INT16_C( 15469), INT16_C( 25421), INT16_C( 4404), -INT16_C( 31881) }, + { -INT16_C( 2862), INT16_C( 10275), -INT16_C( 16342), INT16_C( 7677) } }, + { { INT16_C( 30830), INT16_C( 15536), -INT16_C( 31771), INT16_C( 19895) }, + { -INT16_C( 28591), -INT16_C( 25064), INT16_C( 19522), -INT16_C( 23373) }, + { -INT16_C( 16738), INT16_C( 1070), INT16_C( 13903), -INT16_C( 7667) }, + { INT16_C( 16226), INT16_C( 16354), INT16_MIN, INT16_C( 14426) } }, + { { INT16_C( 23290), INT16_C( 11845), -INT16_C( 17045), -INT16_C( 9807) }, + { INT16_C( 25141), INT16_C( 6933), -INT16_C( 13083), INT16_C( 13928) }, + { -INT16_C( 32676), -INT16_C( 24875), -INT16_C( 30516), INT16_C( 27203) }, + { INT16_MAX, INT16_C( 17108), -INT16_C( 29229), -INT16_C( 21370) } }, + }; + + for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) { + simde_int16x4_t a = simde_vld1_s16(test_vec[i].a); + simde_int16x4_t b = simde_vld1_s16(test_vec[i].b); + simde_int16x4_t c = simde_vld1_s16(test_vec[i].c); + simde_int16x4_t r = simde_vqrdmlsh_s16(a, b, c); + + simde_test_arm_neon_assert_equal_i16x4(r, simde_vld1_s16(test_vec[i].r)); + } + + return 0; +#else + fputc('\n', stdout); + for (int i = 0 ; i < 8 ; i++) { + simde_int16x4_t a = simde_test_arm_neon_random_i16x4(); + simde_int16x4_t b = simde_test_arm_neon_random_i16x4(); + simde_int16x4_t c = simde_test_arm_neon_random_i16x4(); + simde_int16x4_t r = simde_vqrdmlsh_s16(a, b, c); + + simde_test_arm_neon_write_i16x4(2, a, SIMDE_TEST_VEC_POS_FIRST); + simde_test_arm_neon_write_i16x4(2, b, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i16x4(2, c, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i16x4(2, r, SIMDE_TEST_VEC_POS_LAST); + } + return 1; +#endif +} + +static int +test_simde_vqrdmlsh_s32 (SIMDE_MUNIT_TEST_ARGS) { +#if 1 + static const struct { + int32_t a[2]; + int32_t b[2]; + int32_t c[2]; + int32_t r[2]; + } test_vec[] = { + { { -INT32_C( 1771146938), -INT32_C( 1585939545) }, + { INT32_C( 1087356629), -INT32_C( 1340505733) }, + { -INT32_C( 926208285), INT32_C( 1476277242) }, + { -INT32_C( 1302170739), -INT32_C( 664415366) } }, + { { -INT32_C( 2131373133), -INT32_C( 1561708452) }, + { INT32_C( 1362647465), -INT32_C( 1426935340) }, + { -INT32_C( 353713553), INT32_C( 647627843) }, + { -INT32_C( 1906930504), -INT32_C( 1131380120) } }, + { { INT32_C( 770598450), INT32_C( 1300556953) }, + { INT32_C( 483228096), INT32_C( 1539225522) }, + { -INT32_C( 441649392), INT32_C( 395288488) }, + { INT32_C( 869978669), INT32_C( 1017230870) } }, + { { -INT32_C( 1543407263), -INT32_C( 1328899203) }, + { -INT32_C( 1679968255), INT32_C( 1692950948) }, + { -INT32_C( 1937721894), INT32_C( 2112372588) }, + { INT32_MIN, INT32_MIN } }, + { { -INT32_C( 563964874), -INT32_C( 1795821261) }, + { -INT32_C( 398920086), -INT32_C( 1818754415) }, + { INT32_C( 1596880314), -INT32_C( 1329391914) }, + { -INT32_C( 267325767), INT32_MIN } }, + { { INT32_C( 926762187), -INT32_C( 1179376253) }, + { -INT32_C( 308865351), INT32_C( 1921092615) }, + { INT32_C( 324713090), INT32_C( 2007429820) }, + { INT32_C( 973464579), INT32_MIN } }, + { { INT32_C( 1037489255), -INT32_C( 1242719766) }, + { INT32_C( 1626155741), INT32_C( 152674639) }, + { -INT32_C( 1074351944), -INT32_C( 1104054468) }, + { INT32_C( 1851029131), -INT32_C( 1164227379) } }, + { { -INT32_C( 288191695), -INT32_C( 463112067) }, + { INT32_C( 924924749), -INT32_C( 1293086764) }, + { -INT32_C( 1995253191), INT32_C( 865217659) }, + { INT32_C( 571167145), INT32_C( 57870481) } }, + }; + + for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) { + simde_int32x2_t a = simde_vld1_s32(test_vec[i].a); + simde_int32x2_t b = simde_vld1_s32(test_vec[i].b); + simde_int32x2_t c = simde_vld1_s32(test_vec[i].c); + simde_int32x2_t r = simde_vqrdmlsh_s32(a, b, c); + + simde_test_arm_neon_assert_equal_i32x2(r, simde_vld1_s32(test_vec[i].r)); + } + + return 0; +#else + fputc('\n', stdout); + for (int i = 0 ; i < 8 ; i++) { + simde_int32x2_t a = simde_test_arm_neon_random_i32x2(); + simde_int32x2_t b = simde_test_arm_neon_random_i32x2(); + simde_int32x2_t c = simde_test_arm_neon_random_i32x2(); + simde_int32x2_t r = simde_vqrdmlsh_s32(a, b, c); + + simde_test_arm_neon_write_i32x2(2, a, SIMDE_TEST_VEC_POS_FIRST); + simde_test_arm_neon_write_i32x2(2, b, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i32x2(2, c, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i32x2(2, r, SIMDE_TEST_VEC_POS_LAST); + } + return 1; +#endif +} + +static int +test_simde_vqrdmlshq_s16 (SIMDE_MUNIT_TEST_ARGS) { +#if 1 + static const struct { + int16_t a[8]; + int16_t b[8]; + int16_t c[8]; + int16_t r[8]; + } test_vec[] = { + { { -INT16_C( 30500), INT16_C( 6643), INT16_C( 9471), INT16_C( 12759), -INT16_C( 22096), INT16_C( 11551), -INT16_C( 31710), INT16_C( 28434) }, + { INT16_C( 13247), -INT16_C( 27738), -INT16_C( 27838), INT16_C( 31813), INT16_C( 22637), -INT16_C( 5883), -INT16_C( 26748), INT16_C( 24604) }, + { INT16_C( 3871), INT16_C( 7801), INT16_C( 20788), -INT16_C( 7089), INT16_C( 28410), INT16_C( 7185), INT16_C( 9202), -INT16_C( 20085) }, + { -INT16_C( 32065), INT16_C( 13247), INT16_C( 27131), INT16_C( 19641), INT16_MIN, INT16_C( 12841), -INT16_C( 24199), INT16_MAX } }, + { { INT16_C( 12887), -INT16_C( 26299), -INT16_C( 30011), INT16_C( 13077), INT16_C( 6882), INT16_C( 26140), INT16_C( 14513), -INT16_C( 12089) }, + { INT16_C( 16456), INT16_C( 31983), INT16_C( 16017), -INT16_C( 29600), INT16_C( 29101), -INT16_C( 24664), INT16_C( 13461), -INT16_C( 5039) }, + { -INT16_C( 27034), INT16_C( 11141), -INT16_C( 25824), INT16_C( 862), INT16_C( 31413), INT16_C( 26473), INT16_C( 12467), -INT16_C( 1225) }, + { INT16_C( 26463), INT16_MIN, -INT16_C( 17388), INT16_C( 13856), -INT16_C( 21016), INT16_MAX, INT16_C( 9392), -INT16_C( 12277) } }, + { { INT16_C( 9841), INT16_C( 631), -INT16_C( 10395), INT16_C( 4750), INT16_C( 14152), -INT16_C( 8783), INT16_C( 619), -INT16_C( 11831) }, + { INT16_C( 20376), -INT16_C( 17924), INT16_C( 23530), -INT16_C( 24644), INT16_C( 9685), -INT16_C( 30714), INT16_C( 15958), -INT16_C( 14461) }, + { -INT16_C( 1436), -INT16_C( 13879), INT16_C( 22737), INT16_C( 6875), -INT16_C( 29297), -INT16_C( 1289), -INT16_C( 15985), INT16_C( 10443) }, + { INT16_C( 10734), -INT16_C( 6961), -INT16_C( 26722), INT16_C( 9921), INT16_C( 22811), -INT16_C( 9991), INT16_C( 8404), -INT16_C( 7222) } }, + { { -INT16_C( 14576), -INT16_C( 1311), -INT16_C( 25310), -INT16_C( 1895), -INT16_C( 24382), INT16_C( 6272), INT16_C( 1246), INT16_C( 17119) }, + { -INT16_C( 22018), -INT16_C( 12276), -INT16_C( 6399), -INT16_C( 28438), -INT16_C( 7820), INT16_C( 1162), INT16_C( 21922), -INT16_C( 19924) }, + { INT16_C( 3356), INT16_C( 16300), INT16_C( 18090), INT16_C( 27703), -INT16_C( 18458), -INT16_C( 15227), INT16_C( 25787), -INT16_C( 17914) }, + { -INT16_C( 12321), INT16_C( 4796), -INT16_C( 21777), INT16_C( 22147), -INT16_C( 28787), INT16_C( 6812), -INT16_C( 16006), INT16_C( 6227) } }, + { { INT16_C( 4621), INT16_C( 3722), INT16_C( 29946), INT16_C( 28318), INT16_C( 10325), -INT16_C( 1934), -INT16_C( 24963), -INT16_C( 25942) }, + { INT16_C( 22443), INT16_C( 21977), INT16_C( 4253), -INT16_C( 31806), INT16_C( 18375), -INT16_C( 31929), INT16_C( 19883), -INT16_C( 18115) }, + { -INT16_C( 14496), INT16_C( 23239), INT16_C( 26171), -INT16_C( 28472), INT16_C( 15246), INT16_C( 3208), INT16_C( 13273), -INT16_C( 31322) }, + { INT16_C( 14549), -INT16_C( 11864), INT16_C( 26549), INT16_C( 682), INT16_C( 1776), INT16_C( 1192), INT16_MIN, INT16_MIN } }, + { { INT16_C( 32650), INT16_C( 10202), -INT16_C( 25457), INT16_C( 22186), -INT16_C( 3613), -INT16_C( 28711), INT16_C( 5694), -INT16_C( 25016) }, + { INT16_C( 4061), INT16_C( 6392), -INT16_C( 16011), INT16_C( 1193), INT16_C( 12796), -INT16_C( 10992), -INT16_C( 18844), -INT16_C( 4518) }, + { INT16_C( 13621), -INT16_C( 15339), -INT16_C( 16431), -INT16_C( 19174), -INT16_C( 2896), -INT16_C( 4284), -INT16_C( 29686), -INT16_C( 6003) }, + { INT16_C( 30962), INT16_C( 13194), INT16_MIN, INT16_C( 22884), -INT16_C( 2482), -INT16_C( 30148), -INT16_C( 11378), -INT16_C( 25844) } }, + { { -INT16_C( 31077), INT16_C( 4352), -INT16_C( 22201), INT16_C( 17173), INT16_C( 9691), INT16_C( 16152), INT16_C( 29659), INT16_C( 4142) }, + { INT16_C( 17320), INT16_C( 31188), -INT16_C( 4605), -INT16_C( 19666), INT16_C( 29410), -INT16_C( 4702), INT16_C( 12542), -INT16_C( 25899) }, + { -INT16_C( 10826), -INT16_C( 597), -INT16_C( 16257), INT16_C( 23104), INT16_C( 22757), -INT16_C( 16231), -INT16_C( 14389), INT16_C( 29648) }, + { -INT16_C( 25355), INT16_C( 4920), -INT16_C( 24486), INT16_C( 31039), -INT16_C( 10734), INT16_C( 13823), INT16_MAX, INT16_C( 27575) } }, + { { -INT16_C( 23541), INT16_C( 3821), INT16_C( 7058), INT16_C( 30145), INT16_C( 25742), -INT16_C( 29598), INT16_C( 14228), INT16_C( 18982) }, + { -INT16_C( 12020), -INT16_C( 29881), -INT16_C( 30831), INT16_C( 30437), INT16_C( 32735), -INT16_C( 21706), INT16_C( 1606), INT16_C( 20766) }, + { INT16_C( 2986), INT16_C( 15711), INT16_C( 8487), -INT16_C( 19022), INT16_C( 5253), INT16_C( 6465), INT16_C( 26699), INT16_C( 22371) }, + { -INT16_C( 22446), INT16_C( 18148), INT16_C( 15043), INT16_MAX, INT16_C( 20494), -INT16_C( 25315), INT16_C( 12919), INT16_C( 4805) } }, + }; + + for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) { + simde_int16x8_t a = simde_vld1q_s16(test_vec[i].a); + simde_int16x8_t b = simde_vld1q_s16(test_vec[i].b); + simde_int16x8_t c = simde_vld1q_s16(test_vec[i].c); + simde_int16x8_t r = simde_vqrdmlshq_s16(a, b, c); + + simde_test_arm_neon_assert_equal_i16x8(r, simde_vld1q_s16(test_vec[i].r)); + } + + return 0; +#else + fputc('\n', stdout); + for (int i = 0 ; i < 8 ; i++) { + simde_int16x8_t a = simde_test_arm_neon_random_i16x8(); + simde_int16x8_t b = simde_test_arm_neon_random_i16x8(); + simde_int16x8_t c = simde_test_arm_neon_random_i16x8(); + simde_int16x8_t r = simde_vqrdmlshq_s16(a, b, c); + + simde_test_arm_neon_write_i16x8(2, a, SIMDE_TEST_VEC_POS_FIRST); + simde_test_arm_neon_write_i16x8(2, b, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i16x8(2, c, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i16x8(2, r, SIMDE_TEST_VEC_POS_LAST); + } + return 1; +#endif +} + +static int +test_simde_vqrdmlshq_s32 (SIMDE_MUNIT_TEST_ARGS) { +#if 1 + static const struct { + int32_t a[4]; + int32_t b[4]; + int32_t c[4]; + int32_t r[4]; + } test_vec[] = { + { { -INT32_C( 874272199), INT32_C( 272746545), -INT32_C( 1900316601), INT32_C( 702536318) }, + { INT32_C( 208027621), -INT32_C( 440330144), INT32_C( 2013135660), -INT32_C( 1529978517) }, + { INT32_C( 1013952779), -INT32_C( 1051938438), -INT32_C( 1487992791), -INT32_C( 942657566) }, + { -INT32_C( 972494220), INT32_C( 57052142), -INT32_C( 505413617), INT32_C( 30938271) } }, + { { -INT32_C( 824953234), INT32_C( 2058589518), INT32_C( 66171288), INT32_C( 497598482) }, + { -INT32_C( 346482831), -INT32_C( 240278072), -INT32_C( 1885733715), -INT32_C( 1722324693) }, + { -INT32_C( 295228512), INT32_C( 1500060352), -INT32_C( 581150005), -INT32_C( 1929772006) }, + { -INT32_C( 872586477), INT32_MAX, -INT32_C( 444144196), -INT32_C( 1050117134) } }, + { { -INT32_C( 461941988), -INT32_C( 1495915271), INT32_C( 1278635809), INT32_C( 2028375512) }, + { INT32_C( 2020036024), INT32_C( 869388392), INT32_C( 1158753834), INT32_C( 1322322738) }, + { INT32_C( 1479755871), -INT32_C( 1895954067), INT32_C( 1356477560), INT32_C( 2043265217) }, + { -INT32_C( 1853878159), -INT32_C( 728356245), INT32_C( 546698420), INT32_C( 770225743) } }, + { { INT32_C( 1995583502), INT32_C( 715768576), INT32_C( 611302129), INT32_C( 628244678) }, + { -INT32_C( 159537783), INT32_C( 646216622), INT32_C( 1903648432), INT32_C( 770392095) }, + { INT32_C( 1889787248), -INT32_C( 1835381600), -INT32_C( 843707897), -INT32_C( 739104694) }, + { INT32_C( 2135976873), INT32_C( 1268068054), INT32_C( 1359211533), INT32_C( 893392408) } }, + { { INT32_C( 2093576142), -INT32_C( 1700573718), -INT32_C( 888399188), -INT32_C( 889653414) }, + { INT32_C( 1949998036), -INT32_C( 301542169), INT32_C( 700169438), -INT32_C( 1275286043) }, + { INT32_C( 120571420), -INT32_C( 1079913965), INT32_C( 1183493612), INT32_C( 2014347940) }, + { INT32_C( 1984092639), -INT32_C( 1852211473), -INT32_C( 1274267578), INT32_C( 306569810) } }, + { { INT32_C( 99437085), -INT32_C( 34344161), -INT32_C( 1792626768), INT32_C( 2034770780) }, + { -INT32_C( 58689559), INT32_C( 918298954), INT32_C( 1937589967), -INT32_C( 420704823) }, + { -INT32_C( 135538216), INT32_C( 2096422860), -INT32_C( 367977586), INT32_C( 660822334) }, + { INT32_C( 95732899), -INT32_C( 930808691), -INT32_C( 1460615076), INT32_MAX } }, + { { INT32_C( 455336913), -INT32_C( 732831995), -INT32_C( 280506842), INT32_C( 886387548) }, + { -INT32_C( 651443956), INT32_C( 777330592), INT32_C( 2014865210), -INT32_C( 1851818816) }, + { INT32_C( 1689043807), -INT32_C( 935788894), INT32_C( 683114700), -INT32_C( 1067676237) }, + { INT32_C( 967712120), -INT32_C( 394101902), -INT32_C( 921435608), -INT32_C( 34291381) } }, + { { -INT32_C( 291928242), -INT32_C( 518197593), INT32_C( 375010389), INT32_C( 279443888) }, + { INT32_C( 1601459388), INT32_C( 505916754), -INT32_C( 532160723), -INT32_C( 1163877524) }, + { -INT32_C( 760727253), INT32_C( 2108933160), -INT32_C( 1449980424), -INT32_C( 1011270905) }, + { INT32_C( 275374704), -INT32_C( 1015032398), INT32_C( 15695601), -INT32_C( 268637341) } }, + }; + + for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])) ; i++) { + simde_int32x4_t a = simde_vld1q_s32(test_vec[i].a); + simde_int32x4_t b = simde_vld1q_s32(test_vec[i].b); + simde_int32x4_t c = simde_vld1q_s32(test_vec[i].c); + simde_int32x4_t r = simde_vqrdmlshq_s32(a, b, c); + + simde_test_arm_neon_assert_equal_i32x4(r, simde_vld1q_s32(test_vec[i].r)); + } + + return 0; +#else + fputc('\n', stdout); + for (int i = 0 ; i < 8 ; i++) { + simde_int32x4_t a = simde_test_arm_neon_random_i32x4(); + simde_int32x4_t b = simde_test_arm_neon_random_i32x4(); + simde_int32x4_t c = simde_test_arm_neon_random_i32x4(); + simde_int32x4_t r = simde_vqrdmlshq_s32(a, b, c); + + simde_test_arm_neon_write_i32x4(2, a, SIMDE_TEST_VEC_POS_FIRST); + simde_test_arm_neon_write_i32x4(2, b, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i32x4(2, c, SIMDE_TEST_VEC_POS_MIDDLE); + simde_test_arm_neon_write_i32x4(2, r, SIMDE_TEST_VEC_POS_LAST); + } + return 1; +#endif +} + +SIMDE_TEST_FUNC_LIST_BEGIN +SIMDE_TEST_FUNC_LIST_ENTRY(vqrdmlshh_s16) +SIMDE_TEST_FUNC_LIST_ENTRY(vqrdmlshh_s32) +SIMDE_TEST_FUNC_LIST_ENTRY(vqrdmlsh_s16) +SIMDE_TEST_FUNC_LIST_ENTRY(vqrdmlsh_s32) +SIMDE_TEST_FUNC_LIST_ENTRY(vqrdmlshq_s16) +SIMDE_TEST_FUNC_LIST_ENTRY(vqrdmlshq_s32) +SIMDE_TEST_FUNC_LIST_END + +#include "test-neon-footer.h"