From 96bb4018f9fc126bd8509741897daebc9d907c52 Mon Sep 17 00:00:00 2001 From: "Michael R. Crusoe" Date: Fri, 29 Sep 2023 13:21:00 +0200 Subject: [PATCH] [Fix] Add macro SIMDE_BUG_GCC_REV_260989 --- simde/arm/neon/st1_x2.h | 43 ++++++++++++++++++++-------------------- simde/arm/neon/st1_x3.h | 43 ++++++++++++++++++++-------------------- simde/arm/neon/st1_x4.h | 43 ++++++++++++++++++++-------------------- simde/arm/neon/st1q_x2.h | 43 ++++++++++++++++++++-------------------- simde/arm/neon/st1q_x3.h | 43 ++++++++++++++++++++-------------------- simde/arm/neon/st1q_x4.h | 43 ++++++++++++++++++++-------------------- simde/simde-common.h | 3 +++ test/arm/neon/st1_x2.c | 20 +++++++++---------- test/arm/neon/st1_x3.c | 20 +++++++++---------- test/arm/neon/st1_x4.c | 20 +++++++++---------- test/arm/neon/st1q_x2.c | 20 +++++++++---------- test/arm/neon/st1q_x3.c | 20 +++++++++---------- test/arm/neon/st1q_x4.c | 20 +++++++++---------- 13 files changed, 195 insertions(+), 186 deletions(-) diff --git a/simde/arm/neon/st1_x2.h b/simde/arm/neon/st1_x2.h index e818f4396..53e7107be 100644 --- a/simde/arm/neon/st1_x2.h +++ b/simde/arm/neon/st1_x2.h @@ -23,6 +23,7 @@ * Copyright: * 2020 Evan Nemerson * 2021 Décio Luiz Gazzoni Filho + * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_ST1_X2_H) @@ -39,7 +40,7 @@ SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f32_x2(simde_float32 ptr[HEDLEY_ARRAY_PARAM(4)], simde_float32x2x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_f32_x2(ptr, val); #else simde_vst1_f32(ptr, val.val[0]); @@ -48,28 +49,28 @@ simde_vst1_f32_x2(simde_float32 ptr[HEDLEY_ARRAY_PARAM(4)], simde_float32x2x2_t } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_f32_x2 - #define vst1_f32_x2(a, b) simde_vst1_f32_x2((a), (b)) + #define vst1_f32_x2(ptr, val) simde_vst1_f32_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f64_x2(simde_float64 ptr[HEDLEY_ARRAY_PARAM(2)], simde_float64x1x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1_f64_x2(ptr, val); #else simde_vst1_f64(ptr, val.val[0]); simde_vst1_f64(ptr+1, val.val[1]); #endif } -#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1_f64_x2 - #define vst1_f64_x2(a, b) simde_vst1_f64_x2((a), (b)) + #define vst1_f64_x2(ptr, val) simde_vst1_f64_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s8_x2(int8_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int8x8x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s8_x2(ptr, val); #else simde_vst1_s8(ptr, val.val[0]); @@ -78,13 +79,13 @@ simde_vst1_s8_x2(int8_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int8x8x2_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s8_x2 - #define vst1_s8_x2(a, b) simde_vst1_s8_x2((a), (b)) + #define vst1_s8_x2(ptr, val) simde_vst1_s8_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s16_x2(int16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int16x4x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s16_x2(ptr, val); #else simde_vst1_s16(ptr, val.val[0]); @@ -93,13 +94,13 @@ simde_vst1_s16_x2(int16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int16x4x2_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s16_x2 - #define vst1_s16_x2(a, b) simde_vst1_s16_x2((a), (b)) + #define vst1_s16_x2(ptr, val) simde_vst1_s16_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s32_x2(int32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int32x2x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s32_x2(ptr, val); #else simde_vst1_s32(ptr, val.val[0]); @@ -108,13 +109,13 @@ simde_vst1_s32_x2(int32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int32x2x2_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s32_x2 - #define vst1_s32_x2(a, b) simde_vst1_s32_x2((a), (b)) + #define vst1_s32_x2(ptr, val) simde_vst1_s32_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s64_x2(int64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int64x1x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s64_x2(ptr, val); #else simde_vst1_s64(ptr, val.val[0]); @@ -123,13 +124,13 @@ simde_vst1_s64_x2(int64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int64x1x2_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s64_x2 - #define vst1_s64_x2(a, b) simde_vst1_s64_x2((a), (b)) + #define vst1_s64_x2(ptr, val) simde_vst1_s64_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u8_x2(uint8_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint8x8x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u8_x2(ptr, val); #else simde_vst1_u8(ptr, val.val[0]); @@ -138,13 +139,13 @@ simde_vst1_u8_x2(uint8_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint8x8x2_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u8_x2 - #define vst1_u8_x2(a, b) simde_vst1_u8_x2((a), (b)) + #define vst1_u8_x2(ptr, val) simde_vst1_u8_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u16_x2(uint16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint16x4x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u16_x2(ptr, val); #else simde_vst1_u16(ptr, val.val[0]); @@ -153,13 +154,13 @@ simde_vst1_u16_x2(uint16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint16x4x2_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u16_x2 - #define vst1_u16_x2(a, b) simde_vst1_u16_x2((a), (b)) + #define vst1_u16_x2(ptr, val) simde_vst1_u16_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u32_x2(uint32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint32x2x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u32_x2(ptr, val); #else simde_vst1_u32(ptr, val.val[0]); @@ -168,13 +169,13 @@ simde_vst1_u32_x2(uint32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint32x2x2_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u32_x2 - #define vst1_u32_x2(a, b) simde_vst1_u32_x2((a), (b)) + #define vst1_u32_x2(ptr, val) simde_vst1_u32_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u64_x2(uint64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint64x1x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u64_x2(ptr, val); #else simde_vst1_u64(ptr, val.val[0]); @@ -183,7 +184,7 @@ simde_vst1_u64_x2(uint64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint64x1x2_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u64_x2 - #define vst1_u64_x2(a, b) simde_vst1_u64_x2((a), (b)) + #define vst1_u64_x2(ptr, val) simde_vst1_u64_x2((ptr), (val)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ diff --git a/simde/arm/neon/st1_x3.h b/simde/arm/neon/st1_x3.h index 13bd227cd..7b85cfab1 100644 --- a/simde/arm/neon/st1_x3.h +++ b/simde/arm/neon/st1_x3.h @@ -23,6 +23,7 @@ * Copyright: * 2020 Evan Nemerson * 2021 Décio Luiz Gazzoni Filho + * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_ST1_X3_H) @@ -39,7 +40,7 @@ SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f32_x3(simde_float32 ptr[HEDLEY_ARRAY_PARAM(6)], simde_float32x2x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_f32_x3(ptr, val); #else simde_vst1_f32(ptr, val.val[0]); @@ -49,13 +50,13 @@ simde_vst1_f32_x3(simde_float32 ptr[HEDLEY_ARRAY_PARAM(6)], simde_float32x2x3_t } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_f32_x3 - #define vst1_f32_x3(a, b) simde_vst1_f32_x3((a), (b)) + #define vst1_f32_x3(ptr, val) simde_vst1_f32_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f64_x3(simde_float64 ptr[HEDLEY_ARRAY_PARAM(3)], simde_float64x1x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1_f64_x3(ptr, val); #else simde_vst1_f64(ptr, val.val[0]); @@ -63,15 +64,15 @@ simde_vst1_f64_x3(simde_float64 ptr[HEDLEY_ARRAY_PARAM(3)], simde_float64x1x3_t simde_vst1_f64(ptr+2, val.val[2]); #endif } -#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1_f64_x3 - #define vst1_f64_x3(a, b) simde_vst1_f64_x3((a), (b)) + #define vst1_f64_x3(ptr, val) simde_vst1_f64_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s8_x3(int8_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_int8x8x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s8_x3(ptr, val); #else simde_vst1_s8(ptr, val.val[0]); @@ -81,13 +82,13 @@ simde_vst1_s8_x3(int8_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_int8x8x3_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s8_x3 - #define vst1_s8_x3(a, b) simde_vst1_s8_x3((a), (b)) + #define vst1_s8_x3(ptr, val) simde_vst1_s8_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s16_x3(int16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_int16x4x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s16_x3(ptr, val); #else simde_vst1_s16(ptr, val.val[0]); @@ -97,13 +98,13 @@ simde_vst1_s16_x3(int16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_int16x4x3_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s16_x3 - #define vst1_s16_x3(a, b) simde_vst1_s16_x3((a), (b)) + #define vst1_s16_x3(ptr, val) simde_vst1_s16_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s32_x3(int32_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_int32x2x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s32_x3(ptr, val); #else simde_vst1_s32(ptr, val.val[0]); @@ -113,13 +114,13 @@ simde_vst1_s32_x3(int32_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_int32x2x3_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s32_x3 - #define vst1_s32_x3(a, b) simde_vst1_s32_x3((a), (b)) + #define vst1_s32_x3(ptr, val) simde_vst1_s32_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s64_x3(int64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_int64x1x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s64_x3(ptr, val); #else simde_vst1_s64(ptr, val.val[0]); @@ -129,13 +130,13 @@ simde_vst1_s64_x3(int64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_int64x1x3_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s64_x3 - #define vst1_s64_x3(a, b) simde_vst1_s64_x3((a), (b)) + #define vst1_s64_x3(ptr, val) simde_vst1_s64_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u8_x3(uint8_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_uint8x8x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u8_x3(ptr, val); #else simde_vst1_u8(ptr, val.val[0]); @@ -145,13 +146,13 @@ simde_vst1_u8_x3(uint8_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_uint8x8x3_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u8_x3 - #define vst1_u8_x3(a, b) simde_vst1_u8_x3((a), (b)) + #define vst1_u8_x3(ptr, val) simde_vst1_u8_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u16_x3(uint16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_uint16x4x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u16_x3(ptr, val); #else simde_vst1_u16(ptr, val.val[0]); @@ -161,13 +162,13 @@ simde_vst1_u16_x3(uint16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_uint16x4x3_t val) } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u16_x3 - #define vst1_u16_x3(a, b) simde_vst1_u16_x3((a), (b)) + #define vst1_u16_x3(ptr, val) simde_vst1_u16_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u32_x3(uint32_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_uint32x2x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u32_x3(ptr, val); #else simde_vst1_u32(ptr, val.val[0]); @@ -177,13 +178,13 @@ simde_vst1_u32_x3(uint32_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_uint32x2x3_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u32_x3 - #define vst1_u32_x3(a, b) simde_vst1_u32_x3((a), (b)) + #define vst1_u32_x3(ptr, val) simde_vst1_u32_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u64_x3(uint64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint64x1x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u64_x3(ptr, val); #else simde_vst1_u64(ptr, val.val[0]); @@ -193,7 +194,7 @@ simde_vst1_u64_x3(uint64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint64x1x3_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u64_x3 - #define vst1_u64_x3(a, b) simde_vst1_u64_x3((a), (b)) + #define vst1_u64_x3(ptr, val) simde_vst1_u64_x3((ptr), (val)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ diff --git a/simde/arm/neon/st1_x4.h b/simde/arm/neon/st1_x4.h index 01f170e70..b9b3497d1 100644 --- a/simde/arm/neon/st1_x4.h +++ b/simde/arm/neon/st1_x4.h @@ -23,6 +23,7 @@ * Copyright: * 2020 Evan Nemerson * 2021 Décio Luiz Gazzoni Filho + * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_ST1_X4_H) @@ -39,7 +40,7 @@ SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f32_x4(simde_float32 ptr[HEDLEY_ARRAY_PARAM(8)], simde_float32x2x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_f32_x4(ptr, val); #else simde_vst1_f32(ptr, val.val[0]); @@ -50,13 +51,13 @@ simde_vst1_f32_x4(simde_float32 ptr[HEDLEY_ARRAY_PARAM(8)], simde_float32x2x4_t } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_f32_x4 - #define vst1_f32_x4(a, b) simde_vst1_f32_x4((a), (b)) + #define vst1_f32_x4(ptr, val) simde_vst1_f32_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_f64_x4(simde_float64 ptr[HEDLEY_ARRAY_PARAM(4)], simde_float64x1x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1_f64_x4(ptr, val); #else simde_vst1_f64(ptr, val.val[0]); @@ -65,15 +66,15 @@ simde_vst1_f64_x4(simde_float64 ptr[HEDLEY_ARRAY_PARAM(4)], simde_float64x1x4_t simde_vst1_f64(ptr+3, val.val[3]); #endif } -#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1_f64_x4 - #define vst1_f64_x4(a, b) simde_vst1_f64_x4((a), (b)) + #define vst1_f64_x4(ptr, val) simde_vst1_f64_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s8_x4(int8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_int8x8x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s8_x4(ptr, val); #else simde_vst1_s8(ptr, val.val[0]); @@ -84,13 +85,13 @@ simde_vst1_s8_x4(int8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_int8x8x4_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s8_x4 - #define vst1_s8_x4(a, b) simde_vst1_s8_x4((a), (b)) + #define vst1_s8_x4(ptr, val) simde_vst1_s8_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s16_x4(int16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int16x4x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s16_x4(ptr, val); #else simde_vst1_s16(ptr, val.val[0]); @@ -101,13 +102,13 @@ simde_vst1_s16_x4(int16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int16x4x4_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s16_x4 - #define vst1_s16_x4(a, b) simde_vst1_s16_x4((a), (b)) + #define vst1_s16_x4(ptr, val) simde_vst1_s16_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s32_x4(int32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int32x2x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s32_x4(ptr, val); #else simde_vst1_s32(ptr, val.val[0]); @@ -118,13 +119,13 @@ simde_vst1_s32_x4(int32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int32x2x4_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s32_x4 - #define vst1_s32_x4(a, b) simde_vst1_s32_x4((a), (b)) + #define vst1_s32_x4(ptr, val) simde_vst1_s32_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_s64_x4(int64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int64x1x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_s64_x4(ptr, val); #else simde_vst1_s64(ptr, val.val[0]); @@ -135,13 +136,13 @@ simde_vst1_s64_x4(int64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int64x1x4_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_s64_x4 - #define vst1_s64_x4(a, b) simde_vst1_s64_x4((a), (b)) + #define vst1_s64_x4(ptr, val) simde_vst1_s64_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u8_x4(uint8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_uint8x8x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u8_x4(ptr, val); #else simde_vst1_u8(ptr, val.val[0]); @@ -152,13 +153,13 @@ simde_vst1_u8_x4(uint8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_uint8x8x4_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u8_x4 - #define vst1_u8_x4(a, b) simde_vst1_u8_x4((a), (b)) + #define vst1_u8_x4(ptr, val) simde_vst1_u8_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u16_x4(uint16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint16x4x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u16_x4(ptr, val); #else simde_vst1_u16(ptr, val.val[0]); @@ -169,13 +170,13 @@ simde_vst1_u16_x4(uint16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint16x4x4_t val) } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u16_x4 - #define vst1_u16_x4(a, b) simde_vst1_u16_x4((a), (b)) + #define vst1_u16_x4(ptr, val) simde_vst1_u16_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u32_x4(uint32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint32x2x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u32_x4(ptr, val); #else simde_vst1_u32(ptr, val.val[0]); @@ -186,13 +187,13 @@ simde_vst1_u32_x4(uint32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint32x2x4_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u32_x4 - #define vst1_u32_x4(a, b) simde_vst1_u32_x4((a), (b)) + #define vst1_u32_x4(ptr, val) simde_vst1_u32_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1_u64_x4(uint64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint64x1x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1_u64_x4(ptr, val); #else simde_vst1_u64(ptr, val.val[0]); @@ -203,7 +204,7 @@ simde_vst1_u64_x4(uint64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint64x1x4_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1_u64_x4 - #define vst1_u64_x4(a, b) simde_vst1_u64_x4((a), (b)) + #define vst1_u64_x4(ptr, val) simde_vst1_u64_x4((ptr), (val)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ diff --git a/simde/arm/neon/st1q_x2.h b/simde/arm/neon/st1q_x2.h index d244bf062..a429fde9b 100644 --- a/simde/arm/neon/st1q_x2.h +++ b/simde/arm/neon/st1q_x2.h @@ -23,6 +23,7 @@ * Copyright: * 2020 Evan Nemerson * 2021 Décio Luiz Gazzoni Filho + * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_ST1Q_X2_H) @@ -39,7 +40,7 @@ SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f32_x2(simde_float32 ptr[HEDLEY_ARRAY_PARAM(8)], simde_float32x4x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_f32_x2(ptr, val); #else simde_vst1q_f32(ptr, val.val[0]); @@ -48,28 +49,28 @@ simde_vst1q_f32_x2(simde_float32 ptr[HEDLEY_ARRAY_PARAM(8)], simde_float32x4x2_t } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_f32_x2 - #define vst1q_f32_x2(a, b) simde_vst1q_f32_x2((a), (b)) + #define vst1q_f32_x2(ptr, val) simde_vst1q_f32_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f64_x2(simde_float64 ptr[HEDLEY_ARRAY_PARAM(4)], simde_float64x2x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1q_f64_x2(ptr, val); #else simde_vst1q_f64(ptr, val.val[0]); simde_vst1q_f64(ptr+2, val.val[1]); #endif } -#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1q_f64_x2 - #define vst1q_f64_x2(a, b) simde_vst1q_f64_x2((a), (b)) + #define vst1q_f64_x2(ptr, val) simde_vst1q_f64_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s8_x2(int8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_int8x16x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s8_x2(ptr, val); #else simde_vst1q_s8(ptr, val.val[0]); @@ -78,13 +79,13 @@ simde_vst1q_s8_x2(int8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_int8x16x2_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s8_x2 - #define vst1q_s8_x2(a, b) simde_vst1q_s8_x2((a), (b)) + #define vst1q_s8_x2(ptr, val) simde_vst1q_s8_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s16_x2(int16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int16x8x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s16_x2(ptr, val); #else simde_vst1q_s16(ptr, val.val[0]); @@ -93,13 +94,13 @@ simde_vst1q_s16_x2(int16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int16x8x2_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s16_x2 - #define vst1q_s16_x2(a, b) simde_vst1q_s16_x2((a), (b)) + #define vst1q_s16_x2(ptr, val) simde_vst1q_s16_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s32_x2(int32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int32x4x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s32_x2(ptr, val); #else simde_vst1q_s32(ptr, val.val[0]); @@ -108,13 +109,13 @@ simde_vst1q_s32_x2(int32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int32x4x2_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s32_x2 - #define vst1q_s32_x2(a, b) simde_vst1q_s32_x2((a), (b)) + #define vst1q_s32_x2(ptr, val) simde_vst1q_s32_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s64_x2(int64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int64x2x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s64_x2(ptr, val); #else simde_vst1q_s64(ptr, val.val[0]); @@ -123,13 +124,13 @@ simde_vst1q_s64_x2(int64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int64x2x2_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s64_x2 - #define vst1q_s64_x2(a, b) simde_vst1q_s64_x2((a), (b)) + #define vst1q_s64_x2(ptr, val) simde_vst1q_s64_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u8_x2(uint8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_uint8x16x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u8_x2(ptr, val); #else simde_vst1q_u8(ptr, val.val[0]); @@ -138,13 +139,13 @@ simde_vst1q_u8_x2(uint8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_uint8x16x2_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u8_x2 - #define vst1q_u8_x2(a, b) simde_vst1q_u8_x2((a), (b)) + #define vst1q_u8_x2(ptr, val) simde_vst1q_u8_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u16_x2(uint16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint16x8x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u16_x2(ptr, val); #else simde_vst1q_u16(ptr, val.val[0]); @@ -153,13 +154,13 @@ simde_vst1q_u16_x2(uint16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint16x8x2_t val) } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u16_x2 - #define vst1q_u16_x2(a, b) simde_vst1q_u16_x2((a), (b)) + #define vst1q_u16_x2(ptr, val) simde_vst1q_u16_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u32_x2(uint32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint32x4x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u32_x2(ptr, val); #else simde_vst1q_u32(ptr, val.val[0]); @@ -168,13 +169,13 @@ simde_vst1q_u32_x2(uint32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint32x4x2_t val) } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u32_x2 - #define vst1q_u32_x2(a, b) simde_vst1q_u32_x2((a), (b)) + #define vst1q_u32_x2(ptr, val) simde_vst1q_u32_x2((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u64_x2(uint64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint64x2x2_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u64_x2(ptr, val); #else simde_vst1q_u64(ptr, val.val[0]); @@ -183,7 +184,7 @@ simde_vst1q_u64_x2(uint64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint64x2x2_t val) } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u64_x2 - #define vst1q_u64_x2(a, b) simde_vst1q_u64_x2((a), (b)) + #define vst1q_u64_x2(ptr, val) simde_vst1q_u64_x2((ptr), (val)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ diff --git a/simde/arm/neon/st1q_x3.h b/simde/arm/neon/st1q_x3.h index 8a9c6baea..72ccfba6d 100644 --- a/simde/arm/neon/st1q_x3.h +++ b/simde/arm/neon/st1q_x3.h @@ -23,6 +23,7 @@ * Copyright: * 2020 Evan Nemerson * 2021 Décio Luiz Gazzoni Filho + * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_ST1Q_X3_H) @@ -39,7 +40,7 @@ SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f32_x3(simde_float32 ptr[HEDLEY_ARRAY_PARAM(12)], simde_float32x4x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_f32_x3(ptr, val); #else simde_vst1q_f32(ptr, val.val[0]); @@ -49,13 +50,13 @@ simde_vst1q_f32_x3(simde_float32 ptr[HEDLEY_ARRAY_PARAM(12)], simde_float32x4x3_ } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_f32_x3 - #define vst1q_f32_x3(a, b) simde_vst1q_f32_x3((a), (b)) + #define vst1q_f32_x3(ptr, val) simde_vst1q_f32_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f64_x3(simde_float64 ptr[HEDLEY_ARRAY_PARAM(6)], simde_float64x2x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1q_f64_x3(ptr, val); #else simde_vst1q_f64(ptr, val.val[0]); @@ -63,15 +64,15 @@ simde_vst1q_f64_x3(simde_float64 ptr[HEDLEY_ARRAY_PARAM(6)], simde_float64x2x3_t simde_vst1q_f64(ptr+4, val.val[2]); #endif } -#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1q_f64_x3 - #define vst1q_f64_x3(a, b) simde_vst1q_f64_x3((a), (b)) + #define vst1q_f64_x3(ptr, val) simde_vst1q_f64_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s8_x3(int8_t ptr[HEDLEY_ARRAY_PARAM(48)], simde_int8x16x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s8_x3(ptr, val); #else simde_vst1q_s8(ptr, val.val[0]); @@ -81,13 +82,13 @@ simde_vst1q_s8_x3(int8_t ptr[HEDLEY_ARRAY_PARAM(48)], simde_int8x16x3_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s8_x3 - #define vst1q_s8_x3(a, b) simde_vst1q_s8_x3((a), (b)) + #define vst1q_s8_x3(ptr, val) simde_vst1q_s8_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s16_x3(int16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_int16x8x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s16_x3(ptr, val); #else simde_vst1q_s16(ptr, val.val[0]); @@ -97,13 +98,13 @@ simde_vst1q_s16_x3(int16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_int16x8x3_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s16_x3 - #define vst1q_s16_x3(a, b) simde_vst1q_s16_x3((a), (b)) + #define vst1q_s16_x3(ptr, val) simde_vst1q_s16_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s32_x3(int32_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_int32x4x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s32_x3(ptr, val); #else simde_vst1q_s32(ptr, val.val[0]); @@ -113,13 +114,13 @@ simde_vst1q_s32_x3(int32_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_int32x4x3_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s32_x3 - #define vst1q_s32_x3(a, b) simde_vst1q_s32_x3((a), (b)) + #define vst1q_s32_x3(ptr, val) simde_vst1q_s32_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s64_x3(int64_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_int64x2x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s64_x3(ptr, val); #else simde_vst1q_s64(ptr, val.val[0]); @@ -129,13 +130,13 @@ simde_vst1q_s64_x3(int64_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_int64x2x3_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s64_x3 - #define vst1q_s64_x3(a, b) simde_vst1q_s64_x3((a), (b)) + #define vst1q_s64_x3(ptr, val) simde_vst1q_s64_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u8_x3(uint8_t ptr[HEDLEY_ARRAY_PARAM(48)], simde_uint8x16x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u8_x3(ptr, val); #else simde_vst1q_u8(ptr, val.val[0]); @@ -145,13 +146,13 @@ simde_vst1q_u8_x3(uint8_t ptr[HEDLEY_ARRAY_PARAM(48)], simde_uint8x16x3_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u8_x3 - #define vst1q_u8_x3(a, b) simde_vst1q_u8_x3((a), (b)) + #define vst1q_u8_x3(ptr, val) simde_vst1q_u8_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u16_x3(uint16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_uint16x8x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u16_x3(ptr, val); #else simde_vst1q_u16(ptr, val.val[0]); @@ -161,13 +162,13 @@ simde_vst1q_u16_x3(uint16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_uint16x8x3_t val) } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u16_x3 - #define vst1q_u16_x3(a, b) simde_vst1q_u16_x3((a), (b)) + #define vst1q_u16_x3(ptr, val) simde_vst1q_u16_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u32_x3(uint32_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_uint32x4x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u32_x3(ptr, val); #else simde_vst1q_u32(ptr, val.val[0]); @@ -177,13 +178,13 @@ simde_vst1q_u32_x3(uint32_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_uint32x4x3_t val) } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u32_x3 - #define vst1q_u32_x3(a, b) simde_vst1q_u32_x3((a), (b)) + #define vst1q_u32_x3(ptr, val) simde_vst1q_u32_x3((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u64_x3(uint64_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_uint64x2x3_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u64_x3(ptr, val); #else simde_vst1q_u64(ptr, val.val[0]); @@ -193,7 +194,7 @@ simde_vst1q_u64_x3(uint64_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_uint64x2x3_t val) } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u64_x3 - #define vst1q_u64_x3(a, b) simde_vst1q_u64_x3((a), (b)) + #define vst1q_u64_x3(ptr, val) simde_vst1q_u64_x3((ptr), (val)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ diff --git a/simde/arm/neon/st1q_x4.h b/simde/arm/neon/st1q_x4.h index 5d5d75528..c52140444 100644 --- a/simde/arm/neon/st1q_x4.h +++ b/simde/arm/neon/st1q_x4.h @@ -23,6 +23,7 @@ * Copyright: * 2020 Evan Nemerson * 2021 Décio Luiz Gazzoni Filho + * 2023 Yi-Yen Chung (Copyright owned by Andes Technology) */ #if !defined(SIMDE_ARM_NEON_ST1Q_X4_H) @@ -39,7 +40,7 @@ SIMDE_BEGIN_DECLS_ SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f32_x4(simde_float32 ptr[HEDLEY_ARRAY_PARAM(16)], simde_float32x4x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_f32_x4(ptr, val); #else simde_vst1q_f32(ptr, val.val[0]); @@ -50,13 +51,13 @@ simde_vst1q_f32_x4(simde_float32 ptr[HEDLEY_ARRAY_PARAM(16)], simde_float32x4x4_ } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_f32_x4 - #define vst1q_f32_x4(a, b) simde_vst1q_f32_x4((a), (b)) + #define vst1q_f32_x4(ptr, val) simde_vst1q_f32_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_f64_x4(simde_float64 ptr[HEDLEY_ARRAY_PARAM(8)], simde_float64x2x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) vst1q_f64_x4(ptr, val); #else simde_vst1q_f64(ptr, val.val[0]); @@ -65,15 +66,15 @@ simde_vst1q_f64_x4(simde_float64 ptr[HEDLEY_ARRAY_PARAM(8)], simde_float64x2x4_t simde_vst1q_f64(ptr+6, val.val[3]); #endif } -#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) +#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) #undef vst1q_f64_x4 - #define vst1q_f64_x4(a, b) simde_vst1q_f64_x4((a), (b)) + #define vst1q_f64_x4(ptr, val) simde_vst1q_f64_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s8_x4(int8_t ptr[HEDLEY_ARRAY_PARAM(64)], simde_int8x16x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s8_x4(ptr, val); #else simde_vst1q_s8(ptr, val.val[0]); @@ -84,13 +85,13 @@ simde_vst1q_s8_x4(int8_t ptr[HEDLEY_ARRAY_PARAM(64)], simde_int8x16x4_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s8_x4 - #define vst1q_s8_x4(a, b) simde_vst1q_s8_x4((a), (b)) + #define vst1q_s8_x4(ptr, val) simde_vst1q_s8_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s16_x4(int16_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_int16x8x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s16_x4(ptr, val); #else simde_vst1q_s16(ptr, val.val[0]); @@ -101,13 +102,13 @@ simde_vst1q_s16_x4(int16_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_int16x8x4_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s16_x4 - #define vst1q_s16_x4(a, b) simde_vst1q_s16_x4((a), (b)) + #define vst1q_s16_x4(ptr, val) simde_vst1q_s16_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s32_x4(int32_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int32x4x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s32_x4(ptr, val); #else simde_vst1q_s32(ptr, val.val[0]); @@ -118,13 +119,13 @@ simde_vst1q_s32_x4(int32_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int32x4x4_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s32_x4 - #define vst1q_s32_x4(a, b) simde_vst1q_s32_x4((a), (b)) + #define vst1q_s32_x4(ptr, val) simde_vst1q_s32_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_s64_x4(int64_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int64x2x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_s64_x4(ptr, val); #else simde_vst1q_s64(ptr, val.val[0]); @@ -135,13 +136,13 @@ simde_vst1q_s64_x4(int64_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int64x2x4_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_s64_x4 - #define vst1q_s64_x4(a, b) simde_vst1q_s64_x4((a), (b)) + #define vst1q_s64_x4(ptr, val) simde_vst1q_s64_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u8_x4(uint8_t ptr[HEDLEY_ARRAY_PARAM(64)], simde_uint8x16x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u8_x4(ptr, val); #else simde_vst1q_u8(ptr, val.val[0]); @@ -152,13 +153,13 @@ simde_vst1q_u8_x4(uint8_t ptr[HEDLEY_ARRAY_PARAM(64)], simde_uint8x16x4_t val) { } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u8_x4 - #define vst1q_u8_x4(a, b) simde_vst1q_u8_x4((a), (b)) + #define vst1q_u8_x4(ptr, val) simde_vst1q_u8_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u16_x4(uint16_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_uint16x8x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u16_x4(ptr, val); #else simde_vst1q_u16(ptr, val.val[0]); @@ -169,13 +170,13 @@ simde_vst1q_u16_x4(uint16_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_uint16x8x4_t val) } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u16_x4 - #define vst1q_u16_x4(a, b) simde_vst1q_u16_x4((a), (b)) + #define vst1q_u16_x4(ptr, val) simde_vst1q_u16_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u32_x4(uint32_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint32x4x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u32_x4(ptr, val); #else simde_vst1q_u32(ptr, val.val[0]); @@ -186,13 +187,13 @@ simde_vst1q_u32_x4(uint32_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint32x4x4_t val) } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u32_x4 - #define vst1q_u32_x4(a, b) simde_vst1q_u32_x4((a), (b)) + #define vst1q_u32_x4(ptr, val) simde_vst1q_u32_x4((ptr), (val)) #endif SIMDE_FUNCTION_ATTRIBUTES void simde_vst1q_u64_x4(uint64_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint64x2x4_t val) { - #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) + #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989) vst1q_u64_x4(ptr, val); #else simde_vst1q_u64(ptr, val.val[0]); @@ -203,7 +204,7 @@ simde_vst1q_u64_x4(uint64_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint64x2x4_t val) } #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #undef vst1q_u64_x4 - #define vst1q_u64_x4(a, b) simde_vst1q_u64_x4((a), (b)) + #define vst1q_u64_x4(ptr, val) simde_vst1q_u64_x4((ptr), (val)) #endif #endif /* !defined(SIMDE_BUG_INTEL_857088) */ diff --git a/simde/simde-common.h b/simde/simde-common.h index 30d11b5d1..58f4234ce 100644 --- a/simde/simde-common.h +++ b/simde/simde-common.h @@ -974,6 +974,9 @@ HEDLEY_DIAGNOSTIC_POP # if !HEDLEY_GCC_VERSION_CHECK(9,1,0) && defined(SIMDE_ARCH_AARCH64) # define SIMDE_BUG_GCC_REV_264019 # endif +# if (!HEDLEY_GCC_VERSION_CHECK(9,0,0) && !defined(SIMDE_ARCH_AARCH64)) || (!defined(SIMDE_ARCH_AARCH64) && defined(SIMDE_ARCH_ARM)) +# define SIMDE_BUG_GCC_REV_260989 +# endif # if defined(SIMDE_ARCH_ARM) # define SIMDE_BUG_GCC_95399 # define SIMDE_BUG_GCC_95471 diff --git a/test/arm/neon/st1_x2.c b/test/arm/neon/st1_x2.c index a62448f9e..327ab6614 100644 --- a/test/arm/neon/st1_x2.c +++ b/test/arm/neon/st1_x2.c @@ -51,7 +51,7 @@ test_simde_vst1_f32_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_float32x2x2_t r_ = { { simde_vld1_f32(test_vec[i].r[0]), simde_vld1_f32(test_vec[i].r[1]) } }; - simde_float32 a_[4]; + SIMDE_ALIGN_TO_16 simde_float32 a_[4]; simde_vst1_f32_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -121,7 +121,7 @@ test_simde_vst1_f64_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_float64x1x2_t r_ = { { simde_vld1_f64(test_vec[i].r[0]), simde_vld1_f64(test_vec[i].r[1]) } }; - simde_float64 a_[2]; + SIMDE_ALIGN_TO_16 simde_float64 a_[2]; simde_vst1_f64_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -199,7 +199,7 @@ test_simde_vst1_s8_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_int8x8x2_t r_ = { { simde_vld1_s8(test_vec[i].r[0]), simde_vld1_s8(test_vec[i].r[1]) } }; - int8_t a_[16]; + SIMDE_ALIGN_TO_16 int8_t a_[16]; simde_vst1_s8_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -269,7 +269,7 @@ test_simde_vst1_s16_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_int16x4x2_t r_ = { { simde_vld1_s16(test_vec[i].r[0]), simde_vld1_s16(test_vec[i].r[1]) } }; - int16_t a_[8]; + SIMDE_ALIGN_TO_16 int16_t a_[8]; simde_vst1_s16_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -339,7 +339,7 @@ test_simde_vst1_s32_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_int32x2x2_t r_ = { { simde_vld1_s32(test_vec[i].r[0]), simde_vld1_s32(test_vec[i].r[1]) } }; - int32_t a_[4]; + SIMDE_ALIGN_TO_16 int32_t a_[4]; simde_vst1_s32_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -409,7 +409,7 @@ test_simde_vst1_s64_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_int64x1x2_t r_ = { { simde_vld1_s64(test_vec[i].r[0]), simde_vld1_s64(test_vec[i].r[1]) } }; - int64_t a_[2]; + SIMDE_ALIGN_TO_16 int64_t a_[2]; simde_vst1_s64_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -487,7 +487,7 @@ test_simde_vst1_u8_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_uint8x8x2_t r_ = { { simde_vld1_u8(test_vec[i].r[0]), simde_vld1_u8(test_vec[i].r[1]) } }; - uint8_t a_[16]; + SIMDE_ALIGN_TO_16 uint8_t a_[16]; simde_vst1_u8_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -557,7 +557,7 @@ test_simde_vst1_u16_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_uint16x4x2_t r_ = { { simde_vld1_u16(test_vec[i].r[0]), simde_vld1_u16(test_vec[i].r[1]) } }; - uint16_t a_[8]; + SIMDE_ALIGN_TO_16 uint16_t a_[8]; simde_vst1_u16_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -627,7 +627,7 @@ test_simde_vst1_u32_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_uint32x2x2_t r_ = { { simde_vld1_u32(test_vec[i].r[0]), simde_vld1_u32(test_vec[i].r[1]) } }; - uint32_t a_[4]; + SIMDE_ALIGN_TO_16 uint32_t a_[4]; simde_vst1_u32_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -697,7 +697,7 @@ test_simde_vst1_u64_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_uint64x1x2_t r_ = { { simde_vld1_u64(test_vec[i].r[0]), simde_vld1_u64(test_vec[i].r[1]) } }; - uint64_t a_[2]; + SIMDE_ALIGN_TO_16 uint64_t a_[2]; simde_vst1_u64_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); diff --git a/test/arm/neon/st1_x3.c b/test/arm/neon/st1_x3.c index 924bb5210..8165ae5bc 100644 --- a/test/arm/neon/st1_x3.c +++ b/test/arm/neon/st1_x3.c @@ -68,7 +68,7 @@ test_simde_vst1_f32_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_f32(test_vec[i].r[1]), simde_vld1_f32(test_vec[i].r[2]) } }; - simde_float32 a_[6]; + SIMDE_ALIGN_TO_16 simde_float32 a_[6]; simde_vst1_f32_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -148,7 +148,7 @@ test_simde_vst1_f64_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_f64(test_vec[i].r[1]), simde_vld1_f64(test_vec[i].r[2]) } }; - simde_float64 a_[3]; + SIMDE_ALIGN_TO_16 simde_float64 a_[3]; simde_vst1_f64_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -244,7 +244,7 @@ test_simde_vst1_s8_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_s8(test_vec[i].r[1]), simde_vld1_s8(test_vec[i].r[2]) } }; - int8_t a_[24]; + SIMDE_ALIGN_TO_16 int8_t a_[24]; simde_vst1_s8_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -332,7 +332,7 @@ test_simde_vst1_s16_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_s16(test_vec[i].r[1]), simde_vld1_s16(test_vec[i].r[2]) } }; - int16_t a_[12]; + SIMDE_ALIGN_TO_16 int16_t a_[12]; simde_vst1_s16_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -412,7 +412,7 @@ test_simde_vst1_s32_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_s32(test_vec[i].r[1]), simde_vld1_s32(test_vec[i].r[2]) } }; - int32_t a_[6]; + SIMDE_ALIGN_TO_16 int32_t a_[6]; simde_vst1_s32_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -492,7 +492,7 @@ test_simde_vst1_s64_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_s64(test_vec[i].r[1]), simde_vld1_s64(test_vec[i].r[2]) } }; - int64_t a_[3]; + SIMDE_ALIGN_TO_16 int64_t a_[3]; simde_vst1_s64_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -588,7 +588,7 @@ test_simde_vst1_u8_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_u8(test_vec[i].r[1]), simde_vld1_u8(test_vec[i].r[2]) } }; - uint8_t a_[24]; + SIMDE_ALIGN_TO_16 uint8_t a_[24]; simde_vst1_u8_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -676,7 +676,7 @@ test_simde_vst1_u16_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_u16(test_vec[i].r[1]), simde_vld1_u16(test_vec[i].r[2]) } }; - uint16_t a_[12]; + SIMDE_ALIGN_TO_16 uint16_t a_[12]; simde_vst1_u16_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -756,7 +756,7 @@ test_simde_vst1_u32_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_u32(test_vec[i].r[1]), simde_vld1_u32(test_vec[i].r[2]) } }; - uint32_t a_[6]; + SIMDE_ALIGN_TO_16 uint32_t a_[6]; simde_vst1_u32_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -836,7 +836,7 @@ test_simde_vst1_u64_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_u64(test_vec[i].r[1]), simde_vld1_u64(test_vec[i].r[2]) } }; - uint64_t a_[3]; + SIMDE_ALIGN_TO_16 uint64_t a_[3]; simde_vst1_u64_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); diff --git a/test/arm/neon/st1_x4.c b/test/arm/neon/st1_x4.c index 886275a66..4acefb6e2 100644 --- a/test/arm/neon/st1_x4.c +++ b/test/arm/neon/st1_x4.c @@ -77,7 +77,7 @@ test_simde_vst1_f32_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_f32(test_vec[i].r[2]), simde_vld1_f32(test_vec[i].r[3]) } }; - simde_float32 a_[8]; + SIMDE_ALIGN_TO_16 simde_float32 a_[8]; simde_vst1_f32_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -167,7 +167,7 @@ test_simde_vst1_f64_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_f64(test_vec[i].r[2]), simde_vld1_f64(test_vec[i].r[3]) } }; - simde_float64 a_[4]; + SIMDE_ALIGN_TO_16 simde_float64 a_[4]; simde_vst1_f64_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -281,7 +281,7 @@ test_simde_vst1_s8_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_s8(test_vec[i].r[2]), simde_vld1_s8(test_vec[i].r[3]) } }; - int8_t a_[32]; + SIMDE_ALIGN_TO_16 int8_t a_[32]; simde_vst1_s8_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -379,7 +379,7 @@ test_simde_vst1_s16_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_s16(test_vec[i].r[2]), simde_vld1_s16(test_vec[i].r[3]) } }; - int16_t a_[16]; + SIMDE_ALIGN_TO_16 int16_t a_[16]; simde_vst1_s16_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -469,7 +469,7 @@ test_simde_vst1_s32_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_s32(test_vec[i].r[2]), simde_vld1_s32(test_vec[i].r[3]) } }; - int32_t a_[8]; + SIMDE_ALIGN_TO_16 int32_t a_[8]; simde_vst1_s32_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -559,7 +559,7 @@ test_simde_vst1_s64_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_s64(test_vec[i].r[2]), simde_vld1_s64(test_vec[i].r[3]) } }; - int64_t a_[4]; + SIMDE_ALIGN_TO_16 int64_t a_[4]; simde_vst1_s64_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -673,7 +673,7 @@ test_simde_vst1_u8_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_u8(test_vec[i].r[2]), simde_vld1_u8(test_vec[i].r[3]) } }; - uint8_t a_[32]; + SIMDE_ALIGN_TO_16 uint8_t a_[32]; simde_vst1_u8_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -771,7 +771,7 @@ test_simde_vst1_u16_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_u16(test_vec[i].r[2]), simde_vld1_u16(test_vec[i].r[3]) } }; - uint16_t a_[16]; + SIMDE_ALIGN_TO_16 uint16_t a_[16]; simde_vst1_u16_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -861,7 +861,7 @@ test_simde_vst1_u32_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_u32(test_vec[i].r[2]), simde_vld1_u32(test_vec[i].r[3]) } }; - uint32_t a_[8]; + SIMDE_ALIGN_TO_16 uint32_t a_[8]; simde_vst1_u32_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -951,7 +951,7 @@ test_simde_vst1_u64_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1_u64(test_vec[i].r[2]), simde_vld1_u64(test_vec[i].r[3]) } }; - uint64_t a_[4]; + SIMDE_ALIGN_TO_16 uint64_t a_[4]; simde_vst1_u64_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); diff --git a/test/arm/neon/st1q_x2.c b/test/arm/neon/st1q_x2.c index cc9bfe2a8..d6228ece9 100644 --- a/test/arm/neon/st1q_x2.c +++ b/test/arm/neon/st1q_x2.c @@ -59,7 +59,7 @@ test_simde_vst1q_f32_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_float32x4x2_t r_ = { { simde_vld1q_f32(test_vec[i].r[0]), simde_vld1q_f32(test_vec[i].r[1]) } }; - simde_float32 a_[8]; + SIMDE_ALIGN_TO_16 simde_float32 a_[8]; simde_vst1q_f32_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -129,7 +129,7 @@ test_simde_vst1q_f64_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_float64x2x2_t r_ = { { simde_vld1q_f64(test_vec[i].r[0]), simde_vld1q_f64(test_vec[i].r[1]) } }; - simde_float64 a_[4]; + SIMDE_ALIGN_TO_16 simde_float64 a_[4]; simde_vst1q_f64_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -239,7 +239,7 @@ test_simde_vst1q_s8_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_int8x16x2_t r_ = { { simde_vld1q_s8(test_vec[i].r[0]), simde_vld1q_s8(test_vec[i].r[1]) } }; - int8_t a_[32]; + SIMDE_ALIGN_TO_16 int8_t a_[32]; simde_vst1q_s8_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -317,7 +317,7 @@ test_simde_vst1q_s16_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_int16x8x2_t r_ = { { simde_vld1q_s16(test_vec[i].r[0]), simde_vld1q_s16(test_vec[i].r[1]) } }; - int16_t a_[16]; + SIMDE_ALIGN_TO_16 int16_t a_[16]; simde_vst1q_s16_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -387,7 +387,7 @@ test_simde_vst1q_s32_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_int32x4x2_t r_ = { { simde_vld1q_s32(test_vec[i].r[0]), simde_vld1q_s32(test_vec[i].r[1]) } }; - int32_t a_[8]; + SIMDE_ALIGN_TO_16 int32_t a_[8]; simde_vst1q_s32_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -457,7 +457,7 @@ test_simde_vst1q_s64_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_int64x2x2_t r_ = { { simde_vld1q_s64(test_vec[i].r[0]), simde_vld1q_s64(test_vec[i].r[1]) } }; - int64_t a_[4]; + SIMDE_ALIGN_TO_16 int64_t a_[4]; simde_vst1q_s64_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -567,7 +567,7 @@ test_simde_vst1q_u8_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_uint8x16x2_t r_ = { { simde_vld1q_u8(test_vec[i].r[0]), simde_vld1q_u8(test_vec[i].r[1]) } }; - uint8_t a_[32]; + SIMDE_ALIGN_TO_16 uint8_t a_[32]; simde_vst1q_u8_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -645,7 +645,7 @@ test_simde_vst1q_u16_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_uint16x8x2_t r_ = { { simde_vld1q_u16(test_vec[i].r[0]), simde_vld1q_u16(test_vec[i].r[1]) } }; - uint16_t a_[16]; + SIMDE_ALIGN_TO_16 uint16_t a_[16]; simde_vst1q_u16_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -715,7 +715,7 @@ test_simde_vst1q_u32_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_uint32x4x2_t r_ = { { simde_vld1q_u32(test_vec[i].r[0]), simde_vld1q_u32(test_vec[i].r[1]) } }; - uint32_t a_[8]; + SIMDE_ALIGN_TO_16 uint32_t a_[8]; simde_vst1q_u32_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -785,7 +785,7 @@ test_simde_vst1q_u64_x2 (SIMDE_MUNIT_TEST_ARGS) { simde_uint64x2x2_t r_ = { { simde_vld1q_u64(test_vec[i].r[0]), simde_vld1q_u64(test_vec[i].r[1]) } }; - uint64_t a_[4]; + SIMDE_ALIGN_TO_16 uint64_t a_[4]; simde_vst1q_u64_x2(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); diff --git a/test/arm/neon/st1q_x3.c b/test/arm/neon/st1q_x3.c index 850e95797..81f7e1968 100644 --- a/test/arm/neon/st1q_x3.c +++ b/test/arm/neon/st1q_x3.c @@ -76,7 +76,7 @@ test_simde_vst1q_f32_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_f32(test_vec[i].r[1]), simde_vld1q_f32(test_vec[i].r[2]) } }; - simde_float32 a_[12]; + SIMDE_ALIGN_TO_16 simde_float32 a_[12]; simde_vst1q_f32_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -164,7 +164,7 @@ test_simde_vst1q_f64_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_f64(test_vec[i].r[1]), simde_vld1q_f64(test_vec[i].r[2]) } }; - simde_float64 a_[6]; + SIMDE_ALIGN_TO_16 simde_float64 a_[6]; simde_vst1q_f64_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -308,7 +308,7 @@ test_simde_vst1q_s8_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_s8(test_vec[i].r[1]), simde_vld1q_s8(test_vec[i].r[2]) } }; - int8_t a_[48]; + SIMDE_ALIGN_TO_16 int8_t a_[48]; simde_vst1q_s8_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -404,7 +404,7 @@ test_simde_vst1q_s16_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_s16(test_vec[i].r[1]), simde_vld1q_s16(test_vec[i].r[2]) } }; - int16_t a_[24]; + SIMDE_ALIGN_TO_16 int16_t a_[24]; simde_vst1q_s16_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -492,7 +492,7 @@ test_simde_vst1q_s32_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_s32(test_vec[i].r[1]), simde_vld1q_s32(test_vec[i].r[2]) } }; - int32_t a_[12]; + SIMDE_ALIGN_TO_16 int32_t a_[12]; simde_vst1q_s32_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -580,7 +580,7 @@ test_simde_vst1q_s64_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_s64(test_vec[i].r[1]), simde_vld1q_s64(test_vec[i].r[2]) } }; - int64_t a_[6]; + SIMDE_ALIGN_TO_16 int64_t a_[6]; simde_vst1q_s64_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -724,7 +724,7 @@ test_simde_vst1q_u8_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_u8(test_vec[i].r[1]), simde_vld1q_u8(test_vec[i].r[2]) } }; - uint8_t a_[48]; + SIMDE_ALIGN_TO_16 uint8_t a_[48]; simde_vst1q_u8_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -820,7 +820,7 @@ test_simde_vst1q_u16_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_u16(test_vec[i].r[1]), simde_vld1q_u16(test_vec[i].r[2]) } }; - uint16_t a_[24]; + SIMDE_ALIGN_TO_16 uint16_t a_[24]; simde_vst1q_u16_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -908,7 +908,7 @@ test_simde_vst1q_u32_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_u32(test_vec[i].r[1]), simde_vld1q_u32(test_vec[i].r[2]) } }; - uint32_t a_[12]; + SIMDE_ALIGN_TO_16 uint32_t a_[12]; simde_vst1q_u32_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -996,7 +996,7 @@ test_simde_vst1q_u64_x3 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_u64(test_vec[i].r[1]), simde_vld1q_u64(test_vec[i].r[2]) } }; - uint64_t a_[6]; + SIMDE_ALIGN_TO_16 uint64_t a_[6]; simde_vst1q_u64_x3(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); diff --git a/test/arm/neon/st1q_x4.c b/test/arm/neon/st1q_x4.c index 088c1c9c8..c0e180c76 100644 --- a/test/arm/neon/st1q_x4.c +++ b/test/arm/neon/st1q_x4.c @@ -93,7 +93,7 @@ test_simde_vst1q_f32_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_f32(test_vec[i].r[2]), simde_vld1q_f32(test_vec[i].r[3]) } }; - simde_float32 a_[16]; + SIMDE_ALIGN_TO_16 simde_float32 a_[16]; simde_vst1q_f32_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -191,7 +191,7 @@ test_simde_vst1q_f64_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_f64(test_vec[i].r[2]), simde_vld1q_f64(test_vec[i].r[3]) } }; - simde_float64 a_[8]; + SIMDE_ALIGN_TO_16 simde_float64 a_[8]; simde_vst1q_f64_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -369,7 +369,7 @@ test_simde_vst1q_s8_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_s8(test_vec[i].r[2]), simde_vld1q_s8(test_vec[i].r[3]) } }; - int8_t a_[64]; + SIMDE_ALIGN_TO_16 int8_t a_[64]; simde_vst1q_s8_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -483,7 +483,7 @@ test_simde_vst1q_s16_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_s16(test_vec[i].r[2]), simde_vld1q_s16(test_vec[i].r[3]) } }; - int16_t a_[32]; + SIMDE_ALIGN_TO_16 int16_t a_[32]; simde_vst1q_s16_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -581,7 +581,7 @@ test_simde_vst1q_s32_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_s32(test_vec[i].r[2]), simde_vld1q_s32(test_vec[i].r[3]) } }; - int32_t a_[16]; + SIMDE_ALIGN_TO_16 int32_t a_[16]; simde_vst1q_s32_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -679,7 +679,7 @@ test_simde_vst1q_s64_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_s64(test_vec[i].r[2]), simde_vld1q_s64(test_vec[i].r[3]) } }; - int64_t a_[8]; + SIMDE_ALIGN_TO_16 int64_t a_[8]; simde_vst1q_s64_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -857,7 +857,7 @@ test_simde_vst1q_u8_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_u8(test_vec[i].r[2]), simde_vld1q_u8(test_vec[i].r[3]) } }; - uint8_t a_[64]; + SIMDE_ALIGN_TO_16 uint8_t a_[64]; simde_vst1q_u8_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -971,7 +971,7 @@ test_simde_vst1q_u16_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_u16(test_vec[i].r[2]), simde_vld1q_u16(test_vec[i].r[3]) } }; - uint16_t a_[32]; + SIMDE_ALIGN_TO_16 uint16_t a_[32]; simde_vst1q_u16_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -1069,7 +1069,7 @@ test_simde_vst1q_u32_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_u32(test_vec[i].r[2]), simde_vld1q_u32(test_vec[i].r[3]) } }; - uint32_t a_[16]; + SIMDE_ALIGN_TO_16 uint32_t a_[16]; simde_vst1q_u32_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a))); @@ -1167,7 +1167,7 @@ test_simde_vst1q_u64_x4 (SIMDE_MUNIT_TEST_ARGS) { simde_vld1q_u64(test_vec[i].r[2]), simde_vld1q_u64(test_vec[i].r[3]) } }; - uint64_t a_[8]; + SIMDE_ALIGN_TO_16 uint64_t a_[8]; simde_vst1q_u64_x4(a_, r_); simde_assert_equal_i(0, simde_memcmp(a_, test_vec[i].a, sizeof(test_vec[i].a)));