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some circuits (eg bytecode circuit), will ignore assignment after "row limit". So constrain failures will happend.
We'd better report Err::Systhesis early? At least for bytecode circuit / evm circuit / copy circuit, which are the bottleneck, and mostly likely encounter overflow.
(It is not about overflow 1<<28, but overflow of the "pre-set row limit", eg 0.6M for bytecode circuit)
(not of high priority)
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some circuits (eg bytecode circuit), will ignore assignment after "row limit". So constrain failures will happend.
We'd better report Err::Systhesis early? At least for bytecode circuit / evm circuit / copy circuit, which are the bottleneck, and mostly likely encounter overflow.
(It is not about overflow 1<<28, but overflow of the "pre-set row limit", eg 0.6M for bytecode circuit)
(not of high priority)
Additional context
No response
The text was updated successfully, but these errors were encountered: