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Private Input circuit #614

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naure opened this issue Nov 21, 2024 · 1 comment
Open

Private Input circuit #614

naure opened this issue Nov 21, 2024 · 1 comment
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@naure
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naure commented Nov 21, 2024

Implement the supporting circuit for private input.

This will enable #607

Plan:

  • Solution based on memory initialization (as opposed to solutions based on LOAD / STORE circuits).
  • Constrain the content to the u32 range.
  • Assume a contiguous range of addresses so we can use the SetTableSpec::DynamicAddr optimization.
  • Attempt to make the range and range size dynamic.
@naure naure self-assigned this Nov 21, 2024
@hero78119
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hero78119 commented Nov 21, 2024

Related to marked of TODOs here

#[allow(dead_code)]
/// DynUnConstrainRamTableConfig with unconstrain init value and final value
/// dynamic address as witin, relied on augment of knowledge to prove address form
/// do not check init_value
/// TODO implement DynUnConstrainRamTableConfig
#[derive(Clone, Debug)]
pub struct DynUnConstrainRamTableConfig<RAM: DynVolatileRamTable + Send + Sync + Clone> {
addr: WitIn,
init_v: Vec<WitIn>,
final_v: Vec<WitIn>,
final_cycle: WitIn,
phantom: PhantomData<RAM>,
}

In the end it seems to support {Dyn, Fix} x {Volatile, Non Volatile}, in totally 4 combination

naure added a commit that referenced this issue Nov 21, 2024
_Issues #614 and #607_

Initialize memory with unconstrained prover hints.

- It is practically identical to the zero-init circuit; just without the
zero-init part.
- The address range must be contiguous, but its size is dynamic.
- The `u32` range check is already done by the LOAD and STORE circuits.

e2e integration will be done in another PR. Need #608 to configure the
address space.

---------

Co-authored-by: Aurélien Nicolas <[email protected]>
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