diff --git a/appendix.adoc b/appendix.adoc
index 4f06c09..3eb8c31 100644
--- a/appendix.adoc
+++ b/appendix.adoc
@@ -1,5 +1,5 @@
-
 [appendix]
+
 ## External Reference
 
 SMBIOS Spec - https://www.dmtf.org/standards/smbios
diff --git a/changelog.adoc b/changelog.adoc
index 924d21a..cb44736 100644
--- a/changelog.adoc
+++ b/changelog.adoc
@@ -1,4 +1,4 @@
-
+[Preface]
 ## Change Log
 
 [cols="1,1,1", width=80%, align="center", options="header"]
diff --git a/contributor.adoc b/contributor.adoc
index d6aa81c..ff7180e 100644
--- a/contributor.adoc
+++ b/contributor.adoc
@@ -1,5 +1,5 @@
-## Contributors
+[Preface]
 
-### All contributors are listed as below,
+## Contributors
 Abner Chang <abner.chang@hpe.com>, **Hewlett Packard Enterprise (HPE)** +
 Gilbert Chen <gilbert.chen@hpe.com>, **Hewlett Packard Enterprise (HPE)**
diff --git a/riscv-smbios.adoc b/riscv-smbios.adoc
index 7b80a9a..ca812c6 100644
--- a/riscv-smbios.adoc
+++ b/riscv-smbios.adoc
@@ -1,3 +1,55 @@
+[[riscv-smbios]]
+= RISC-V SMBIOS Specification
+:description: A working template for documenting RISC-V architecture in asciidoc
+:company: RISC-V.org
+:revdate: 03/2019
+:revnumber: 1.0
+//:revremark:
+//development: assume everything can change
+//stable: assume everything could change
+//frozen: of you implement this version you assume the risk that something might change because of the public review cycle  but we expect little to no change.
+//ratified: you can implement this and be assured nothing will change. if something needs to change due to an errata or enhancement, it will come out in a new extension. we do not revise extensions.
+:url-riscv: http://riscv.org
+:doctype: book
+:preface-title: Preamble
+//:colophon:
+//:appendix-caption: Appendix
+:imagesdir: images
+:title-logo-image: image:risc-v_logo.png[pdfwidth=3.25in,align=center]
+//:page-background-image: image:draft.svg[opacity=20%]
+//:title-page-background-image: none
+:back-cover-image: image:backpage.png[opacity=25%]
+// Settings:
+:experimental:
+:reproducible:
+:imagesoutdir: images
+:bibtex-file: resources/riscv-spec.bib
+:bibtex-order: alphabetical
+:bibtex-style: apa
+:icons: font
+:lang: en
+:listing-caption: Listing
+:sectnums:
+:toc: left
+:toclevels: 4
+:source-highlighter: pygments
+ifdef::backend-pdf[]
+:source-highlighter: coderay
+endif::[]
+:table-caption: Table
+:figure-caption: Figure
+:xrefstyle: full
+:chapter-refsig: Chapter
+:section-refsig: Section
+:appendix-refsig: Appendix
+:data-uri:
+:hide-uri-scheme:
+:stem: latexmath
+:footnote:
+
+// changelog for the document
+include::changelog.adoc[]
+
 # RISC-V Processor SMBIOS Tables
 ## RISC-V SMBIOS Type 4 Processor Information
 The information in SMBIOS Type 4 defines the attributes of a single RISC-V
@@ -178,4 +230,8 @@ width (See below) of the User Mode native base integer ISA supported by this RIS
 | 03h| 128-bit
 |===
 
+// Appendix for the document
+include::appendix.adoc[]
 
+// Contributors of thisdocument
+include::contributor.adoc[]
diff --git a/riscv-smbios.pdf b/riscv-smbios.pdf
new file mode 100644
index 0000000..6776891
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