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I am running spike in machine mode. It creates access fault when a program reach the debug region during an instruction fetch or a memory load. I couldn't understand what prevents to reach that side. In my program, PMP doesn't protect that side. I thought that PMA doesn't protect that region too because Spike can run in debug mode which loads the instruction around 0x300 and 0x800. Did I miss something on the RISCV spec?
When I gave the debug rom memory region in the input side, it runs without giving access fault. What am I changing (arranging) in the RISCV spec?
The text was updated successfully, but these errors were encountered:
I am running spike in machine mode. It creates access fault when a program reach the debug region during an instruction fetch or a memory load. I couldn't understand what prevents to reach that side. In my program, PMP doesn't protect that side. I thought that PMA doesn't protect that region too because Spike can run in debug mode which loads the instruction around 0x300 and 0x800. Did I miss something on the RISCV spec?
When I gave the debug rom memory region in the input side, it runs without giving access fault. What am I changing (arranging) in the RISCV spec?
The text was updated successfully, but these errors were encountered: